llvm/llvm/test/CodeGen/X86/sse-align-5.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s

define <2 x i64> @bar(ptr %p) nounwind {
; CHECK-LABEL: bar:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movaps (%rdi), %xmm0
; CHECK-NEXT:    retq
  %t = load <2 x i64>, ptr %p
  ret <2 x i64> %t
}