llvm/llvm/test/CodeGen/X86/pr92720.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s

; Make sure we don't crash when shrinking the shift amount before legalization.
define i64 @pr92720(i64 %x) {
; CHECK-LABEL: pr92720:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movabsq $8589934592, %rax # imm = 0x200000000
; CHECK-NEXT:    retq
  %or = or i64 %x, 255
  %sub = sub i64 0, %or
  %shl = shl i64 1, %sub
  %sext = shl i64 %shl, 32
  ret i64 %sext
}