llvm/llvm/test/CodeGen/X86/pr38795-verifier-error-pr38788.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=i386-unknown-linux-gnu -verify-coalescing -run-pass=register-coalescer -o - %s | FileCheck %s

# Make sure no verifier error is produced from coalescing the identity
# copy in bb.3 with live out implicit_defs. The value is live out of
# the block, and the incoming value is a phi def.

---
name:            pr38795_verifier_error_reduced_1
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: pr38795_verifier_error_reduced_1
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $eax
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY $eax
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
  ; CHECK-NEXT:   JCC_1 %bb.3, 4, implicit undef $eflags
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.5(0x40000000), %bb.4(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   JCC_1 %bb.5, 4, implicit undef $eflags
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   successors: %bb.5(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY [[MOV32r0_]]
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.5:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY [[COPY]]
  ; CHECK-NEXT:   JMP_1 %bb.1
  bb.0:
    liveins: $eax
    %0:gr32 = COPY $eax

  bb.1:
    %1:gr32 = IMPLICIT_DEF
    JCC_1 %bb.3, 4, implicit undef $eflags

  bb.2:
    %0:gr32 = MOV32r0 implicit-def dead $eflags

  bb.3:
    %0:gr32 = COPY %0
    JCC_1 %bb.5, 4, implicit undef $eflags

  bb.4:
    %1:gr32 = COPY %0

  bb.5:
    %0:gr32 = COPY killed %1
    JMP_1 %bb.1

...

# Check for "Instruction ending live segment doesn't read the
# register" verifier error after coalescing
# This still failed with a similar error after a preliminary fix was
# attempted for pr38795_verifier_error_reduced_1

---
name:            pr38795_verifier_error_reduced_2
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: pr38795_verifier_error_reduced_2
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
  ; CHECK-NEXT:   JCC_1 %bb.3, 4, implicit killed undef $eflags
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.9(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   JMP_1 %bb.9
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.5(0x40000000), %bb.4(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   JCC_1 %bb.5, 5, implicit killed undef $eflags
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   successors: %bb.6(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
  ; CHECK-NEXT:   JMP_1 %bb.6
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.5:
  ; CHECK-NEXT:   successors: %bb.9(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
  ; CHECK-NEXT:   JMP_1 %bb.9
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.6:
  ; CHECK-NEXT:   successors: %bb.8(0x40000000), %bb.7(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   JCC_1 %bb.8, 4, implicit killed undef $eflags
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.7:
  ; CHECK-NEXT:   successors: %bb.8(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY [[DEF1]]
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.8:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY [[COPY]]
  ; CHECK-NEXT:   JMP_1 %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.9:
  ; CHECK-NEXT:   successors: %bb.6(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   JMP_1 %bb.6
  bb.0:
    %0:gr32 = IMPLICIT_DEF

  bb.1:
    %1:gr32 = IMPLICIT_DEF
    JCC_1 %bb.3, 4, implicit killed undef $eflags

  bb.2:
    %2:gr32 = COPY killed %0
    JMP_1 %bb.9

  bb.3:
    JCC_1 %bb.5, 5, implicit killed undef $eflags

  bb.4:
    %3:gr32 = MOV32r0 implicit-def dead $eflags
    JMP_1 %bb.6

  bb.5:
    %2:gr32 = IMPLICIT_DEF
    JMP_1 %bb.9

  bb.6:
    JCC_1 %bb.8, 4, implicit killed undef $eflags

  bb.7:
    %1:gr32 = COPY killed %3

  bb.8:
    %4:gr32 = COPY killed %1
    %0:gr32 = COPY killed %4
    JMP_1 %bb.1

  bb.9:
    %3:gr32 = COPY killed %2
    JMP_1 %bb.6

...

# Still failed after patch for first 2 failures

---
name:            pr38795_verifier_error_reduced_3
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: pr38795_verifier_error_reduced_3
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.5(0x40000000), %bb.1(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
  ; CHECK-NEXT:   JCC_1 %bb.5, 4, implicit killed undef $eflags
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.4(0x40000000), %bb.5(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY [[DEF]]
  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
  ; CHECK-NEXT:   JCC_1 %bb.4, 5, implicit killed undef $eflags
  ; CHECK-NEXT:   JMP_1 %bb.5
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.4(0x40000000), %bb.3(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   TEST32rr undef [[COPY]], [[COPY]], implicit-def $eflags
  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
  ; CHECK-NEXT:   JCC_1 %bb.4, 4, implicit killed undef $eflags
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.4(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY [[MOV32r0_]]
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gr32 = COPY [[COPY1]]
  ; CHECK-NEXT:   JMP_1 %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.5:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   JMP_1 %bb.2
  bb.0:
    %0:gr32 = IMPLICIT_DEF
    %1:gr32 = IMPLICIT_DEF
    JCC_1 %bb.5, 4, implicit killed undef $eflags

  bb.1:
    %2:gr32 = IMPLICIT_DEF
    %1:gr32 = COPY killed %0
    %0:gr32 = MOV32r0 implicit-def dead $eflags
    JCC_1 %bb.4, 5, implicit killed undef $eflags
    JMP_1 %bb.5

  bb.2:
    TEST32rr undef %1, %1, implicit-def $eflags
    %2:gr32 = IMPLICIT_DEF
    JCC_1 %bb.4, 4, implicit killed undef $eflags

  bb.3:
    %2:gr32 = COPY killed %0

  bb.4:
    %0:gr32 = COPY killed %2
    JMP_1 %bb.1

  bb.5:
    JMP_1 %bb.2

...