llvm/llvm/test/CodeGen/X86/pr90668.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s

define i64 @off(i8 signext %a) {
; CHECK-LABEL: off:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addb $-128, %dil
; CHECK-NEXT:    movzbl %dil, %eax
; CHECK-NEXT:    shll $3, %eax
; CHECK-NEXT:    retq
entry:
  %add = xor i8 %a, -128
  %conv2 = zext i8 %add to i64
  %mul = shl nuw nsw i64 %conv2, 3
  ret i64 %mul
}