llvm/llvm/test/CodeGen/X86/subreg-to-reg-3.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s

; Don't eliminate or coalesce away the explicit zero-extension!

define i64 @foo(i64 %a) {
; CHECK-LABEL: foo:
; CHECK:       # %bb.0:
; CHECK-NEXT:    imull $7823, %edi, %eax # imm = 0x1E8F
; CHECK-NEXT:    incq %rax
; CHECK-NEXT:    retq
  %b = mul i64 %a, 7823
  %c = and i64 %b, 4294967295
  %d = add i64 %c, 1
  ret i64 %d
}