# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
# CHECK: v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x00
# CHECK: v_add_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x03,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x03,0x01,0xe4,0x00,0x00
# CHECK: v_add_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x02,0xff,0xe4,0x00,0x00
# CHECK: v_add_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x02,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x02,0x01,0xe4,0x00,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x1b,0x00,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x40,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x41,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x42,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x43,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x30,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x34,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x38,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x3c,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x01,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x0f,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x11,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x1f,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x21,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x02,0x01,0x2f,0x01,0x00
# CHECK: v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x10
# CHECK: v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x30
# CHECK: v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xf0
# CHECK: v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x01
# CHECK: v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x03
# CHECK: v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x0f
# CHECK: v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x08,0x00
# CHECK: v_add_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x10,0x00
# CHECK: v_add_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x20,0x00
# CHECK: v_add_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x40,0x00
# CHECK: v_add_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x02,0x01,0xe4,0x80,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x00
# CHECK: v_sub_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x05,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x05,0x01,0xe4,0x00,0x00
# CHECK: v_sub_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x04,0xff,0xe4,0x00,0x00
# CHECK: v_sub_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x04,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x04,0x01,0xe4,0x00,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x42,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x43,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x30,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x34,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x38,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x3c,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0x00
# CHECK: v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x10
# CHECK: v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x30
# CHECK: v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0
# CHECK: v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x01
# CHECK: v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x03
# CHECK: v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f
# CHECK: v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x08,0x00
# CHECK: v_sub_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x10,0x00
# CHECK: v_sub_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x20,0x00
# CHECK: v_sub_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x40,0x00
# CHECK: v_sub_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x04,0x01,0xe4,0x80,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x07,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x07,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x06,0xff,0xe4,0x00,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x06,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x06,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x40,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x41,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x42,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x43,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x30,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x34,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x38,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x3c,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x01,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x0f,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x11,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x1f,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x21,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x06,0x01,0x2f,0x01,0x00
# CHECK: v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x10
# CHECK: v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x30
# CHECK: v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0xf0
# CHECK: v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x01
# CHECK: v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x03
# CHECK: v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x0f
# CHECK: v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x08,0x00
# CHECK: v_subrev_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x10,0x00
# CHECK: v_subrev_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x20,0x00
# CHECK: v_subrev_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x40,0x00
# CHECK: v_subrev_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x80,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x00
# CHECK: v_mul_legacy_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x09,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x09,0x01,0xe4,0x00,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x08,0xff,0xe4,0x00,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x08,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x08,0x01,0xe4,0x00,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x40,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x41,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x42,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x43,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x30,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x34,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x38,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x3c,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x01,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x0f,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x11,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x1f,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x21,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x08,0x01,0x2f,0x01,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x10
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x30
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0xf0
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x01
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x03
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x0f
# CHECK: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x08,0x00
# CHECK: v_mul_legacy_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x10,0x00
# CHECK: v_mul_legacy_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x20,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x40,0x00
# CHECK: v_mul_legacy_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x80,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x00
# CHECK: v_mul_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x0b,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x0b,0x01,0xe4,0x00,0x00
# CHECK: v_mul_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x0a,0xff,0xe4,0x00,0x00
# CHECK: v_mul_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x0a,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x0a,0x01,0xe4,0x00,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x40,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x41,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x42,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x43,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x30,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x34,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x38,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x3c,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x01,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x0f,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x11,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x1f,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x21,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0x2f,0x01,0x00
# CHECK: v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x10
# CHECK: v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x30
# CHECK: v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0xf0
# CHECK: v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x01
# CHECK: v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x03
# CHECK: v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x0f
# CHECK: v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x08,0x00
# CHECK: v_mul_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x10,0x00
# CHECK: v_mul_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x20,0x00
# CHECK: v_mul_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x40,0x00
# CHECK: v_mul_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x80,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x00
# CHECK: v_mul_i32_i24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x0d,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x0d,0x01,0xe4,0x00,0x00
# CHECK: v_mul_i32_i24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x0c,0xff,0xe4,0x00,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x0c,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x0c,0x01,0xe4,0x00,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x1b,0x00,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x40,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x41,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x42,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x43,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x30,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x34,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x38,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x3c,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x01,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x0f,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x11,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x1f,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x21,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0x2f,0x01,0x00
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x10
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x30
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0xf0
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x01
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x03
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x0f
# CHECK: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x08,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x00
# CHECK: v_mul_hi_i32_i24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x0f,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x0f,0x01,0xe4,0x00,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x0e,0xff,0xe4,0x00,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x0e,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x0e,0x01,0xe4,0x00,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x40,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x41,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x42,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x43,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x30,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x34,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x38,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x3c,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x01,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x0f,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x11,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x1f,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x21,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0x2f,0x01,0x00
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x10
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x30
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xf0
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x01
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x03
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x0f
# CHECK: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x08,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x00
# CHECK: v_mul_u32_u24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x11,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x11,0x01,0xe4,0x00,0x00
# CHECK: v_mul_u32_u24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x10,0xff,0xe4,0x00,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x10,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x10,0x01,0xe4,0x00,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x40,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x41,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x42,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x43,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x30,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x34,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x38,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x3c,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x01,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x0f,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x11,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x1f,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x21,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x10,0x01,0x2f,0x01,0x00
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x10
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x30
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0xf0
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x01
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x03
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x0f
# CHECK: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x10,0x01,0xe4,0x08,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x00
# CHECK: v_mul_hi_u32_u24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x13,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x13,0x01,0xe4,0x00,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x12,0xff,0xe4,0x00,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x12,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x12,0x01,0xe4,0x00,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x40,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x41,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x42,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x43,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x30,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x34,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x38,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x3c,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x01,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x0f,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x11,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x1f,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x21,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x12,0x01,0x2f,0x01,0x00
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x10
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x30
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0xf0
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x01
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x03
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x0f
# CHECK: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x12,0x01,0xe4,0x08,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x00
# CHECK: v_min_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x15,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x15,0x01,0xe4,0x00,0x00
# CHECK: v_min_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x14,0xff,0xe4,0x00,0x00
# CHECK: v_min_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x14,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x14,0x01,0xe4,0x00,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x40,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x41,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x42,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x43,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x30,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x34,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x38,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x3c,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x01,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x0f,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x11,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x1f,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x21,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x14,0x01,0x2f,0x01,0x00
# CHECK: v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x10
# CHECK: v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x30
# CHECK: v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0xf0
# CHECK: v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x01
# CHECK: v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x03
# CHECK: v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x0f
# CHECK: v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x08,0x00
# CHECK: v_min_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x10,0x00
# CHECK: v_min_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x20,0x00
# CHECK: v_min_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x40,0x00
# CHECK: v_min_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x14,0x01,0xe4,0x80,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x00
# CHECK: v_max_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x17,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x17,0x01,0xe4,0x00,0x00
# CHECK: v_max_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x16,0xff,0xe4,0x00,0x00
# CHECK: v_max_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x16,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x16,0x01,0xe4,0x00,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x40,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x41,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x42,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x43,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x30,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x34,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x38,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x3c,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x01,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x0f,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x11,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x1f,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x21,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x16,0x01,0x2f,0x01,0x00
# CHECK: v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x10
# CHECK: v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x30
# CHECK: v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0xf0
# CHECK: v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x01
# CHECK: v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x03
# CHECK: v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x0f
# CHECK: v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x08,0x00
# CHECK: v_max_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x10,0x00
# CHECK: v_max_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x20,0x00
# CHECK: v_max_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x40,0x00
# CHECK: v_max_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x16,0x01,0xe4,0x80,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x00
# CHECK: v_min_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x19,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x19,0x01,0xe4,0x00,0x00
# CHECK: v_min_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x18,0xff,0xe4,0x00,0x00
# CHECK: v_min_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x18,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x18,0x01,0xe4,0x00,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x40,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x41,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x42,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x43,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x30,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x34,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x38,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x3c,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x01,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x0f,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x11,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x1f,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x21,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x18,0x01,0x2f,0x01,0x00
# CHECK: v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x10
# CHECK: v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x30
# CHECK: v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0xf0
# CHECK: v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x01
# CHECK: v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x03
# CHECK: v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x0f
# CHECK: v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x18,0x01,0xe4,0x08,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x00
# CHECK: v_max_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x1b,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x1b,0x01,0xe4,0x00,0x00
# CHECK: v_max_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x1a,0xff,0xe4,0x00,0x00
# CHECK: v_max_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x1a,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x1a,0x01,0xe4,0x00,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x1b,0x00,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x40,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x41,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x42,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x43,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x30,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x34,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x38,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x3c,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x01,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x0f,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x11,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x1f,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x21,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0x2f,0x01,0x00
# CHECK: v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x10
# CHECK: v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x30
# CHECK: v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0
# CHECK: v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x01
# CHECK: v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x03
# CHECK: v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f
# CHECK: v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x08,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x00
# CHECK: v_min_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x1d,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x1d,0x01,0xe4,0x00,0x00
# CHECK: v_min_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x1c,0xff,0xe4,0x00,0x00
# CHECK: v_min_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x1c,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x1c,0x01,0xe4,0x00,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x1b,0x00,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x40,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x41,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x42,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x43,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x30,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x34,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x38,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x3c,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x01,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x0f,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x11,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x1f,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x21,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0x2f,0x01,0x00
# CHECK: v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x10
# CHECK: v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x30
# CHECK: v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0xf0
# CHECK: v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x01
# CHECK: v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x03
# CHECK: v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x0f
# CHECK: v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x08,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x00
# CHECK: v_max_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x1f,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x1f,0x01,0xe4,0x00,0x00
# CHECK: v_max_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x1e,0xff,0xe4,0x00,0x00
# CHECK: v_max_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x1e,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x1e,0x01,0xe4,0x00,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x40,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x41,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x42,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x43,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x30,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x34,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x38,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x3c,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x01,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x0f,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x11,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x1f,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x21,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0x2f,0x01,0x00
# CHECK: v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x10
# CHECK: v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x30
# CHECK: v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0xf0
# CHECK: v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x01
# CHECK: v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x03
# CHECK: v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x0f
# CHECK: v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x08,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x00
# CHECK: v_lshrrev_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x21,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x21,0x01,0xe4,0x00,0x00
# CHECK: v_lshrrev_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x20,0xff,0xe4,0x00,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x20,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x20,0x01,0xe4,0x00,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x40,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x41,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x42,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x43,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x30,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x34,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x38,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x3c,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x01,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x0f,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x11,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x1f,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x21,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x20,0x01,0x2f,0x01,0x00
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x10
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x30
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0xf0
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x01
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x03
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x0f
# CHECK: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x20,0x01,0xe4,0x08,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x00
# CHECK: v_ashrrev_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x23,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x23,0x01,0xe4,0x00,0x00
# CHECK: v_ashrrev_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x22,0xff,0xe4,0x00,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x22,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x22,0x01,0xe4,0x00,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x40,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x41,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x42,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x43,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x30,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x34,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x38,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x3c,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x01,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x0f,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x11,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x1f,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x21,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x22,0x01,0x2f,0x01,0x00
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x10
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x30
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0xf0
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x01
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x03
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x0f
# CHECK: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x22,0x01,0xe4,0x08,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x00
# CHECK: v_lshlrev_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x25,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x25,0x01,0xe4,0x00,0x00
# CHECK: v_lshlrev_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x24,0xff,0xe4,0x00,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x24,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x24,0x01,0xe4,0x00,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x40,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x41,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x42,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x43,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x30,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x34,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x38,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x3c,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x01,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x0f,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x11,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x1f,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x21,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x24,0x01,0x2f,0x01,0x00
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x10
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x30
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0xf0
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x01
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x03
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x0f
# CHECK: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x24,0x01,0xe4,0x08,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x00
# CHECK: v_and_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x27,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x27,0x01,0xe4,0x00,0x00
# CHECK: v_and_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x26,0xff,0xe4,0x00,0x00
# CHECK: v_and_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x26,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x26,0x01,0xe4,0x00,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x40,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x41,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x42,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x43,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x30,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x34,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x38,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x3c,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x01,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x0f,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x11,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x1f,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x21,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x26,0x01,0x2f,0x01,0x00
# CHECK: v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x10
# CHECK: v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x30
# CHECK: v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0xf0
# CHECK: v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x01
# CHECK: v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x03
# CHECK: v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x0f
# CHECK: v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x26,0x01,0xe4,0x08,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x00
# CHECK: v_or_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x29,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x29,0x01,0xe4,0x00,0x00
# CHECK: v_or_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x28,0xff,0xe4,0x00,0x00
# CHECK: v_or_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x28,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x28,0x01,0xe4,0x00,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x40,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x41,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x42,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x43,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x30,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x34,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x38,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x3c,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x01,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x0f,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x11,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x1f,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x21,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x28,0x01,0x2f,0x01,0x00
# CHECK: v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x10
# CHECK: v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x30
# CHECK: v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0xf0
# CHECK: v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x01
# CHECK: v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x03
# CHECK: v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x0f
# CHECK: v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x28,0x01,0xe4,0x08,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x00
# CHECK: v_xor_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x2b,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x2b,0x01,0xe4,0x00,0x00
# CHECK: v_xor_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x2a,0xff,0xe4,0x00,0x00
# CHECK: v_xor_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x2a,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x2a,0x01,0xe4,0x00,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x1b,0x00,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x40,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x41,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x42,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x43,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x30,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x34,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x38,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x3c,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x01,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x0f,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x11,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x1f,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x21,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0x2f,0x01,0x00
# CHECK: v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x10
# CHECK: v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x30
# CHECK: v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0xf0
# CHECK: v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x01
# CHECK: v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x03
# CHECK: v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x0f
# CHECK: v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x08,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x00
# CHECK: v_mac_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x2d,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x2d,0x01,0xe4,0x00,0x00
# CHECK: v_mac_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x2c,0xff,0xe4,0x00,0x00
# CHECK: v_mac_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x2c,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x2c,0x01,0xe4,0x00,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x00,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x40,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x41,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x42,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x43,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x30,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x34,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x38,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x3c,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x01,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x0f,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x11,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x1f,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x21,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0x2f,0x01,0x00
# CHECK: v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x10
# CHECK: v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x30
# CHECK: v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0xf0
# CHECK: v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x01
# CHECK: v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x03
# CHECK: v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x0f
# CHECK: v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x08,0x00
# CHECK: v_mac_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x10,0x00
# CHECK: v_mac_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x20,0x00
# CHECK: v_mac_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x40,0x00
# CHECK: v_mac_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x80,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00
# CHECK: v_add_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f
# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00
# CHECK: v_sub_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f
# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f
# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00
# CHECK: v_addc_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f
# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00
# CHECK: v_subb_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f
# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00
# CHECK: v_subbrev_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f
# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x00
# CHECK: v_add_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x3f,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x3f,0x01,0xe4,0x00,0x00
# CHECK: v_add_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x3e,0xff,0xe4,0x00,0x00
# CHECK: v_add_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x3e,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x3e,0x01,0xe4,0x00,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x40,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x41,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x42,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x43,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x30,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x34,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x38,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x3c,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x01,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x0f,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x11,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x1f,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x21,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0x2f,0x01,0x00
# CHECK: v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x10
# CHECK: v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x30
# CHECK: v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0
# CHECK: v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x01
# CHECK: v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x03
# CHECK: v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f
# CHECK: v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x08,0x00
# CHECK: v_add_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x10,0x00
# CHECK: v_add_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x20,0x00
# CHECK: v_add_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x40,0x00
# CHECK: v_add_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x80,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x00
# CHECK: v_sub_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x41,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x41,0x01,0xe4,0x00,0x00
# CHECK: v_sub_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x40,0xff,0xe4,0x00,0x00
# CHECK: v_sub_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x40,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x40,0x01,0xe4,0x00,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x42,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x43,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x30,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x34,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x38,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x3c,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0x00
# CHECK: v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x10
# CHECK: v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x30
# CHECK: v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0
# CHECK: v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x01
# CHECK: v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x03
# CHECK: v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f
# CHECK: v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x08,0x00
# CHECK: v_sub_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x10,0x00
# CHECK: v_sub_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x20,0x00
# CHECK: v_sub_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x40,0x00
# CHECK: v_sub_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x40,0x01,0xe4,0x80,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x43,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x43,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x42,0xff,0xe4,0x00,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x42,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x42,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x42,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x43,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x30,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x34,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x38,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x3c,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0x00
# CHECK: v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x10
# CHECK: v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x30
# CHECK: v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0
# CHECK: v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x01
# CHECK: v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x03
# CHECK: v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f
# CHECK: v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x08,0x00
# CHECK: v_subrev_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x10,0x00
# CHECK: v_subrev_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x20,0x00
# CHECK: v_subrev_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x40,0x00
# CHECK: v_subrev_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x42,0x01,0xe4,0x80,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x00
# CHECK: v_mul_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x45,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x45,0x01,0xe4,0x00,0x00
# CHECK: v_mul_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x44,0xff,0xe4,0x00,0x00
# CHECK: v_mul_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x44,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x44,0x01,0xe4,0x00,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x42,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x43,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x30,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x34,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x38,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x3c,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0x00
# CHECK: v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x10
# CHECK: v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x30
# CHECK: v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0
# CHECK: v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x01
# CHECK: v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x03
# CHECK: v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f
# CHECK: v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x08,0x00
# CHECK: v_mul_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x10,0x00
# CHECK: v_mul_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x20,0x00
# CHECK: v_mul_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x40,0x00
# CHECK: v_mul_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x44,0x01,0xe4,0x80,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x00
# CHECK: v_mac_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x47,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x47,0x01,0xe4,0x00,0x00
# CHECK: v_mac_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x46,0xff,0xe4,0x00,0x00
# CHECK: v_mac_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x46,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x46,0x01,0xe4,0x00,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x1b,0x00,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x40,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x41,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x42,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x43,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x30,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x34,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x38,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x3c,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x01,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x0f,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x11,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x1f,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x21,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x46,0x01,0x2f,0x01,0x00
# CHECK: v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x10
# CHECK: v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x30
# CHECK: v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0
# CHECK: v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x01
# CHECK: v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x03
# CHECK: v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f
# CHECK: v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x08,0x00
# CHECK: v_mac_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x10,0x00
# CHECK: v_mac_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x20,0x00
# CHECK: v_mac_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x40,0x00
# CHECK: v_mac_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x46,0x01,0xe4,0x80,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x00
# CHECK: v_add_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x4d,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x4d,0x01,0xe4,0x00,0x00
# CHECK: v_add_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x4c,0xff,0xe4,0x00,0x00
# CHECK: v_add_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x4c,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x4c,0x01,0xe4,0x00,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x00,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x41,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x42,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x43,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x30,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x34,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x38,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x3c,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x01,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x0f,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x11,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x1f,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x21,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0x2f,0x01,0x00
# CHECK: v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x10
# CHECK: v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x30
# CHECK: v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0
# CHECK: v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x01
# CHECK: v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x03
# CHECK: v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f
# CHECK: v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x08,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x00
# CHECK: v_sub_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x4f,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x4f,0x01,0xe4,0x00,0x00
# CHECK: v_sub_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x4e,0xff,0xe4,0x00,0x00
# CHECK: v_sub_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x4e,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x4e,0x01,0xe4,0x00,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x00,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x40,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x41,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x42,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x43,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x30,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x34,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x38,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x3c,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x01,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x0f,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x11,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x21,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0x2f,0x01,0x00
# CHECK: v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x10
# CHECK: v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x30
# CHECK: v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0
# CHECK: v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x01
# CHECK: v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x03
# CHECK: v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f
# CHECK: v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x08,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x51,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x51,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x50,0xff,0xe4,0x00,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x50,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x50,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x40,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x41,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x42,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x43,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x30,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x34,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x38,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x3c,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x01,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x0f,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x11,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x1f,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x21,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x50,0x01,0x2f,0x01,0x00
# CHECK: v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x10
# CHECK: v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x30
# CHECK: v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0
# CHECK: v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x01
# CHECK: v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x03
# CHECK: v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f
# CHECK: v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x50,0x01,0xe4,0x08,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x00
# CHECK: v_mul_lo_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x53,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x53,0x01,0xe4,0x00,0x00
# CHECK: v_mul_lo_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x52,0xff,0xe4,0x00,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x52,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x52,0x01,0xe4,0x00,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x40,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x41,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x42,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x43,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x30,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x34,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x38,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x3c,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x01,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x0f,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x11,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x1f,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x21,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x52,0x01,0x2f,0x01,0x00
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x10
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x30
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x01
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x03
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f
# CHECK: v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x52,0x01,0xe4,0x08,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x00
# CHECK: v_lshlrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x55,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x55,0x01,0xe4,0x00,0x00
# CHECK: v_lshlrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x54,0xff,0xe4,0x00,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x54,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x54,0x01,0xe4,0x00,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x40,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x41,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x42,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x43,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x30,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x34,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x38,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x3c,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x01,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x0f,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x11,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x1f,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x21,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x54,0x01,0x2f,0x01,0x00
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x10
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x30
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x01
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x03
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f
# CHECK: v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x54,0x01,0xe4,0x08,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x00
# CHECK: v_lshrrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x57,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x57,0x01,0xe4,0x00,0x00
# CHECK: v_lshrrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x56,0xff,0xe4,0x00,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x56,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x56,0x01,0xe4,0x00,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x40,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x41,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x42,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x43,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x30,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x34,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x38,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x3c,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x01,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x0f,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x11,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x1f,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x21,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x56,0x01,0x2f,0x01,0x00
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x10
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x30
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x01
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x03
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f
# CHECK: v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x56,0x01,0xe4,0x08,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x00
# CHECK: v_ashrrev_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x59,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x59,0x01,0xe4,0x00,0x00
# CHECK: v_ashrrev_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x58,0xff,0xe4,0x00,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x58,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x58,0x01,0xe4,0x00,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x1b,0x00,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x40,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x41,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x42,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x43,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x30,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x34,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x38,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x3c,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x01,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x0f,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x11,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x1f,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x21,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x58,0x01,0x2f,0x01,0x00
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x10
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x30
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x01
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x03
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f
# CHECK: v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x58,0x01,0xe4,0x08,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x00
# CHECK: v_max_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x5b,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x5b,0x01,0xe4,0x00,0x00
# CHECK: v_max_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x5a,0xff,0xe4,0x00,0x00
# CHECK: v_max_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x5a,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x5a,0x01,0xe4,0x00,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x1b,0x00,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x40,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x41,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x42,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x43,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x30,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x34,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x38,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x3c,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x01,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x0f,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x11,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x1f,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x21,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0x2f,0x01,0x00
# CHECK: v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x10
# CHECK: v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x30
# CHECK: v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0
# CHECK: v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x01
# CHECK: v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x03
# CHECK: v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f
# CHECK: v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x08,0x00
# CHECK: v_max_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x10,0x00
# CHECK: v_max_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x20,0x00
# CHECK: v_max_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x40,0x00
# CHECK: v_max_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x80,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x00
# CHECK: v_min_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x5d,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x5d,0x01,0xe4,0x00,0x00
# CHECK: v_min_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x5c,0xff,0xe4,0x00,0x00
# CHECK: v_min_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x5c,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x5c,0x01,0xe4,0x00,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x1b,0x00,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x40,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x41,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x42,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x43,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x30,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x34,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x38,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x3c,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x01,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x0f,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x11,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x1f,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x21,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0x2f,0x01,0x00
# CHECK: v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x10
# CHECK: v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x30
# CHECK: v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0
# CHECK: v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x01
# CHECK: v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x03
# CHECK: v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f
# CHECK: v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x08,0x00
# CHECK: v_min_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x10,0x00
# CHECK: v_min_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x20,0x00
# CHECK: v_min_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x40,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x40,0x00
# CHECK: v_min_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x80,0x00]
0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x80,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x00
# CHECK: v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x5f,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x5f,0x01,0xe4,0x00,0x00
# CHECK: v_max_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x5e,0xff,0xe4,0x00,0x00
# CHECK: v_max_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x5e,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x5e,0x01,0xe4,0x00,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x1b,0x00,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x40,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x41,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x42,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x43,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x30,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x34,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x38,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x3c,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x01,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x0f,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x11,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x1f,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x21,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0x2f,0x01,0x00
# CHECK: v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x10
# CHECK: v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x30
# CHECK: v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0
# CHECK: v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x01
# CHECK: v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x03
# CHECK: v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f
# CHECK: v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x08,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x00
# CHECK: v_max_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x61,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x61,0x01,0xe4,0x00,0x00
# CHECK: v_max_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x60,0xff,0xe4,0x00,0x00
# CHECK: v_max_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x60,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x60,0x01,0xe4,0x00,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x1b,0x00,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x40,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x41,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x42,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x43,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x30,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x34,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x38,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x3c,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x01,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x0f,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x11,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x1f,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x21,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x60,0x01,0x2f,0x01,0x00
# CHECK: v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x10
# CHECK: v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x30
# CHECK: v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0
# CHECK: v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x01
# CHECK: v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x03
# CHECK: v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f
# CHECK: v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x60,0x01,0xe4,0x08,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x00
# CHECK: v_min_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x63,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x63,0x01,0xe4,0x00,0x00
# CHECK: v_min_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x62,0xff,0xe4,0x00,0x00
# CHECK: v_min_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x62,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x62,0x01,0xe4,0x00,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x1b,0x00,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x40,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x41,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x42,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x43,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x30,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x34,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x38,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x3c,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x01,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x0f,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x11,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x1f,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x21,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x62,0x01,0x2f,0x01,0x00
# CHECK: v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x10
# CHECK: v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x30
# CHECK: v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0
# CHECK: v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x01
# CHECK: v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x03
# CHECK: v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f
# CHECK: v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x62,0x01,0xe4,0x08,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x00
# CHECK: v_min_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x65,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x65,0x01,0xe4,0x00,0x00
# CHECK: v_min_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x64,0xff,0xe4,0x00,0x00
# CHECK: v_min_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x64,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x64,0x01,0xe4,0x00,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x40,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x41,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x42,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x43,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x30,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x34,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x38,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x3c,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x01,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x0f,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x11,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x1f,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x21,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x64,0x01,0x2f,0x01,0x00
# CHECK: v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x10
# CHECK: v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x30
# CHECK: v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0
# CHECK: v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x01
# CHECK: v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x03
# CHECK: v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f
# CHECK: v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x64,0x01,0xe4,0x08,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x00
# CHECK: v_ldexp_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x67,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x67,0x01,0xe4,0x00,0x00
# CHECK: v_ldexp_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x66,0xff,0xe4,0x00,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x66,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x66,0x01,0xe4,0x00,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x40,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x41,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x42,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x43,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x30,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x34,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x38,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x3c,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x01,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x0f,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x11,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x1f,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x21,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x66,0x01,0x2f,0x01,0x00
# CHECK: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x10
# CHECK: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x30
# CHECK: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0
# CHECK: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x01
# CHECK: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x03
# CHECK: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f
# CHECK: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x66,0x01,0xe4,0x08,0x00
# CHECK: v_ldexp_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x10,0x00]
0xfa,0x04,0x0a,0x66,0x01,0xe4,0x10,0x00
# CHECK: v_ldexp_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x66,0x01,0xe4,0x20,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x00
# CHECK: v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x69,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x69,0x01,0xe4,0x00,0x00
# CHECK: v_add_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x68,0xff,0xe4,0x00,0x00
# CHECK: v_add_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x68,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x68,0x01,0xe4,0x00,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x40,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x41,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x42,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x43,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x30,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x34,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x38,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x3c,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x01,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x0f,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x11,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x1f,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x21,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x68,0x01,0x2f,0x01,0x00
# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x10
# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x30
# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xf0
# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x01
# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x03
# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x0f
# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x68,0x01,0xe4,0x08,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x00
# CHECK: v_sub_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x6b,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x6b,0x01,0xe4,0x00,0x00
# CHECK: v_sub_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x6a,0xff,0xe4,0x00,0x00
# CHECK: v_sub_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x6a,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x6a,0x01,0xe4,0x00,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x40,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x41,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x42,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x43,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x30,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x34,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x38,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x3c,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x01,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x0f,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x11,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x1f,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x21,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0x2f,0x01,0x00
# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x10
# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x30
# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xf0
# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x01
# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x03
# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x0f
# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x08,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x6d,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x6d,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x6c,0xff,0xe4,0x00,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x6c,0x01,0xe4,0x00,0x00]
0xfa,0xfe,0x0b,0x6c,0x01,0xe4,0x00,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x40,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x40,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x41,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x41,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x42,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x42,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x43,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x43,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x30,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x30,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x34,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x34,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x38,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x38,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x3c,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x3c,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x01,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x01,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x0f,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x0f,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x11,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x11,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1f,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x1f,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x21,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x21,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x2f,0x01,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0x2f,0x01,0x00
# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x10]
0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x10
# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x30]
0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x30
# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xf0]
0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xf0
# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x01]
0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x01
# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x03]
0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x03
# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x0f]
0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x0f
# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x08,0x00]
0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x08,0x00
# CHECK: v_cndmask_b32_dpp v5, -v1, |v2|, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x90,0xff]
0xfa,0x04,0x0a,0x00,0x01,0xe4,0x90,0xff
# CHECK: v_cndmask_b32_dpp v5, |v1|, -v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x60,0xff]
0xfa,0x04,0x0a,0x00,0x01,0xe4,0x60,0xff
# CHECK: v_cndmask_b32_dpp v5, -|v1|, -|v2|, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0xf0,0xff]
0xfa,0x04,0x0a,0x00,0x01,0xe4,0xf0,0xff
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