llvm/llvm/test/MC/Disassembler/AArch64/armv8.4a-virt.txt

# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.4a --disassemble < %s | FileCheck %s --check-prefixes=CHECK,V8A
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r --disassemble < %s | FileCheck %s --check-prefixes=CHECK,V8R

0x40,0x26,0x1c,0xd5
0x40,0x26,0x3c,0xd5
0x00,0x26,0x1c,0xd5
0x00,0x26,0x3c,0xd5
0x2c,0x13,0x1c,0xd5
0x2c,0x13,0x3c,0xd5
0x00,0xe4,0x1c,0xd5
0x00,0xe4,0x3c,0xd5
0x40,0xe4,0x1c,0xd5
0x40,0xe4,0x3c,0xd5
0x20,0xe4,0x1c,0xd5
0x20,0xe4,0x3c,0xd5
0x00,0xe5,0x1c,0xd5
0x00,0xe5,0x3c,0xd5
0x40,0xe5,0x1c,0xd5
0x40,0xe5,0x3c,0xd5
0x20,0xe5,0x1c,0xd5
0x20,0xe5,0x3c,0xd5

#CHECK:   msr   VSTCR_EL2, x0
#CHECK:   mrs   x0, VSTCR_EL2

#V8A:     msr   VSTTBR_EL2, x0
#V8A:     mrs   x0, VSTTBR_EL2

#V8R:     msr   S3_4_C2_C6_0, x0
#V8R:     mrs   x0, S3_4_C2_C6_0

#CHECK:   msr   SDER32_EL2, x12
#CHECK:   mrs   x12, SDER32_EL2
#CHECK:   msr   CNTHVS_TVAL_EL2, x0
#CHECK:   mrs   x0, CNTHVS_TVAL_EL2
#CHECK:   msr   CNTHVS_CVAL_EL2, x0
#CHECK:   mrs   x0, CNTHVS_CVAL_EL2
#CHECK:   msr   CNTHVS_CTL_EL2, x0
#CHECK:   mrs   x0, CNTHVS_CTL_EL2
#CHECK:   msr   CNTHPS_TVAL_EL2, x0
#CHECK:   mrs   x0, CNTHPS_TVAL_EL2
#CHECK:   msr   CNTHPS_CVAL_EL2, x0
#CHECK:   mrs   x0, CNTHPS_CVAL_EL2
#CHECK:   msr   CNTHPS_CTL_EL2, x0
#CHECK:   mrs   x0, CNTHPS_CTL_EL2