llvm/llvm/test/MC/Disassembler/AArch64/armv9-sysreg128.txt

# RUN: llvm-mc -triple aarch64 -mattr=+d128                   --disassemble -show-encoding %s -o - | FileCheck %s --check-prefix=WITHOUT
# RUN: llvm-mc -triple aarch64 -mattr=+d128,+the,+el2vmsa,+vh --disassemble -show-encoding %s -o - | FileCheck %s --check-prefix=W_FEATS

# RUN: llvm-mc -triple aarch64 --disassemble -show-encoding %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR-NO-D128

0x00,0x20,0x78,0xd5
0x20,0x20,0x78,0xd5
0x00,0x74,0x78,0xd5
0x60,0xd0,0x78,0xd5
0xc0,0xd0,0x78,0xd5
0x00,0x20,0x7c,0xd5
0x20,0x20,0x7c,0xd5
0x00,0x21,0x7c,0xd5
0x00,0x21,0x7c,0xd5
0x02,0x21,0x7c,0xd5
0x04,0x21,0x7c,0xd5
0x06,0x21,0x7c,0xd5
0x08,0x21,0x7c,0xd5
0x0a,0x21,0x7c,0xd5
0x0c,0x21,0x7c,0xd5
0x0e,0x21,0x7c,0xd5
0x10,0x21,0x7c,0xd5
0x12,0x21,0x7c,0xd5
0x14,0x21,0x7c,0xd5
0x16,0x21,0x7c,0xd5
0x18,0x21,0x7c,0xd5
0x1a,0x21,0x7c,0xd5

# WITHOUT: mrrs	x0, x1, TTBR0_EL1               // encoding: [0x00,0x20,0x78,0xd5]
# WITHOUT: mrrs	x0, x1, TTBR1_EL1               // encoding: [0x20,0x20,0x78,0xd5]
# WITHOUT: mrrs	x0, x1, PAR_EL1                 // encoding: [0x00,0x74,0x78,0xd5]
# WITHOUT: mrrs	x0, x1, S3_0_C13_C0_3           // encoding: [0x60,0xd0,0x78,0xd5]
# WITHOUT: mrrs	x0, x1, S3_0_C13_C0_6           // encoding: [0xc0,0xd0,0x78,0xd5]
# WITHOUT: mrrs	x0, x1, S3_4_C2_C0_0            // encoding: [0x00,0x20,0x7c,0xd5]
# WITHOUT: mrrs	x0, x1, S3_4_C2_C0_1            // encoding: [0x20,0x20,0x7c,0xd5]
# WITHOUT: mrrs	x0, x1, S3_4_C2_C1_0            // encoding: [0x00,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x0, x1, S3_4_C2_C1_0            // encoding: [0x00,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x2, x3, S3_4_C2_C1_0            // encoding: [0x02,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x4, x5, S3_4_C2_C1_0            // encoding: [0x04,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x6, x7, S3_4_C2_C1_0            // encoding: [0x06,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x8, x9, S3_4_C2_C1_0            // encoding: [0x08,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x10, x11, S3_4_C2_C1_0          // encoding: [0x0a,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x12, x13, S3_4_C2_C1_0          // encoding: [0x0c,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x14, x15, S3_4_C2_C1_0          // encoding: [0x0e,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x16, x17, S3_4_C2_C1_0          // encoding: [0x10,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x18, x19, S3_4_C2_C1_0          // encoding: [0x12,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x20, x21, S3_4_C2_C1_0          // encoding: [0x14,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x22, x23, S3_4_C2_C1_0          // encoding: [0x16,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x24, x25, S3_4_C2_C1_0          // encoding: [0x18,0x21,0x7c,0xd5]
# WITHOUT: mrrs	x26, x27, S3_4_C2_C1_0          // encoding: [0x1a,0x21,0x7c,0xd5]

# W_FEATS: mrrs	x0, x1, TTBR0_EL1               // encoding: [0x00,0x20,0x78,0xd5]
# W_FEATS: mrrs	x0, x1, TTBR1_EL1               // encoding: [0x20,0x20,0x78,0xd5]
# W_FEATS: mrrs	x0, x1, PAR_EL1                 // encoding: [0x00,0x74,0x78,0xd5]
# W_FEATS: mrrs	x0, x1, RCWSMASK_EL1            // encoding: [0x60,0xd0,0x78,0xd5]
# W_FEATS: mrrs	x0, x1, RCWMASK_EL1             // encoding: [0xc0,0xd0,0x78,0xd5]
# W_FEATS: mrrs	x0, x1, TTBR0_EL2               // encoding: [0x00,0x20,0x7c,0xd5]
# W_FEATS: mrrs	x0, x1, TTBR1_EL2               // encoding: [0x20,0x20,0x7c,0xd5]
# W_FEATS: mrrs	x0, x1, VTTBR_EL2               // encoding: [0x00,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x0, x1, VTTBR_EL2               // encoding: [0x00,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x2, x3, VTTBR_EL2               // encoding: [0x02,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x4, x5, VTTBR_EL2               // encoding: [0x04,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x6, x7, VTTBR_EL2               // encoding: [0x06,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x8, x9, VTTBR_EL2               // encoding: [0x08,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x10, x11, VTTBR_EL2             // encoding: [0x0a,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x12, x13, VTTBR_EL2             // encoding: [0x0c,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x14, x15, VTTBR_EL2             // encoding: [0x0e,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x16, x17, VTTBR_EL2             // encoding: [0x10,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x18, x19, VTTBR_EL2             // encoding: [0x12,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x20, x21, VTTBR_EL2             // encoding: [0x14,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x22, x23, VTTBR_EL2             // encoding: [0x16,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x24, x25, VTTBR_EL2             // encoding: [0x18,0x21,0x7c,0xd5]
# W_FEATS: mrrs	x26, x27, VTTBR_EL2             // encoding: [0x1a,0x21,0x7c,0xd5]

# ERROR-NO-D128: warning: invalid instruction encoding


0x00,0x20,0x58,0xd5
0x20,0x20,0x58,0xd5
0x00,0x74,0x58,0xd5
0x60,0xd0,0x58,0xd5
0xc0,0xd0,0x58,0xd5
0x00,0x20,0x5c,0xd5
0x20,0x20,0x5c,0xd5
0x00,0x21,0x5c,0xd5
0x00,0x21,0x5c,0xd5
0x02,0x21,0x5c,0xd5
0x04,0x21,0x5c,0xd5
0x06,0x21,0x5c,0xd5
0x08,0x21,0x5c,0xd5
0x0a,0x21,0x5c,0xd5
0x0c,0x21,0x5c,0xd5
0x0e,0x21,0x5c,0xd5
0x10,0x21,0x5c,0xd5
0x12,0x21,0x5c,0xd5
0x14,0x21,0x5c,0xd5
0x16,0x21,0x5c,0xd5
0x18,0x21,0x5c,0xd5
0x1a,0x21,0x5c,0xd5

# WITHOUT: msrr	TTBR0_EL1, x0, x1               // encoding: [0x00,0x20,0x58,0xd5]
# WITHOUT: msrr	TTBR1_EL1, x0, x1               // encoding: [0x20,0x20,0x58,0xd5]
# WITHOUT: msrr	PAR_EL1, x0, x1                 // encoding: [0x00,0x74,0x58,0xd5]
# WITHOUT: msrr	S3_0_C13_C0_3, x0, x1           // encoding: [0x60,0xd0,0x58,0xd5]
# WITHOUT: msrr	S3_0_C13_C0_6, x0, x1           // encoding: [0xc0,0xd0,0x58,0xd5]
# WITHOUT: msrr	S3_4_C2_C0_0, x0, x1            // encoding: [0x00,0x20,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C0_1, x0, x1            // encoding: [0x20,0x20,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x0, x1            // encoding: [0x00,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x0, x1            // encoding: [0x00,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x2, x3            // encoding: [0x02,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x4, x5            // encoding: [0x04,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x6, x7            // encoding: [0x06,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x8, x9            // encoding: [0x08,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x10, x11          // encoding: [0x0a,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x12, x13          // encoding: [0x0c,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x14, x15          // encoding: [0x0e,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x16, x17          // encoding: [0x10,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x18, x19          // encoding: [0x12,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x20, x21          // encoding: [0x14,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x22, x23          // encoding: [0x16,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x24, x25          // encoding: [0x18,0x21,0x5c,0xd5]
# WITHOUT: msrr	S3_4_C2_C1_0, x26, x27          // encoding: [0x1a,0x21,0x5c,0xd5]

# W_FEATS: msrr	TTBR0_EL1, x0, x1               // encoding: [0x00,0x20,0x58,0xd5]
# W_FEATS: msrr	TTBR1_EL1, x0, x1               // encoding: [0x20,0x20,0x58,0xd5]
# W_FEATS: msrr	PAR_EL1, x0, x1                 // encoding: [0x00,0x74,0x58,0xd5]
# W_FEATS: msrr	RCWSMASK_EL1, x0, x1            // encoding: [0x60,0xd0,0x58,0xd5]
# W_FEATS: msrr	RCWMASK_EL1, x0, x1             // encoding: [0xc0,0xd0,0x58,0xd5]
# W_FEATS: msrr	TTBR0_EL2, x0, x1               // encoding: [0x00,0x20,0x5c,0xd5]
# W_FEATS: msrr	TTBR1_EL2, x0, x1               // encoding: [0x20,0x20,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x0, x1               // encoding: [0x00,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x0, x1               // encoding: [0x00,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x2, x3               // encoding: [0x02,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x4, x5               // encoding: [0x04,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x6, x7               // encoding: [0x06,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x8, x9               // encoding: [0x08,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x10, x11             // encoding: [0x0a,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x12, x13             // encoding: [0x0c,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x14, x15             // encoding: [0x0e,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x16, x17             // encoding: [0x10,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x18, x19             // encoding: [0x12,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x20, x21             // encoding: [0x14,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x22, x23             // encoding: [0x16,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x24, x25             // encoding: [0x18,0x21,0x5c,0xd5]
# W_FEATS: msrr	VTTBR_EL2, x26, x27             // encoding: [0x1a,0x21,0x5c,0xd5]

# ERROR-NO-D128: warning: invalid instruction encoding