llvm/llvm/test/MC/Disassembler/AArch64/armv8.7a-ls64.txt

# RUN: not llvm-mc -triple=aarch64 -mattr=+ls64 -disassemble %s 2> %t | FileCheck %s
# RUN: FileCheck --check-prefix=CHECK-ERR %s < %t
# RUN: not llvm-mc -triple=aarch64 -disassemble %s 2> %t | FileCheck --check-prefix=CHECK-NO-LS64 %s
# RUN: FileCheck --check-prefix=CHECK-ERR --check-prefix=CHECK-NO-LS64-ERR %s < %t

[0xa0,0xd1,0x3f,0xf8]
[0xae,0x91,0x3f,0xf8]
[0xb4,0xb1,0x21,0xf8]
[0xb6,0xa1,0x21,0xf8]
# CHECK: ld64b x0, [x13]
# CHECK: st64b x14, [x13]
# CHECK: st64bv x1, x20, [x13]
# CHECK: st64bv0 x1, x22, [x13]
# CHECK-NO-LS64-ERR: [[@LINE-8]]:2: warning: invalid instruction encoding
# CHECK-NO-LS64-ERR: [[@LINE-8]]:2: warning: invalid instruction encoding
# CHECK-NO-LS64-ERR: [[@LINE-8]]:2: warning: invalid instruction encoding
# CHECK-NO-LS64-ERR: [[@LINE-8]]:2: warning: invalid instruction encoding

[0xe0,0xd3,0x3f,0xf8]
[0xee,0x93,0x3f,0xf8]
[0xf4,0xb3,0x21,0xf8]
[0xf6,0xa3,0x21,0xf8]
# CHECK: ld64b x0, [sp]
# CHECK: st64b x14, [sp]
# CHECK: st64bv x1, x20, [sp]
# CHECK: st64bv0 x1, x22, [sp]

[0xb3,0xd1,0x3f,0xf8]
[0xb8,0xd1,0x3f,0xf8]
# CHECK-ERR: [[@LINE-2]]:2: warning: invalid instruction encoding
# CHECK-ERR: [[@LINE-2]]:2: warning: invalid instruction encoding

[0xa0,0xd0,0x38,0xd5]
[0xa0,0xd0,0x18,0xd5]
# CHECK: mrs x0, ACCDATA_EL1
# CHECK: msr ACCDATA_EL1, x0
# CHECK-NO-LS64: mrs x0, S3_0_C13_C0_5
# CHECK-NO-LS64: msr S3_0_C13_C0_5, x0