llvm/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64-el.txt

# RUN: llvm-mc --disassemble -triple=mipsel -mcpu=mips32r2 -mattr=+fp64 %s | \
# RUN: FileCheck %s

0x04 0x60 0x00 0x46 # CHECK: sqrt.s  $f0, $f12
0x05 0x60 0x00 0x46 # CHECK: abs.s  $f0, $f12
0x04 0x60 0x20 0x46 # CHECK: sqrt.d  $f0, $f12
0x05 0x60 0x20 0x46 # CHECK: abs.d  $f0, $f12
0x00 0x10 0x24 0x46 # CHECK: add.d $f0, $f2, $f4
0x01 0x10 0x24 0x46 # CHECK: sub.d $f0, $f2, $f4
0x02 0x10 0x24 0x46 # CHECK: mul.d $f0, $f2, $f4
0x03 0x10 0x24 0x46 # CHECK: div.d $f0, $f2, $f4
0x06 0x10 0x20 0x46 # CHECK: mov.d $f0, $f2
0x07 0x10 0x20 0x46 # CHECK: neg.d $f0, $f2
0x24 0x10 0x20 0x46 # CHECK: cvt.w.d $f0, $f2
0x21 0x10 0x00 0x46 # CHECK: cvt.d.s $f0, $f2
0x21 0x10 0x80 0x46 # CHECK: cvt.d.w $f0, $f2
0x20 0x10 0x20 0x46 # CHECK: cvt.s.d $f0, $f2
0x21 0x81 0xa0 0x46 # CHECK: cvt.d.l $f4, $f16
0xe0 0xf3 0xa0 0x46 # CHECK: cvt.s.l $f15, $f30
0xa0 0xd3 0xc0 0x46 # CHECK: cvt.s.pu $f14, $f26
0xa6 0x90 0x14 0x46 # CHECK: cvt.ps.s $f2, $f18, $f20
0xa8 0x17 0xc0 0x46 # CHECK: cvt.s.pl $f30, $f2
0x2c 0x46 0xde 0x46 # CHECK: pll.ps $f24, $f8, $f30
0x2d 0xd0 0xdc 0x46 # CHECK: plu.ps $f0, $f26, $f28
0x00 0x00 0xe4 0x44 # CHECK: mthc1 $4, $f0
0x00 0x00 0x64 0x44 # CHECK: mfhc1 $4, $f0
0x00 0x71 0xda 0x46 # CHECK: add.ps $f4, $f14, $f26
0x02 0x71 0xda 0x46 # CHECK: mul.ps $f4, $f14, $f26
0x01 0x71 0xda 0x46 # CHECK: sub.ps $f4, $f14, $f26