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llvm/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp 

//===-- EmulateInstructionARM64.cpp ---------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#include "EmulateInstructionARM64.h"

#include "lldb/Core/Address.h"
#include "lldb/Core/PluginManager.h"
#include "lldb/Symbol/UnwindPlan.h"
#include "lldb/Utility/ArchSpec.h"
#include "lldb/Utility/RegisterValue.h"
#include "lldb/Utility/Stream.h"

#include "llvm/Support/CheckedArithmetic.h"

#include "Plugins/Process/Utility/ARMDefines.h"
#include "Plugins/Process/Utility/ARMUtils.h"
#include "Plugins/Process/Utility/lldb-arm64-register-enums.h"

#include <algorithm>
#include <cstdlib>
#include <optional>

#define GPR_OFFSET(idx) …
#define GPR_OFFSET_NAME(reg) …
#define FPU_OFFSET(idx) …
#define FPU_OFFSET_NAME(reg) …
#define EXC_OFFSET_NAME(reg) …
#define DBG_OFFSET_NAME(reg) …
#define DBG_OFFSET_NAME(reg) …
#define DEFINE_DBG(re, y) …

#define DECLARE_REGISTER_INFOS_ARM64_STRUCT

#include "Plugins/Process/Utility/RegisterInfos_arm64.h"

#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/MathExtras.h"

#include "Plugins/Process/Utility/InstructionUtils.h"

usingnamespacelldb;
usingnamespacelldb_private;

LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionARM64, InstructionARM64)

static std::optional<RegisterInfo> LLDBTableGetRegisterInfo(uint32_t reg_num) { … }

#define No_VFP …
#define VFPv1 …
#define VFPv2 …
#define VFPv3 …
#define AdvancedSIMD …

#define VFPv1_ABOVE …
#define VFPv2_ABOVE …
#define VFPv2v3 …

#define UInt(x) …
#define SInt(x) …
#define bit …
#define boolean …
#define integer …

static inline bool IsZero(uint64_t x) { … }

static inline uint64_t NOT(uint64_t x) { … }

// LSL()
// =====

static inline uint64_t LSL(uint64_t x, integer shift) { … }

// ConstrainUnpredictable()
// ========================

EmulateInstructionARM64::ConstraintType
ConstrainUnpredictable(EmulateInstructionARM64::Unpredictable which) { … }

//
// EmulateInstructionARM implementation
//

void EmulateInstructionARM64::Initialize() { … }

void EmulateInstructionARM64::Terminate() { … }

llvm::StringRef EmulateInstructionARM64::GetPluginDescriptionStatic() { … }

EmulateInstruction *
EmulateInstructionARM64::CreateInstance(const ArchSpec &arch,
                                        InstructionType inst_type) { … }

bool EmulateInstructionARM64::SetTargetTriple(const ArchSpec &arch) { … }

std::optional<RegisterInfo>
EmulateInstructionARM64::GetRegisterInfo(RegisterKind reg_kind,
                                         uint32_t reg_num) { … }

EmulateInstructionARM64::Opcode *
EmulateInstructionARM64::GetOpcodeForInstruction(const uint32_t opcode) { … }

bool EmulateInstructionARM64::ReadInstruction() { … }

bool EmulateInstructionARM64::EvaluateInstruction(uint32_t evaluate_options) { … }

bool EmulateInstructionARM64::CreateFunctionEntryUnwind(
    UnwindPlan &unwind_plan) { … }

uint32_t EmulateInstructionARM64::GetFramePointerRegisterNumber() const { … }

bool EmulateInstructionARM64::UsingAArch32() { … }

bool EmulateInstructionARM64::BranchTo(const Context &context, uint32_t N,
                                       addr_t target) { … }

bool EmulateInstructionARM64::ConditionHolds(const uint32_t cond) { … }

uint64_t EmulateInstructionARM64::
AddWithCarry(uint32_t N, uint64_t x, uint64_t y, bit carry_in,
             EmulateInstructionARM64::ProcState &proc_state) { … }

bool EmulateInstructionARM64::EmulateADDSUBImm(const uint32_t opcode) { … }

template <EmulateInstructionARM64::AddrMode a_mode>
bool EmulateInstructionARM64::EmulateLDPSTP(const uint32_t opcode) { … }

template <EmulateInstructionARM64::AddrMode a_mode>
bool EmulateInstructionARM64::EmulateLDRSTRImm(const uint32_t opcode) { … }

bool EmulateInstructionARM64::EmulateB(const uint32_t opcode) { … }

bool EmulateInstructionARM64::EmulateBcond(const uint32_t opcode) { … }

bool EmulateInstructionARM64::EmulateCBZ(const uint32_t opcode) { … }

bool EmulateInstructionARM64::EmulateTBZ(const uint32_t opcode) { … }