llvm/llvm/test/CodeGen/Xtensa/load.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc --mtriple=xtensa < %s | FileCheck %s

define signext i8 @test_load_i8(ptr %p){
; CHECK-LABEL: test_load_i8:
; CHECK:         l8ui a8, a2, 0
; CHECK-NEXT:    slli a8, a8, 24
; CHECK-NEXT:    srai a2, a8, 24
; CHECK-NEXT:    ret
  %1 = load i8, ptr %p, align 1
  ret i8 %1
}