llvm/llvm/unittests/ExecutionEngine/JITLink/AArch32Tests.cpp

//===------- AArch32Tests.cpp - Unit tests for the AArch32 backend --------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#include <llvm/BinaryFormat/ELF.h>
#include <llvm/ExecutionEngine/JITLink/aarch32.h>

#include "gtest/gtest.h"

usingnamespacellvm;
usingnamespacellvm::jitlink;
usingnamespacellvm::jitlink::aarch32;
usingnamespacellvm::support;
usingnamespacellvm::support::endian;

struct MutableHalfWords { … };

struct MutableWord { … };
namespace llvm {
namespace jitlink {

Expected<aarch32::EdgeKind_aarch32>
getJITLinkEdgeKind(uint32_t ELFType, const aarch32::ArmConfig &Cfg);
Expected<uint32_t> getELFRelocationType(Edge::Kind Kind);

} // namespace jitlink
} // namespace llvm

TEST(AArch32_ELF, EdgeKinds) { … }

TEST(AArch32_ELF, DynFixupInfos) { … }

namespace llvm {
namespace jitlink {
namespace aarch32 {

HalfWords encodeImmBT4BlT1BlxT2(int64_t Value);
HalfWords encodeImmBT4BlT1BlxT2_J1J2(int64_t Value);
uint32_t encodeImmBA1BlA1BlxA2(int64_t Value);
HalfWords encodeImmMovtT1MovwT3(uint16_t Value);
HalfWords encodeRegMovtT1MovwT3(int64_t Value);
uint32_t encodeImmMovtA1MovwA2(uint16_t Value);
uint32_t encodeRegMovtA1MovwA2(int64_t Value);

int64_t decodeImmBT4BlT1BlxT2(uint32_t Hi, uint32_t Lo);
int64_t decodeImmBT4BlT1BlxT2_J1J2(uint32_t Hi, uint32_t Lo);
int64_t decodeImmBA1BlA1BlxA2(int64_t Value);
uint16_t decodeImmMovtT1MovwT3(uint32_t Hi, uint32_t Lo);
int64_t decodeRegMovtT1MovwT3(uint32_t Hi, uint32_t Lo);
uint16_t decodeImmMovtA1MovwA2(uint64_t Value);
int64_t decodeRegMovtA1MovwA2(uint64_t Value);

} // namespace aarch32
} // namespace jitlink
} // namespace llvm

// Big-endian for v7 and v8 (and v6 unless in legacy backwards compatible mode
// be32) have little-endian instructions and big-endian data. In ELF relocatable
// objects big-endian instructions may still be encountered. A be8 supporting
// linker is expected to endian-reverse instructions for the executable.
template <endianness Endian>
static HalfWords makeHalfWords(std::array<uint8_t, 4> Mem) { … }

/// 25-bit branch with link (with J1J2 range extension)
TEST(AArch32_Relocations, Thumb_Call_J1J2) { … }

/// 22-bit branch with link (without J1J2 range extension)
TEST(AArch32_Relocations, Thumb_Call_Bare) { … }

/// 26-bit branch with link
TEST(AArch32_Relocations, Arm_Call_Bare) { … }

/// Write immediate value to the top halfword of the destination register
TEST(AArch32_Relocations, Thumb_MovtAbs) { … }

/// Write immediate value to the top halfword of the destination register
TEST(AArch32_Relocations, Arm_MovtAbs) { … }