llvm/llvm/unittests/Target/ARM/MachineInstrTest.cpp

#include "ARMBaseInstrInfo.h"
#include "ARMSubtarget.h"
#include "ARMTargetMachine.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/TargetSelect.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"

#include "gtest/gtest.h"

usingnamespacellvm;

TEST(MachineInstructionDoubleWidthResult, IsCorrect) { … }

TEST(MachineInstructionHorizontalReduction, IsCorrect) { … }

TEST(MachineInstructionRetainsPreviousHalfElement, IsCorrect) { … }
// Test for instructions that aren't immediately obviously valid within a
// tail-predicated loop. This should be marked up in their tablegen
// descriptions. Currently we, conservatively, disallow:
// - cross beat carries.
// - complex operations.
// - horizontal operations with exchange.
// - byte swapping.
// - interleaved memory instructions.
// TODO: Add to this list once we can handle them safely.
TEST(MachineInstrValidTailPredication, IsCorrect) { … }

TEST(MachineInstr, HasSideEffects) { … }

TEST(MachineInstr, MVEVecSize) { … }