llvm/llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp

//===-- R600MachineScheduler.cpp - R600 Scheduler Interface -*- C++ -*-----===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// R600 Machine Scheduler interface
//
//===----------------------------------------------------------------------===//

#include "R600MachineScheduler.h"
#include "MCTargetDesc/R600MCTargetDesc.h"
#include "R600Subtarget.h"

usingnamespacellvm;

#define DEBUG_TYPE …

void R600SchedStrategy::initialize(ScheduleDAGMI *dag) { … }

void R600SchedStrategy::MoveUnits(std::vector<SUnit *> &QSrc,
                                  std::vector<SUnit *> &QDst)
{ … }

static unsigned getWFCountLimitedByGPR(unsigned GPRCount) { … }

SUnit* R600SchedStrategy::pickNode(bool &IsTopNode) { … }

void R600SchedStrategy::schedNode(SUnit *SU, bool IsTopNode) { … }

static bool
isPhysicalRegCopy(MachineInstr *MI) { … }

void R600SchedStrategy::releaseTopNode(SUnit *SU) { … }

void R600SchedStrategy::releaseBottomNode(SUnit *SU) { … }

bool R600SchedStrategy::regBelongsToClass(Register Reg,
                                          const TargetRegisterClass *RC) const { … }

R600SchedStrategy::AluKind R600SchedStrategy::getAluKind(SUnit *SU) const { … }

int R600SchedStrategy::getInstKind(SUnit* SU) { … }

SUnit *R600SchedStrategy::PopInst(std::vector<SUnit *> &Q, bool AnyALU) { … }

void R600SchedStrategy::LoadAlu() { … }

void R600SchedStrategy::PrepareNextSlot() { … }

void R600SchedStrategy::AssignSlot(MachineInstr* MI, unsigned Slot) { … }

SUnit *R600SchedStrategy::AttemptFillSlot(unsigned Slot, bool AnyAlu) { … }

unsigned R600SchedStrategy::AvailablesAluCount() const { … }

SUnit* R600SchedStrategy::pickAlu() { … }

SUnit* R600SchedStrategy::pickOther(int QID) { … }