//===-- Thumb2InstrInfo.h - Thumb-2 Instruction Information -----*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file contains the Thumb-2 implementation of the TargetInstrInfo class. // //===----------------------------------------------------------------------===// #ifndef LLVM_LIB_TARGET_ARM_THUMB2INSTRINFO_H #define LLVM_LIB_TARGET_ARM_THUMB2INSTRINFO_H #include "ARMBaseInstrInfo.h" #include "ThumbRegisterInfo.h" namespace llvm { class ARMSubtarget; class Thumb2InstrInfo : public ARMBaseInstrInfo { … }; /// getITInstrPredicate - Valid only in Thumb2 mode. This function is identical /// to llvm::getInstrPredicate except it returns AL for conditional branch /// instructions which are "predicated", but are not in IT blocks. ARMCC::CondCodes getITInstrPredicate(const MachineInstr &MI, Register &PredReg); // getVPTInstrPredicate: VPT analogue of that, plus a helper function // corresponding to MachineInstr::findFirstPredOperandIdx. int findFirstVPTPredOperandIdx(const MachineInstr &MI); ARMVCC::VPTCodes getVPTInstrPredicate(const MachineInstr &MI, Register &PredReg); inline ARMVCC::VPTCodes getVPTInstrPredicate(const MachineInstr &MI) { … } // Recomputes the Block Mask of Instr, a VPT or VPST instruction. // This rebuilds the block mask of the instruction depending on the predicates // of the instructions following it. This should only be used after the // MVEVPTBlockInsertion pass has run, and should be used whenever a predicated // instruction is added to/removed from the block. void recomputeVPTBlockMask(MachineInstr &Instr); } // namespace llvm #endif