llvm/llvm/lib/Target/Hexagon/BitTracker.h

//===- BitTracker.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_HEXAGON_BITTRACKER_H
#define LLVM_LIB_TARGET_HEXAGON_BITTRACKER_H

#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineOperand.h"
#include <cassert>
#include <cstdint>
#include <map>
#include <queue>
#include <set>
#include <utility>

namespace llvm {

class BitVector;
class ConstantInt;
class MachineRegisterInfo;
class MachineBasicBlock;
class MachineFunction;
class raw_ostream;
class TargetRegisterClass;
class TargetRegisterInfo;

struct BitTracker { … };

// Abstraction of a reference to bit at position Pos from a register Reg.
struct BitTracker::BitRef { … };

// Abstraction of a register reference in MachineOperand.  It contains the
// register number and the subregister index.
// FIXME: Consolidate duplicate definitions of RegisterRef
struct BitTracker::RegisterRef { … };

// Value that a single bit can take.  This is outside of the context of
// any register, it is more of an abstraction of the two-element set of
// possible bit values.  One extension here is the "Ref" type, which
// indicates that this bit takes the same value as the bit described by
// RefInfo.
struct BitTracker::BitValue { … };

// This operation must be idempotent, i.e. ref(ref(V)) == ref(V).
inline BitTracker::BitValue
BitTracker::BitValue::ref(const BitValue &V) { … }

inline BitTracker::BitValue
BitTracker::BitValue::self(const BitRef &Self) { … }

// A sequence of bits starting from index B up to and including index E.
// If E < B, the mask represents two sections: [0..E] and [B..W) where
// W is the width of the register.
struct BitTracker::BitMask { … };

// Representation of a register: a list of BitValues.
struct BitTracker::RegisterCell { … };

inline bool BitTracker::has(unsigned Reg) const { … }

inline const BitTracker::RegisterCell&
BitTracker::lookup(unsigned Reg) const { … }

inline BitTracker::RegisterCell
BitTracker::RegisterCell::self(unsigned Reg, uint16_t Width) { … }

inline BitTracker::RegisterCell
BitTracker::RegisterCell::top(uint16_t Width) { … }

inline BitTracker::RegisterCell
BitTracker::RegisterCell::ref(const RegisterCell &C) { … }

// A class to evaluate target's instructions and update the cell maps.
// This is used internally by the bit tracker.  A target that wants to
// utilize this should implement the evaluation functions (noted below)
// in a subclass of this class.
struct BitTracker::MachineEvaluator { … };

} // end namespace llvm

#endif // LLVM_LIB_TARGET_HEXAGON_BITTRACKER_H