HexagonMCInstrInfo.cpp | Explore in Territory

//===- HexagonMCInstrInfo.cpp - Hexagon sub-class of MCInst ---------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This class extends MCInstrInfo to allow Hexagon specific MCInstr queries
//
//===----------------------------------------------------------------------===//

#include "MCTargetDesc/HexagonMCInstrInfo.h"
#include "MCTargetDesc/HexagonBaseInfo.h"
#include "MCTargetDesc/HexagonMCChecker.h"
#include "MCTargetDesc/HexagonMCExpr.h"
#include "MCTargetDesc/HexagonMCShuffler.h"
#include "MCTargetDesc/HexagonMCTargetDesc.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <cstdint>
#include <limits>

usingnamespacellvm;

bool HexagonMCInstrInfo::PredicateInfo::isPredicated() const { … }

Hexagon::PacketIterator::PacketIterator(MCInstrInfo const &MCII,
                                        MCInst const &Inst)
    : … { … }

Hexagon::PacketIterator::PacketIterator(MCInstrInfo const &MCII,
                                        MCInst const &Inst, std::nullptr_t)
    : … { … }

Hexagon::PacketIterator &Hexagon::PacketIterator::operator++() { … }

MCInst const &Hexagon::PacketIterator::operator*() const { … }

bool Hexagon::PacketIterator::operator==(PacketIterator const &Other) const { … }

void HexagonMCInstrInfo::addConstant(MCInst &MI, uint64_t Value,
                                     MCContext &Context) { … }

void HexagonMCInstrInfo::addConstExtender(MCContext &Context,
                                          MCInstrInfo const &MCII, MCInst &MCB,
                                          MCInst const &MCI) { … }

iterator_range<Hexagon::PacketIterator>
HexagonMCInstrInfo::bundleInstructions(MCInstrInfo const &MCII,
                                       MCInst const &MCI) { … }

iterator_range<MCInst::const_iterator>
HexagonMCInstrInfo::bundleInstructions(MCInst const &MCI) { … }

size_t HexagonMCInstrInfo::bundleSize(MCInst const &MCI) { … }

namespace {
bool canonicalizePacketImpl(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
                            MCContext &Context, MCInst &MCB,
                            HexagonMCChecker *Check) { … }
} // namespace

bool HexagonMCInstrInfo::canonicalizePacket(MCInstrInfo const &MCII,
                                            MCSubtargetInfo const &STI,
                                            MCContext &Context, MCInst &MCB,
                                            HexagonMCChecker *Check,
                                            bool AttemptCompatibility) { … }

MCInst HexagonMCInstrInfo::deriveExtender(MCInstrInfo const &MCII,
                                          MCInst const &Inst,
                                          MCOperand const &MO) { … }

MCInst *HexagonMCInstrInfo::deriveDuplex(MCContext &Context, unsigned iClass,
                                         MCInst const &inst0,
                                         MCInst const &inst1) { … }

MCInst const *HexagonMCInstrInfo::extenderForIndex(MCInst const &MCB,
                                                   size_t Index) { … }

void HexagonMCInstrInfo::extendIfNeeded(MCContext &Context,
                                        MCInstrInfo const &MCII, MCInst &MCB,
                                        MCInst const &MCI) { … }

unsigned HexagonMCInstrInfo::getMemAccessSize(MCInstrInfo const &MCII,
      MCInst const &MCI) { … }

unsigned HexagonMCInstrInfo::getAddrMode(MCInstrInfo const &MCII,
                                         MCInst const &MCI) { … }

MCInstrDesc const &HexagonMCInstrInfo::getDesc(MCInstrInfo const &MCII,
                                               MCInst const &MCI) { … }

unsigned HexagonMCInstrInfo::getDuplexRegisterNumbering(MCRegister Reg) { … }

MCExpr const &HexagonMCInstrInfo::getExpr(MCExpr const &Expr) { … }

unsigned short HexagonMCInstrInfo::getExtendableOp(MCInstrInfo const &MCII,
                                                   MCInst const &MCI) { … }

MCOperand const &
HexagonMCInstrInfo::getExtendableOperand(MCInstrInfo const &MCII,
                                         MCInst const &MCI) { … }

unsigned HexagonMCInstrInfo::getExtentAlignment(MCInstrInfo const &MCII,
                                                MCInst const &MCI) { … }

unsigned HexagonMCInstrInfo::getExtentBits(MCInstrInfo const &MCII,
                                           MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isExtentSigned(MCInstrInfo const &MCII,
                                        MCInst const &MCI) { … }

/// Return the maximum value of an extendable operand.
int HexagonMCInstrInfo::getMaxValue(MCInstrInfo const &MCII,
                                    MCInst const &MCI) { … }

/// Return the minimum value of an extendable operand.
int HexagonMCInstrInfo::getMinValue(MCInstrInfo const &MCII,
                                    MCInst const &MCI) { … }

StringRef HexagonMCInstrInfo::getName(MCInstrInfo const &MCII,
                                      MCInst const &MCI) { … }

unsigned short HexagonMCInstrInfo::getNewValueOp(MCInstrInfo const &MCII,
                                                 MCInst const &MCI) { … }

MCOperand const &HexagonMCInstrInfo::getNewValueOperand(MCInstrInfo const &MCII,
                                                        MCInst const &MCI) { … }

/// Return the new value or the newly produced value.
unsigned short HexagonMCInstrInfo::getNewValueOp2(MCInstrInfo const &MCII,
                                                  MCInst const &MCI) { … }

MCOperand const &
HexagonMCInstrInfo::getNewValueOperand2(MCInstrInfo const &MCII,
                                        MCInst const &MCI) { … }

/// Return the Hexagon ISA class for the insn.
unsigned HexagonMCInstrInfo::getType(MCInstrInfo const &MCII,
                                     MCInst const &MCI) { … }

/// Return the resources used by this instruction
unsigned HexagonMCInstrInfo::getCVIResources(MCInstrInfo const &MCII,
                                      MCSubtargetInfo const &STI,
                                      MCInst const &MCI) { … }

/// Return the slots this instruction can execute out of
unsigned HexagonMCInstrInfo::getUnits(MCInstrInfo const &MCII,
                                      MCSubtargetInfo const &STI,
                                      MCInst const &MCI) { … }

/// Return the slots this instruction consumes in addition to
/// the slot(s) it can execute out of

unsigned HexagonMCInstrInfo::getOtherReservedSlots(MCInstrInfo const &MCII,
                                                   MCSubtargetInfo const &STI,
                                                   MCInst const &MCI) { … }

bool HexagonMCInstrInfo::hasDuplex(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::hasExtenderForIndex(MCInst const &MCB, size_t Index) { … }

bool HexagonMCInstrInfo::hasImmExt(MCInst const &MCI) { … }

/// Return whether the insn produces a value.
bool HexagonMCInstrInfo::hasNewValue(MCInstrInfo const &MCII,
                                     MCInst const &MCI) { … }

/// Return whether the insn produces a second value.
bool HexagonMCInstrInfo::hasNewValue2(MCInstrInfo const &MCII,
                                      MCInst const &MCI) { … }

MCInst const &HexagonMCInstrInfo::instruction(MCInst const &MCB, size_t Index) { … }

/// Return where the instruction is an accumulator.
bool HexagonMCInstrInfo::isAccumulator(MCInstrInfo const &MCII,
                                       MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isBundle(MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isConstExtended(MCInstrInfo const &MCII,
                                         MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isCanon(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isCofMax1(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isCofRelax1(MCInstrInfo const &MCII,
                                     MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isCofRelax2(MCInstrInfo const &MCII,
                                     MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isCompound(MCInstrInfo const &MCII,
                                    MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isCVINew(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isDblRegForSubInst(MCRegister Reg) { … }

bool HexagonMCInstrInfo::isDuplex(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isExtendable(MCInstrInfo const &MCII,
                                      MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isExtended(MCInstrInfo const &MCII,
                                    MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isFloat(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isHVX(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isImmext(MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isInnerLoop(MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isIntReg(MCRegister Reg) { … }

bool HexagonMCInstrInfo::isIntRegForSubInst(MCRegister Reg) { … }

/// Return whether the insn expects newly produced value.
bool HexagonMCInstrInfo::isNewValue(MCInstrInfo const &MCII,
                                    MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isNewValueStore(MCInstrInfo const &MCII,
                                         MCInst const &MCI) { … }

/// Return whether the operand is extendable.
bool HexagonMCInstrInfo::isOpExtendable(MCInstrInfo const &MCII,
                                        MCInst const &MCI, unsigned short O) { … }

bool HexagonMCInstrInfo::isOuterLoop(MCInst const &MCI) { … }

bool HexagonMCInstrInfo::IsVecRegPair(MCRegister VecReg) { … }

bool HexagonMCInstrInfo::IsReverseVecRegPair(MCRegister VecReg) { … }

bool HexagonMCInstrInfo::IsVecRegSingle(MCRegister VecReg) { … }

std::pair<unsigned, unsigned>
HexagonMCInstrInfo::GetVecRegPairIndices(MCRegister VecRegPair) { … }

bool HexagonMCInstrInfo::IsSingleConsumerRefPairProducer(MCRegister Producer,
                                                         MCRegister Consumer) { … }

bool HexagonMCInstrInfo::isPredicated(MCInstrInfo const &MCII,
                                      MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isPrefix(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isPredicateLate(MCInstrInfo const &MCII,
                                         MCInst const &MCI) { … }

/// Return whether the insn is newly predicated.
bool HexagonMCInstrInfo::isPredicatedNew(MCInstrInfo const &MCII,
                                         MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isPredicatedTrue(MCInstrInfo const &MCII,
                                          MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isPredReg(MCRegisterInfo const &MRI, MCRegister Reg) { … }

bool HexagonMCInstrInfo::isPredRegister(MCInstrInfo const &MCII,
                                        MCInst const &Inst, unsigned I) { … }

/// Return whether the insn can be packaged only with A and X-type insns.
bool HexagonMCInstrInfo::isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI) { … }

/// Return whether the insn can be packaged only with an A-type insn in slot #1.
bool HexagonMCInstrInfo::isRestrictSlot1AOK(MCInstrInfo const &MCII,
                                            MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isRestrictNoSlot1Store(MCInstrInfo const &MCII,
                                                MCInst const &MCI) { … }

/// Return whether the insn is solo, i.e., cannot be in a packet.
bool HexagonMCInstrInfo::isSolo(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isMemReorderDisabled(MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isSubInstruction(MCInst const &MCI) { … }

bool HexagonMCInstrInfo::isVector(MCInstrInfo const &MCII, MCInst const &MCI) { … }

int64_t HexagonMCInstrInfo::minConstant(MCInst const &MCI, size_t Index) { … }

void HexagonMCInstrInfo::setMustExtend(MCExpr const &Expr, bool Val) { … }

bool HexagonMCInstrInfo::mustExtend(MCExpr const &Expr) { … }
void HexagonMCInstrInfo::setMustNotExtend(MCExpr const &Expr, bool Val) { … }
bool HexagonMCInstrInfo::mustNotExtend(MCExpr const &Expr) { … }
void HexagonMCInstrInfo::setS27_2_reloc(MCExpr const &Expr, bool Val) { … }
bool HexagonMCInstrInfo::s27_2_reloc(MCExpr const &Expr) { … }

unsigned HexagonMCInstrInfo::packetSizeSlots(MCSubtargetInfo const &STI) { … }

unsigned HexagonMCInstrInfo::packetSize(StringRef CPU) { … }

void HexagonMCInstrInfo::padEndloop(MCInst &MCB, MCContext &Context) { … }

HexagonMCInstrInfo::PredicateInfo
HexagonMCInstrInfo::predicateInfo(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::prefersSlot3(MCInstrInfo const &MCII,
                                      MCInst const &MCI) { … }

bool HexagonMCInstrInfo::hasTmpDst(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::hasHvxTmp(MCInstrInfo const &MCII, MCInst const &MCI) { … }

bool HexagonMCInstrInfo::requiresSlot(MCSubtargetInfo const &STI,
                                      MCInst const &MCI) { … }

unsigned HexagonMCInstrInfo::slotsConsumed(MCInstrInfo const &MCII,
                                           MCSubtargetInfo const &STI,
                                           MCInst const &MCI) { … }

void HexagonMCInstrInfo::replaceDuplex(MCContext &Context, MCInst &MCB,
                                       DuplexCandidate Candidate) { … }

void HexagonMCInstrInfo::setInnerLoop(MCInst &MCI) { … }

void HexagonMCInstrInfo::setMemReorderDisabled(MCInst &MCI) { … }

void HexagonMCInstrInfo::setOuterLoop(MCInst &MCI) { … }

unsigned HexagonMCInstrInfo::SubregisterBit(MCRegister Consumer,
                                            MCRegister Producer,
                                            MCRegister Producer2) { … }

bool HexagonMCInstrInfo::LoopNeedsPadding(MCInst const &MCB) { … }

bool HexagonMCInstrInfo::IsABranchingInst(MCInstrInfo const &MCII,
                                          MCSubtargetInfo const &STI,
                                          MCInst const &I) { … }
llvm/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
