//===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file contains the X86 implementation of TargetFrameLowering class. // //===----------------------------------------------------------------------===// #include "X86FrameLowering.h" #include "MCTargetDesc/X86MCTargetDesc.h" #include "X86InstrBuilder.h" #include "X86InstrInfo.h" #include "X86MachineFunctionInfo.h" #include "X86Subtarget.h" #include "X86TargetMachine.h" #include "llvm/ADT/Statistic.h" #include "llvm/CodeGen/LivePhysRegs.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/WinEHFuncInfo.h" #include "llvm/IR/DataLayout.h" #include "llvm/IR/EHPersonalities.h" #include "llvm/IR/Function.h" #include "llvm/IR/Module.h" #include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCObjectFileInfo.h" #include "llvm/MC/MCSymbol.h" #include "llvm/Support/Debug.h" #include "llvm/Support/LEB128.h" #include "llvm/Target/TargetOptions.h" #include <cstdlib> #define DEBUG_TYPE … STATISTIC(NumFrameLoopProbe, "Number of loop stack probes used in prologue"); STATISTIC(NumFrameExtraProbe, "Number of extra stack probes generated in prologue"); STATISTIC(NumFunctionUsingPush2Pop2, "Number of funtions using push2/pop2"); usingnamespacellvm; X86FrameLowering::X86FrameLowering(const X86Subtarget &STI, MaybeAlign StackAlignOverride) : … { … } bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const { … } /// canSimplifyCallFramePseudos - If there is a reserved call frame, the /// call frame pseudos can be simplified. Having a FP, as in the default /// implementation, is not sufficient here since we can't always use it. /// Use a more nuanced condition. bool X86FrameLowering::canSimplifyCallFramePseudos( const MachineFunction &MF) const { … } // needsFrameIndexResolution - Do we need to perform FI resolution for // this function. Normally, this is required only when the function // has any stack objects. However, FI resolution actually has another job, // not apparent from the title - it resolves callframesetup/destroy // that were not simplified earlier. // So, this is required for x86 functions that have push sequences even // when there are no stack objects. bool X86FrameLowering::needsFrameIndexResolution( const MachineFunction &MF) const { … } /// hasFP - Return true if the specified function should have a dedicated frame /// pointer register. This is true if the function has variable sized allocas /// or if frame pointer elimination is disabled. bool X86FrameLowering::hasFP(const MachineFunction &MF) const { … } static unsigned getSUBriOpcode(bool IsLP64) { … } static unsigned getADDriOpcode(bool IsLP64) { … } static unsigned getSUBrrOpcode(bool IsLP64) { … } static unsigned getADDrrOpcode(bool IsLP64) { … } static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) { … } static unsigned getLEArOpcode(bool IsLP64) { … } static unsigned getMOVriOpcode(bool Use64BitReg, int64_t Imm) { … } // Push-Pop Acceleration (PPX) hint is used to indicate that the POP reads the // value written by the PUSH from the stack. The processor tracks these marked // instructions internally and fast-forwards register data between matching PUSH // and POP instructions, without going through memory or through the training // loop of the Fast Store Forwarding Predictor (FSFP). Instead, a more efficient // memory-renaming optimization can be used. // // The PPX hint is purely a performance hint. Instructions with this hint have // the same functional semantics as those without. PPX hints set by the // compiler that violate the balancing rule may turn off the PPX optimization, // but they will not affect program semantics. // // Hence, PPX is used for balanced spill/reloads (Exceptions and setjmp/longjmp // are not considered). // // PUSH2 and POP2 are instructions for (respectively) pushing/popping 2 // GPRs at a time to/from the stack. static unsigned getPUSHOpcode(const X86Subtarget &ST) { … } static unsigned getPOPOpcode(const X86Subtarget &ST) { … } static unsigned getPUSH2Opcode(const X86Subtarget &ST) { … } static unsigned getPOP2Opcode(const X86Subtarget &ST) { … } static bool isEAXLiveIn(MachineBasicBlock &MBB) { … } /// Check if the flags need to be preserved before the terminators. /// This would be the case, if the eflags is live-in of the region /// composed by the terminators or live-out of that region, without /// being defined by a terminator. static bool flagsNeedToBePreservedBeforeTheTerminators(const MachineBasicBlock &MBB) { … } /// emitSPUpdate - Emit a series of instructions to increment / decrement the /// stack pointer by a constant value. void X86FrameLowering::emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, int64_t NumBytes, bool InEpilogue) const { … } MachineInstrBuilder X86FrameLowering::BuildStackAdjustment( MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, int64_t Offset, bool InEpilogue) const { … } int X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, bool doMergeWithPrevious) const { … } void X86FrameLowering::BuildCFI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, const MCCFIInstruction &CFIInst, MachineInstr::MIFlag Flag) const { … } /// Emits Dwarf Info specifying offsets of callee saved registers and /// frame pointer. This is called only when basic block sections are enabled. void X86FrameLowering::emitCalleeSavedFrameMovesFullCFA( MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const { … } void X86FrameLowering::emitCalleeSavedFrameMoves( MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool IsPrologue) const { … } void X86FrameLowering::emitZeroCallUsedRegs(BitVector RegsToZero, MachineBasicBlock &MBB) const { … } void X86FrameLowering::emitStackProbe( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog, std::optional<MachineFunction::DebugInstrOperandPair> InstrNum) const { … } bool X86FrameLowering::stackProbeFunctionModifiesSP() const { … } void X86FrameLowering::inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const { … } void X86FrameLowering::emitStackProbeInline(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const { … } void X86FrameLowering::emitStackProbeInlineGeneric( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const { … } void X86FrameLowering::emitStackProbeInlineGenericBlock( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, uint64_t Offset, uint64_t AlignOffset) const { … } void X86FrameLowering::emitStackProbeInlineGenericLoop( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, uint64_t Offset, uint64_t AlignOffset) const { … } void X86FrameLowering::emitStackProbeInlineWindowsCoreCLR64( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const { … } void X86FrameLowering::emitStackProbeCall( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog, std::optional<MachineFunction::DebugInstrOperandPair> InstrNum) const { … } static unsigned calculateSetFPREG(uint64_t SPAdjust) { … } // If we're forcing a stack realignment we can't rely on just the frame // info, we need to know the ABI stack alignment as well in case we // have a call out. Otherwise just make sure we have some alignment - we'll // go with the minimum SlotSize. uint64_t X86FrameLowering::calculateMaxStackAlign(const MachineFunction &MF) const { … } void X86FrameLowering::BuildStackAlignAND(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, unsigned Reg, uint64_t MaxAlign) const { … } bool X86FrameLowering::has128ByteRedZone(const MachineFunction &MF) const { … } /// Return true if we need to use the restricted Windows x64 prologue and /// epilogue code patterns that can be described with WinCFI (.seh_* /// directives). bool X86FrameLowering::isWin64Prologue(const MachineFunction &MF) const { … } bool X86FrameLowering::needsDwarfCFI(const MachineFunction &MF) const { … } /// Return true if an opcode is part of the REP group of instructions static bool isOpcodeRep(unsigned Opcode) { … } /// emitPrologue - Push callee-saved registers onto the stack, which /// automatically adjust the stack pointer. Adjust the stack pointer to allocate /// space for local variables. Also emit labels used by the exception handler to /// generate the exception handling frames. /* Here's a gist of what gets emitted: ; Establish frame pointer, if needed [if needs FP] push %rbp .cfi_def_cfa_offset 16 .cfi_offset %rbp, -16 .seh_pushreg %rpb mov %rsp, %rbp .cfi_def_cfa_register %rbp ; Spill general-purpose registers [for all callee-saved GPRs] pushq %<reg> [if not needs FP] .cfi_def_cfa_offset (offset from RETADDR) .seh_pushreg %<reg> ; If the required stack alignment > default stack alignment ; rsp needs to be re-aligned. This creates a "re-alignment gap" ; of unknown size in the stack frame. [if stack needs re-alignment] and $MASK, %rsp ; Allocate space for locals [if target is Windows and allocated space > 4096 bytes] ; Windows needs special care for allocations larger ; than one page. mov $NNN, %rax call ___chkstk_ms/___chkstk sub %rax, %rsp [else] sub $NNN, %rsp [if needs FP] .seh_stackalloc (size of XMM spill slots) .seh_setframe %rbp, SEHFrameOffset ; = size of all spill slots [else] .seh_stackalloc NNN ; Spill XMMs ; Note, that while only Windows 64 ABI specifies XMMs as callee-preserved, ; they may get spilled on any platform, if the current function ; calls @llvm.eh.unwind.init [if needs FP] [for all callee-saved XMM registers] movaps %<xmm reg>, -MMM(%rbp) [for all callee-saved XMM registers] .seh_savexmm %<xmm reg>, (-MMM + SEHFrameOffset) ; i.e. the offset relative to (%rbp - SEHFrameOffset) [else] [for all callee-saved XMM registers] movaps %<xmm reg>, KKK(%rsp) [for all callee-saved XMM registers] .seh_savexmm %<xmm reg>, KKK .seh_endprologue [if needs base pointer] mov %rsp, %rbx [if needs to restore base pointer] mov %rsp, -MMM(%rbp) ; Emit CFI info [if needs FP] [for all callee-saved registers] .cfi_offset %<reg>, (offset from %rbp) [else] .cfi_def_cfa_offset (offset from RETADDR) [for all callee-saved registers] .cfi_offset %<reg>, (offset from %rsp) Notes: - .seh directives are emitted only for Windows 64 ABI - .cv_fpo directives are emitted on win32 when emitting CodeView - .cfi directives are emitted for all other ABIs - for 32-bit code, substitute %e?? registers for %r?? */ void X86FrameLowering::emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const { … } bool X86FrameLowering::canUseLEAForSPInEpilogue( const MachineFunction &MF) const { … } static bool isFuncletReturnInstr(MachineInstr &MI) { … } // CLR funclets use a special "Previous Stack Pointer Symbol" slot on the // stack. It holds a pointer to the bottom of the root function frame. The // establisher frame pointer passed to a nested funclet may point to the // (mostly empty) frame of its parent funclet, but it will need to find // the frame of the root function to access locals. To facilitate this, // every funclet copies the pointer to the bottom of the root function // frame into a PSPSym slot in its own (mostly empty) stack frame. Using the // same offset for the PSPSym in the root function frame that's used in the // funclets' frames allows each funclet to dynamically accept any ancestor // frame as its establisher argument (the runtime doesn't guarantee the // immediate parent for some reason lost to history), and also allows the GC, // which uses the PSPSym for some bookkeeping, to find it in any funclet's // frame with only a single offset reported for the entire method. unsigned X86FrameLowering::getPSPSlotOffsetFromSP(const MachineFunction &MF) const { … } unsigned X86FrameLowering::getWinEHFuncletFrameSize(const MachineFunction &MF) const { … } static bool isTailCallOpcode(unsigned Opc) { … } void X86FrameLowering::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const { … } StackOffset X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const { … } int X86FrameLowering::getWin64EHFrameIndexRef(const MachineFunction &MF, int FI, Register &FrameReg) const { … } StackOffset X86FrameLowering::getFrameIndexReferenceSP(const MachineFunction &MF, int FI, Register &FrameReg, int Adjustment) const { … } StackOffset X86FrameLowering::getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, Register &FrameReg, bool IgnoreSPUpdates) const { … } bool X86FrameLowering::assignCalleeSavedSpillSlots( MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector<CalleeSavedInfo> &CSI) const { … } bool X86FrameLowering::spillCalleeSavedRegisters( MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const { … } void X86FrameLowering::emitCatchRetReturnValue(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, MachineInstr *CatchRet) const { … } bool X86FrameLowering::restoreCalleeSavedRegisters( MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const { … } void X86FrameLowering::determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const { … } static bool HasNestArgument(const MachineFunction *MF) { … } /// GetScratchRegister - Get a temp register for performing work in the /// segmented stack and the Erlang/HiPE stack prologue. Depending on platform /// and the properties of the function either one or two registers will be /// needed. Set primary to true for the first register, false for the second. static unsigned GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary) { … } // The stack limit in the TCB is set to this many bytes above the actual stack // limit. static const uint64_t kSplitStackAvailable = …; void X86FrameLowering::adjustForSegmentedStacks( MachineFunction &MF, MachineBasicBlock &PrologueMBB) const { … } /// Lookup an ERTS parameter in the !hipe.literals named metadata node. /// HiPE provides Erlang Runtime System-internal parameters, such as PCB offsets /// to fields it needs, through a named metadata node "hipe.literals" containing /// name-value pairs. static unsigned getHiPELiteral(NamedMDNode *HiPELiteralsMD, const StringRef LiteralName) { … } // Return true if there are no non-ehpad successors to MBB and there are no // non-meta instructions between MBBI and MBB.end(). static bool blockEndIsUnreachable(const MachineBasicBlock &MBB, MachineBasicBlock::const_iterator MBBI) { … } /// Erlang programs may need a special prologue to handle the stack size they /// might need at runtime. That is because Erlang/OTP does not implement a C /// stack but uses a custom implementation of hybrid stack/heap architecture. /// (for more information see Eric Stenman's Ph.D. thesis: /// http://publications.uu.se/uu/fulltext/nbn_se_uu_diva-2688.pdf) /// /// CheckStack: /// temp0 = sp - MaxStack /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart /// OldStart: /// ... /// IncStack: /// call inc_stack # doubles the stack space /// temp0 = sp - MaxStack /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart void X86FrameLowering::adjustForHiPEPrologue( MachineFunction &MF, MachineBasicBlock &PrologueMBB) const { … } bool X86FrameLowering::adjustStackWithPops(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, int Offset) const { … } MachineBasicBlock::iterator X86FrameLowering::eliminateCallFramePseudoInstr( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { … } bool X86FrameLowering::canUseAsPrologue(const MachineBasicBlock &MBB) const { … } bool X86FrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const { … } bool X86FrameLowering::enableShrinkWrapping(const MachineFunction &MF) const { … } MachineBasicBlock::iterator X86FrameLowering::restoreWin32EHStackPointers( MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool RestoreSP) const { … } int X86FrameLowering::getInitialCFAOffset(const MachineFunction &MF) const { … } Register X86FrameLowering::getInitialCFARegister(const MachineFunction &MF) const { … } TargetFrameLowering::DwarfFrameBase X86FrameLowering::getDwarfFrameBase(const MachineFunction &MF) const { … } namespace { // Struct used by orderFrameObjects to help sort the stack objects. struct X86FrameSortingObject { … }; // The comparison function we use for std::sort to order our local // stack symbols. The current algorithm is to use an estimated // "density". This takes into consideration the size and number of // uses each object has in order to roughly minimize code size. // So, for example, an object of size 16B that is referenced 5 times // will get higher priority than 4 4B objects referenced 1 time each. // It's not perfect and we may be able to squeeze a few more bytes out of // it (for example : 0(esp) requires fewer bytes, symbols allocated at the // fringe end can have special consideration, given their size is less // important, etc.), but the algorithmic complexity grows too much to be // worth the extra gains we get. This gets us pretty close. // The final order leaves us with objects with highest priority going // at the end of our list. struct X86FrameSortingComparator { … }; } // namespace // Order the symbols in the local stack. // We want to place the local stack objects in some sort of sensible order. // The heuristic we use is to try and pack them according to static number // of uses and size of object in order to minimize code size. void X86FrameLowering::orderFrameObjects( const MachineFunction &MF, SmallVectorImpl<int> &ObjectsToAllocate) const { … } unsigned X86FrameLowering::getWinEHParentFrameOffset(const MachineFunction &MF) const { … } void X86FrameLowering::processFunctionBeforeFrameFinalized( MachineFunction &MF, RegScavenger *RS) const { … } void X86FrameLowering::adjustFrameForMsvcCxxEh(MachineFunction &MF) const { … } void X86FrameLowering::processFunctionBeforeFrameIndicesReplaced( MachineFunction &MF, RegScavenger *RS) const { … } void X86FrameLowering::restoreWinEHStackPointersInParent( MachineFunction &MF) const { … } // Compute the alignment gap between current SP after spilling FP/BP and the // next properly aligned stack offset. static int computeFPBPAlignmentGap(MachineFunction &MF, const TargetRegisterClass *RC, unsigned NumSpilledRegs) { … } void X86FrameLowering::spillFPBPUsingSP(MachineFunction &MF, MachineBasicBlock::iterator BeforeMI, Register FP, Register BP, int SPAdjust) const { … } void X86FrameLowering::restoreFPBPUsingSP(MachineFunction &MF, MachineBasicBlock::iterator AfterMI, Register FP, Register BP, int SPAdjust) const { … } void X86FrameLowering::saveAndRestoreFPBPUsingSP( MachineFunction &MF, MachineBasicBlock::iterator BeforeMI, MachineBasicBlock::iterator AfterMI, bool SpillFP, bool SpillBP) const { … } bool X86FrameLowering::skipSpillFPBP( MachineFunction &MF, MachineBasicBlock::reverse_iterator &MI) const { … } static bool isFPBPAccess(const MachineInstr &MI, Register FP, Register BP, const TargetRegisterInfo *TRI, bool &AccessFP, bool &AccessBP) { … } // Invoke instruction has been lowered to normal function call. We try to figure // out if MI comes from Invoke. // Do we have any better method? static bool isInvoke(const MachineInstr &MI, bool InsideEHLabels) { … } /// Given the live range of FP or BP (DefMI, KillMI), check if there is any /// interfered stack access in the range, usually generated by register spill. void X86FrameLowering::checkInterferedAccess( MachineFunction &MF, MachineBasicBlock::reverse_iterator DefMI, MachineBasicBlock::reverse_iterator KillMI, bool SpillFP, bool SpillBP) const { … } /// If a function uses base pointer and the base pointer is clobbered by inline /// asm, RA doesn't detect this case, and after the inline asm, the base pointer /// contains garbage value. /// For example if a 32b x86 function uses base pointer esi, and esi is /// clobbered by following inline asm /// asm("rep movsb" : "+D"(ptr), "+S"(x), "+c"(c)::"memory"); /// We need to save esi before the asm and restore it after the asm. /// /// The problem can also occur to frame pointer if there is a function call, and /// the callee uses a different calling convention and clobbers the fp. /// /// Because normal frame objects (spill slots) are accessed through fp/bp /// register, so we can't spill fp/bp to normal spill slots. /// /// FIXME: There are 2 possible enhancements: /// 1. In many cases there are different physical registers not clobbered by /// inline asm, we can use one of them as base pointer. Or use a virtual /// register as base pointer and let RA allocate a physical register to it. /// 2. If there is no other instructions access stack with fp/bp from the /// inline asm to the epilog, and no cfi requirement for a correct fp, we can /// skip the save and restore operations. void X86FrameLowering::spillFPBP(MachineFunction &MF) const { … }
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