/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Global Instruction Selector for the X86 target *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_GLOBALISEL_PREDICATE_BITSET const unsigned MAX_SUBTARGET_PREDICATES = …; PredicateBitset; #endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET #ifdef GET_GLOBALISEL_TEMPORARIES_DECL mutable MatcherState State; typedef ComplexRendererFns(X86InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const; typedef void(X86InstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const; const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ExecInfo; static X86InstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[]; static X86InstructionSelector::CustomRendererFn CustomRenderers[]; bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override; bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override; bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override; const uint8_t *getMatchTable() const override; bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const MatcherState &State) const override; bool testSimplePredicate(unsigned PredicateID) const override; bool runCustomAction(unsigned FnID, const MatcherState &State, NewMIVector &OutMIs) const override; #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL #ifdef GET_GLOBALISEL_TEMPORARIES_INIT , State(0), ExecInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers) #endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT #ifdef GET_GLOBALISEL_IMPL // LLT Objects. enum { GILLT_s1, GILLT_s8, GILLT_s16, GILLT_s32, GILLT_s64, GILLT_s80, GILLT_s128, GILLT_v2s1, GILLT_v2s64, GILLT_v4s1, GILLT_v4s32, GILLT_v4s64, GILLT_v8s1, GILLT_v8s16, GILLT_v8s32, GILLT_v8s64, GILLT_v16s1, GILLT_v16s8, GILLT_v16s16, GILLT_v16s32, GILLT_v32s1, GILLT_v32s8, GILLT_v32s16, GILLT_v64s1, GILLT_v64s8, }; const static size_t NumTypeObjects = 25; const static LLT TypeObjects[] = { LLT::scalar(1), LLT::scalar(8), LLT::scalar(16), LLT::scalar(32), LLT::scalar(64), LLT::scalar(80), LLT::scalar(128), LLT::vector(ElementCount::getFixed(2), 1), LLT::vector(ElementCount::getFixed(2), 64), LLT::vector(ElementCount::getFixed(4), 1), LLT::vector(ElementCount::getFixed(4), 32), LLT::vector(ElementCount::getFixed(4), 64), LLT::vector(ElementCount::getFixed(8), 1), LLT::vector(ElementCount::getFixed(8), 16), LLT::vector(ElementCount::getFixed(8), 32), LLT::vector(ElementCount::getFixed(8), 64), LLT::vector(ElementCount::getFixed(16), 1), LLT::vector(ElementCount::getFixed(16), 8), LLT::vector(ElementCount::getFixed(16), 16), LLT::vector(ElementCount::getFixed(16), 32), LLT::vector(ElementCount::getFixed(32), 1), LLT::vector(ElementCount::getFixed(32), 8), LLT::vector(ElementCount::getFixed(32), 16), LLT::vector(ElementCount::getFixed(64), 1), LLT::vector(ElementCount::getFixed(64), 8), }; // Bits for subtarget features that participate in instruction matching. enum SubtargetFeatureBits : uint8_t { Feature_TruePredicateBit = 60, Feature_HasEGPRBit = 5, Feature_NoEGPRBit = 4, Feature_HasNDDBit = 6, Feature_NoNDDBit = 26, Feature_HasCFBit = 29, Feature_HasCMOVBit = 28, Feature_NoCMOVBit = 131, Feature_HasMMXBit = 107, Feature_HasSSE1Bit = 46, Feature_UseSSE1Bit = 53, Feature_HasSSE2Bit = 45, Feature_UseSSE2Bit = 54, Feature_HasSSE3Bit = 37, Feature_UseSSE3Bit = 63, Feature_HasSSSE3Bit = 108, Feature_UseSSSE3Bit = 64, Feature_UseSSE41Bit = 61, Feature_UseSSE42Bit = 68, Feature_HasSSE4ABit = 78, Feature_NoAVXBit = 74, Feature_HasAVXBit = 55, Feature_HasAVX2Bit = 49, Feature_HasAVX1OnlyBit = 47, Feature_HasEVEX512Bit = 138, Feature_HasAVX10_2Bit = 106, Feature_HasAVX10_2_512Bit = 105, Feature_NoAVX10_2Bit = 67, Feature_HasAVX512Bit = 91, Feature_UseAVXBit = 51, Feature_NoAVX512Bit = 42, Feature_HasCDIBit = 95, Feature_HasVPOPCNTDQBit = 99, Feature_HasDQIBit = 93, Feature_NoDQIBit = 65, Feature_HasBWIBit = 94, Feature_NoBWIBit = 62, Feature_HasVLXBit = 92, Feature_NoVLXBit = 41, Feature_NoVLX_Or_NoBWIBit = 59, Feature_HasVNNIBit = 101, Feature_HasVP2INTERSECTBit = 103, Feature_HasBF16Bit = 104, Feature_HasFP16Bit = 97, Feature_HasAVXVNNIINT16Bit = 90, Feature_HasAVXVNNIINT8Bit = 85, Feature_HasAVXVNNIBit = 79, Feature_NoVLX_Or_NoVNNIBit = 80, Feature_HasBITALGBit = 102, Feature_HasPOPCNTBit = 66, Feature_HasAESBit = 71, Feature_HasVAESBit = 73, Feature_NoVLX_Or_NoVAESBit = 72, Feature_HasFXSRBit = 38, Feature_HasX87Bit = 36, Feature_HasXSAVEBit = 120, Feature_HasXSAVEOPTBit = 121, Feature_HasXSAVECBit = 122, Feature_HasXSAVESBit = 123, Feature_HasPCLMULBit = 75, Feature_NoVLX_Or_NoVPCLMULQDQBit = 76, Feature_HasVPCLMULQDQBit = 77, Feature_HasGFNIBit = 82, Feature_HasFMABit = 39, Feature_HasFMA4Bit = 43, Feature_NoFMA4Bit = 40, Feature_HasXOPBit = 44, Feature_HasTBMBit = 25, Feature_NoTBMBit = 136, Feature_HasLWPBit = 12, Feature_HasMOVBEBit = 3, Feature_NoNDD_Or_NoMOVBEBit = 2, Feature_HasRDRANDBit = 7, Feature_HasF16CBit = 81, Feature_HasFSGSBaseBit = 124, Feature_HasLZCNTBit = 9, Feature_HasBMIBit = 10, Feature_HasBMI2Bit = 11, Feature_NoBMI2Bit = 135, Feature_HasVBMIBit = 96, Feature_HasVBMI2Bit = 100, Feature_HasIFMABit = 98, Feature_HasAVXIFMABit = 83, Feature_NoVLX_Or_NoIFMABit = 84, Feature_HasRTMBit = 110, Feature_HasSHABit = 70, Feature_HasSHA512Bit = 87, Feature_HasSM3Bit = 88, Feature_HasRDSEEDBit = 8, Feature_HasSSEPrefetchBit = 56, Feature_HasPREFETCHIBit = 20, Feature_HasPrefetchWBit = 109, Feature_HasMWAITXBit = 134, Feature_HasCLDEMOTEBit = 24, Feature_HasMOVDIRIBit = 14, Feature_HasMOVDIR64BBit = 15, Feature_HasPTWRITEBit = 127, Feature_FPStackf32Bit = 34, Feature_FPStackf64Bit = 35, Feature_HasSM4Bit = 89, Feature_HasCLFLUSHBit = 57, Feature_HasCLFLUSHOPTBit = 22, Feature_HasCLWBBit = 23, Feature_HasWBNOINVDBit = 119, Feature_HasRDPIDBit = 126, Feature_HasWAITPKGBit = 13, Feature_HasINVPCIDBit = 125, Feature_HasCX8Bit = 132, Feature_HasCX16Bit = 133, Feature_HasENQCMDBit = 16, Feature_HasAMXFP16Bit = 115, Feature_HasCMPCCXADDBit = 21, Feature_HasAVXNECONVERTBit = 86, Feature_HasKLBit = 111, Feature_HasRAOINTBit = 117, Feature_HasSERIALIZEBit = 17, Feature_HasTSXLDTRKBit = 18, Feature_HasAMXTILEBit = 112, Feature_HasAMXBF16Bit = 114, Feature_HasAMXINT8Bit = 113, Feature_HasAMXCOMPLEXBit = 116, Feature_HasUINTRBit = 19, Feature_HasUSERMSRBit = 118, Feature_HasCRC32Bit = 69, Feature_Not64BitModeBit = 0, Feature_In64BitModeBit = 1, Feature_IsLP64Bit = 129, Feature_NotLP64Bit = 128, Feature_NotWin64WithoutFPBit = 130, Feature_IsPSBit = 140, Feature_NotPSBit = 139, Feature_KernelCodeBit = 141, Feature_NearDataBit = 143, Feature_IsNotPICBit = 142, Feature_OptForSizeBit = 50, Feature_OptForMinSizeBit = 48, Feature_OptForSpeedBit = 137, Feature_UseIncDecBit = 27, Feature_NoSSE41_Or_OptForSizeBit = 52, Feature_CallImmAddrBit = 144, Feature_FavorMemIndirectCallBit = 30, Feature_HasFastSHLDRotateBit = 33, Feature_HasMFenceBit = 58, Feature_UseIndirectThunkCallsBit = 32, Feature_NotUseIndirectThunkCallsBit = 31, }; PredicateBitset X86InstructionSelector:: computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const { PredicateBitset Features{}; if (true) Features.set(Feature_TruePredicateBit); if (Subtarget->hasEGPR()) Features.set(Feature_HasEGPRBit); if (!Subtarget->hasEGPR()) Features.set(Feature_NoEGPRBit); if (Subtarget->hasNDD()) Features.set(Feature_HasNDDBit); if (!Subtarget->hasNDD()) Features.set(Feature_NoNDDBit); if (Subtarget->hasCF()) Features.set(Feature_HasCFBit); if (Subtarget->canUseCMOV()) Features.set(Feature_HasCMOVBit); if (!Subtarget->canUseCMOV()) Features.set(Feature_NoCMOVBit); if (Subtarget->hasMMX()) Features.set(Feature_HasMMXBit); if (Subtarget->hasSSE1()) Features.set(Feature_HasSSE1Bit); if (Subtarget->hasSSE1() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE1Bit); if (Subtarget->hasSSE2()) Features.set(Feature_HasSSE2Bit); if (Subtarget->hasSSE2() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE2Bit); if (Subtarget->hasSSE3()) Features.set(Feature_HasSSE3Bit); if (Subtarget->hasSSE3() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE3Bit); if (Subtarget->hasSSSE3()) Features.set(Feature_HasSSSE3Bit); if (Subtarget->hasSSSE3() && !Subtarget->hasAVX()) Features.set(Feature_UseSSSE3Bit); if (Subtarget->hasSSE41() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE41Bit); if (Subtarget->hasSSE42() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE42Bit); if (Subtarget->hasSSE4A()) Features.set(Feature_HasSSE4ABit); if (!Subtarget->hasAVX()) Features.set(Feature_NoAVXBit); if (Subtarget->hasAVX()) Features.set(Feature_HasAVXBit); if (Subtarget->hasAVX2()) Features.set(Feature_HasAVX2Bit); if (Subtarget->hasAVX() && !Subtarget->hasAVX2()) Features.set(Feature_HasAVX1OnlyBit); if (Subtarget->hasEVEX512()) Features.set(Feature_HasEVEX512Bit); if (Subtarget->hasAVX10_2()) Features.set(Feature_HasAVX10_2Bit); if (Subtarget->hasAVX10_2_512()) Features.set(Feature_HasAVX10_2_512Bit); if (!Subtarget->hasAVX10_2()) Features.set(Feature_NoAVX10_2Bit); if (Subtarget->hasAVX512()) Features.set(Feature_HasAVX512Bit); if (Subtarget->hasAVX() && !Subtarget->hasAVX512()) Features.set(Feature_UseAVXBit); if (!Subtarget->hasAVX512()) Features.set(Feature_NoAVX512Bit); if (Subtarget->hasCDI()) Features.set(Feature_HasCDIBit); if (Subtarget->hasVPOPCNTDQ()) Features.set(Feature_HasVPOPCNTDQBit); if (Subtarget->hasDQI()) Features.set(Feature_HasDQIBit); if (!Subtarget->hasDQI()) Features.set(Feature_NoDQIBit); if (Subtarget->hasBWI()) Features.set(Feature_HasBWIBit); if (!Subtarget->hasBWI()) Features.set(Feature_NoBWIBit); if (Subtarget->hasVLX()) Features.set(Feature_HasVLXBit); if (!Subtarget->hasVLX()) Features.set(Feature_NoVLXBit); if (!Subtarget->hasVLX() || !Subtarget->hasBWI()) Features.set(Feature_NoVLX_Or_NoBWIBit); if (Subtarget->hasVNNI()) Features.set(Feature_HasVNNIBit); if (Subtarget->hasVP2INTERSECT()) Features.set(Feature_HasVP2INTERSECTBit); if (Subtarget->hasBF16()) Features.set(Feature_HasBF16Bit); if (Subtarget->hasFP16()) Features.set(Feature_HasFP16Bit); if (Subtarget->hasAVXVNNIINT16()) Features.set(Feature_HasAVXVNNIINT16Bit); if (Subtarget->hasAVXVNNIINT8()) Features.set(Feature_HasAVXVNNIINT8Bit); if (Subtarget->hasAVXVNNI()) Features.set(Feature_HasAVXVNNIBit); if (!Subtarget->hasVLX() || !Subtarget->hasVNNI()) Features.set(Feature_NoVLX_Or_NoVNNIBit); if (Subtarget->hasBITALG()) Features.set(Feature_HasBITALGBit); if (Subtarget->hasPOPCNT()) Features.set(Feature_HasPOPCNTBit); if (Subtarget->hasAES()) Features.set(Feature_HasAESBit); if (Subtarget->hasVAES()) Features.set(Feature_HasVAESBit); if (!Subtarget->hasVLX() || !Subtarget->hasVAES()) Features.set(Feature_NoVLX_Or_NoVAESBit); if (Subtarget->hasFXSR()) Features.set(Feature_HasFXSRBit); if (Subtarget->hasX87()) Features.set(Feature_HasX87Bit); if (Subtarget->hasXSAVE()) Features.set(Feature_HasXSAVEBit); if (Subtarget->hasXSAVEOPT()) Features.set(Feature_HasXSAVEOPTBit); if (Subtarget->hasXSAVEC()) Features.set(Feature_HasXSAVECBit); if (Subtarget->hasXSAVES()) Features.set(Feature_HasXSAVESBit); if (Subtarget->hasPCLMUL()) Features.set(Feature_HasPCLMULBit); if (!Subtarget->hasVLX() || !Subtarget->hasVPCLMULQDQ()) Features.set(Feature_NoVLX_Or_NoVPCLMULQDQBit); if (Subtarget->hasVPCLMULQDQ()) Features.set(Feature_HasVPCLMULQDQBit); if (Subtarget->hasGFNI()) Features.set(Feature_HasGFNIBit); if (Subtarget->hasFMA()) Features.set(Feature_HasFMABit); if (Subtarget->hasFMA4()) Features.set(Feature_HasFMA4Bit); if (!Subtarget->hasFMA4()) Features.set(Feature_NoFMA4Bit); if (Subtarget->hasXOP()) Features.set(Feature_HasXOPBit); if (Subtarget->hasTBM()) Features.set(Feature_HasTBMBit); if (!Subtarget->hasTBM()) Features.set(Feature_NoTBMBit); if (Subtarget->hasLWP()) Features.set(Feature_HasLWPBit); if (Subtarget->hasMOVBE()) Features.set(Feature_HasMOVBEBit); if (!Subtarget->hasNDD() || !Subtarget->hasMOVBE()) Features.set(Feature_NoNDD_Or_NoMOVBEBit); if (Subtarget->hasRDRAND()) Features.set(Feature_HasRDRANDBit); if (Subtarget->hasF16C()) Features.set(Feature_HasF16CBit); if (Subtarget->hasFSGSBase()) Features.set(Feature_HasFSGSBaseBit); if (Subtarget->hasLZCNT()) Features.set(Feature_HasLZCNTBit); if (Subtarget->hasBMI()) Features.set(Feature_HasBMIBit); if (Subtarget->hasBMI2()) Features.set(Feature_HasBMI2Bit); if (!Subtarget->hasBMI2()) Features.set(Feature_NoBMI2Bit); if (Subtarget->hasVBMI()) Features.set(Feature_HasVBMIBit); if (Subtarget->hasVBMI2()) Features.set(Feature_HasVBMI2Bit); if (Subtarget->hasIFMA()) Features.set(Feature_HasIFMABit); if (Subtarget->hasAVXIFMA()) Features.set(Feature_HasAVXIFMABit); if (!Subtarget->hasVLX() || !Subtarget->hasIFMA()) Features.set(Feature_NoVLX_Or_NoIFMABit); if (Subtarget->hasRTM()) Features.set(Feature_HasRTMBit); if (Subtarget->hasSHA()) Features.set(Feature_HasSHABit); if (Subtarget->hasSHA512()) Features.set(Feature_HasSHA512Bit); if (Subtarget->hasSM3()) Features.set(Feature_HasSM3Bit); if (Subtarget->hasRDSEED()) Features.set(Feature_HasRDSEEDBit); if (Subtarget->hasSSEPrefetch()) Features.set(Feature_HasSSEPrefetchBit); if (Subtarget->hasPREFETCHI()) Features.set(Feature_HasPREFETCHIBit); if (Subtarget->hasPrefetchW()) Features.set(Feature_HasPrefetchWBit); if (Subtarget->hasMWAITX()) Features.set(Feature_HasMWAITXBit); if (Subtarget->hasCLDEMOTE()) Features.set(Feature_HasCLDEMOTEBit); if (Subtarget->hasMOVDIRI()) Features.set(Feature_HasMOVDIRIBit); if (Subtarget->hasMOVDIR64B()) Features.set(Feature_HasMOVDIR64BBit); if (Subtarget->hasPTWRITE()) Features.set(Feature_HasPTWRITEBit); if (!Subtarget->hasSSE1()) Features.set(Feature_FPStackf32Bit); if (!Subtarget->hasSSE2()) Features.set(Feature_FPStackf64Bit); if (Subtarget->hasSM4()) Features.set(Feature_HasSM4Bit); if (Subtarget->hasCLFLUSH()) Features.set(Feature_HasCLFLUSHBit); if (Subtarget->hasCLFLUSHOPT()) Features.set(Feature_HasCLFLUSHOPTBit); if (Subtarget->hasCLWB()) Features.set(Feature_HasCLWBBit); if (Subtarget->hasWBNOINVD()) Features.set(Feature_HasWBNOINVDBit); if (Subtarget->hasRDPID()) Features.set(Feature_HasRDPIDBit); if (Subtarget->hasWAITPKG()) Features.set(Feature_HasWAITPKGBit); if (Subtarget->hasINVPCID()) Features.set(Feature_HasINVPCIDBit); if (Subtarget->hasCX8()) Features.set(Feature_HasCX8Bit); if (Subtarget->hasCX16()) Features.set(Feature_HasCX16Bit); if (Subtarget->hasENQCMD()) Features.set(Feature_HasENQCMDBit); if (Subtarget->hasAMXFP16()) Features.set(Feature_HasAMXFP16Bit); if (Subtarget->hasCMPCCXADD()) Features.set(Feature_HasCMPCCXADDBit); if (Subtarget->hasAVXNECONVERT()) Features.set(Feature_HasAVXNECONVERTBit); if (Subtarget->hasKL()) Features.set(Feature_HasKLBit); if (Subtarget->hasRAOINT()) Features.set(Feature_HasRAOINTBit); if (Subtarget->hasSERIALIZE()) Features.set(Feature_HasSERIALIZEBit); if (Subtarget->hasTSXLDTRK()) Features.set(Feature_HasTSXLDTRKBit); if (Subtarget->hasAMXTILE()) Features.set(Feature_HasAMXTILEBit); if (Subtarget->hasAMXBF16()) Features.set(Feature_HasAMXBF16Bit); if (Subtarget->hasAMXINT8()) Features.set(Feature_HasAMXINT8Bit); if (Subtarget->hasAMXCOMPLEX()) Features.set(Feature_HasAMXCOMPLEXBit); if (Subtarget->hasUINTR()) Features.set(Feature_HasUINTRBit); if (Subtarget->hasUSERMSR()) Features.set(Feature_HasUSERMSRBit); if (Subtarget->hasCRC32()) Features.set(Feature_HasCRC32Bit); if (!Subtarget->is64Bit()) Features.set(Feature_Not64BitModeBit); if (Subtarget->is64Bit()) Features.set(Feature_In64BitModeBit); if (Subtarget->isTarget64BitLP64()) Features.set(Feature_IsLP64Bit); if (!Subtarget->isTarget64BitLP64()) Features.set(Feature_NotLP64Bit); if (Subtarget->isTargetPS()) Features.set(Feature_IsPSBit); if (!Subtarget->isTargetPS()) Features.set(Feature_NotPSBit); if (TM.getCodeModel() == CodeModel::Kernel) Features.set(Feature_KernelCodeBit); if (TM.getCodeModel() == CodeModel::Small ||TM.getCodeModel() == CodeModel::Kernel) Features.set(Feature_NearDataBit); if (!TM.isPositionIndependent()) Features.set(Feature_IsNotPICBit); if (Subtarget->isLegalToCallImmediateAddr()) Features.set(Feature_CallImmAddrBit); if (!Subtarget->slowTwoMemOps()) Features.set(Feature_FavorMemIndirectCallBit); if (Subtarget->hasFastSHLDRotate()) Features.set(Feature_HasFastSHLDRotateBit); if (Subtarget->hasMFence()) Features.set(Feature_HasMFenceBit); if (Subtarget->useIndirectThunkCalls()) Features.set(Feature_UseIndirectThunkCallsBit); if (!Subtarget->useIndirectThunkCalls()) Features.set(Feature_NotUseIndirectThunkCallsBit); return Features; } void X86InstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) { AvailableFunctionFeatures = computeAvailableFunctionFeatures((const X86Subtarget *)&MF.getSubtarget(), &MF); } PredicateBitset X86InstructionSelector:: computeAvailableFunctionFeatures(const X86Subtarget *Subtarget, const MachineFunction *MF) const { PredicateBitset Features{}; if (!Subtarget->isTargetWin64() ||Subtarget->getFrameLowering()->hasFP(*MF)) Features.set(Feature_NotWin64WithoutFPBit); if (shouldOptForSize(MF)) Features.set(Feature_OptForSizeBit); if (MF->getFunction().hasMinSize()) Features.set(Feature_OptForMinSizeBit); if (!shouldOptForSize(MF)) Features.set(Feature_OptForSpeedBit); if (!Subtarget->slowIncDec() || shouldOptForSize(MF)) Features.set(Feature_UseIncDecBit); if (shouldOptForSize(MF) || !Subtarget->hasSSE41()) Features.set(Feature_NoSSE41_Or_OptForSizeBit); return Features; } // Feature bitsets. enum { GIFBS_Invalid, GIFBS_FPStackf32, GIFBS_FPStackf64, GIFBS_HasAVX, GIFBS_HasAVX10_2, GIFBS_HasAVX10_2_512, GIFBS_HasAVX1Only, GIFBS_HasAVX2, GIFBS_HasAVX512, GIFBS_HasAVXNECONVERT, GIFBS_HasBITALG, GIFBS_HasBWI, GIFBS_HasCDI, GIFBS_HasDQI, GIFBS_HasFP16, GIFBS_HasFastSHLDRotate, GIFBS_HasKL, GIFBS_HasLWP, GIFBS_HasMFence, GIFBS_HasMMX, GIFBS_HasMOVBE, GIFBS_HasMWAITX, GIFBS_HasNDD, GIFBS_HasPTWRITE, GIFBS_HasRTM, GIFBS_HasSERIALIZE, GIFBS_HasSHA, GIFBS_HasSHA512, GIFBS_HasSM3, GIFBS_HasSM4, GIFBS_HasSSE1, GIFBS_HasSSE2, GIFBS_HasSSE3, GIFBS_HasSSE4A, GIFBS_HasTBM, GIFBS_HasTSXLDTRK, GIFBS_HasVBMI2, GIFBS_HasVLX, GIFBS_HasVPOPCNTDQ, GIFBS_HasWAITPKG, GIFBS_HasWBNOINVD, GIFBS_HasX87, GIFBS_HasXOP, GIFBS_In64BitMode, GIFBS_IsPS, GIFBS_NoDQI, GIFBS_NoNDD, GIFBS_NoNDD_Or_NoMOVBE, GIFBS_Not64BitMode, GIFBS_NotPS, GIFBS_UseAVX, GIFBS_UseSSE1, GIFBS_UseSSE2, GIFBS_UseSSE41, GIFBS_UseSSSE3, GIFBS_HasAES_HasAVX, GIFBS_HasAES_NoAVX, GIFBS_HasAMXBF16_In64BitMode, GIFBS_HasAMXCOMPLEX_In64BitMode, GIFBS_HasAMXFP16_In64BitMode, GIFBS_HasAMXINT8_In64BitMode, GIFBS_HasAMXTILE_In64BitMode, GIFBS_HasAVX_In64BitMode, GIFBS_HasAVX_NoAVX10_2, GIFBS_HasAVX_NoBWI, GIFBS_HasAVX_NoVLX, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIFBS_HasAVX2_NoVLX, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIFBS_HasAVX512_HasVAES, GIFBS_HasAVX512_HasVLX, GIFBS_HasAVX512_HasVPCLMULQDQ, GIFBS_HasAVX512_NoBWI, GIFBS_HasAVX512_NoDQI, GIFBS_HasBF16_HasVLX, GIFBS_HasBITALG_HasVLX, GIFBS_HasBMI_HasEGPR, GIFBS_HasBMI_NoEGPR, GIFBS_HasBMI2_HasEGPR, GIFBS_HasBMI2_NoEGPR, GIFBS_HasBWI_HasVLX, GIFBS_HasCDI_HasVLX, GIFBS_HasCRC32_NoEGPR, GIFBS_HasDQI_HasVLX, GIFBS_HasDQI_NoBWI, GIFBS_HasFMA4_NoAVX512, GIFBS_HasFMA4_NoVLX, GIFBS_HasFP16_HasVLX, GIFBS_HasFSGSBase_In64BitMode, GIFBS_HasNDD_In64BitMode, GIFBS_HasNDD_UseIncDec, GIFBS_HasPCLMUL_NoAVX, GIFBS_HasPTWRITE_In64BitMode, GIFBS_HasRDPID_In64BitMode, GIFBS_HasRDPID_Not64BitMode, GIFBS_HasUINTR_In64BitMode, GIFBS_HasUSERMSR_NoEGPR, GIFBS_HasVAES_HasVLX, GIFBS_HasVAES_NoVLX, GIFBS_HasVBMI2_HasVLX, GIFBS_HasVLX_HasVPCLMULQDQ, GIFBS_HasVLX_HasVPOPCNTDQ, GIFBS_HasVPCLMULQDQ_NoVLX, GIFBS_HasWAITPKG_In64BitMode, GIFBS_HasWAITPKG_Not64BitMode, GIFBS_In64BitMode_UseSSE2, GIFBS_NoNDD_UseIncDec, GIFBS_Not64BitMode_OptForSize, GIFBS_NotWin64WithoutFP_OptForMinSize, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ, GIFBS_HasAVX512_HasEVEX512_NoVLX, GIFBS_HasBITALG_HasEVEX512_NoVLX, GIFBS_HasBWI_HasEVEX512_NoVLX, GIFBS_HasCDI_HasEVEX512_NoVLX, GIFBS_HasCRC32_HasEGPR_In64BitMode, GIFBS_HasDQI_HasEVEX512_NoVLX, GIFBS_HasDQI_HasVLX_NoBWI, GIFBS_HasEGPR_HasUSERMSR_In64BitMode, GIFBS_HasEVEX512_HasVPOPCNTDQ_NoVLX, GIFBS_HasFMA_NoAVX512_NoFMA4, GIFBS_HasFMA_NoFMA4_NoVLX, GIFBS_HasMOVBE_HasNDD_In64BitMode, }; constexpr static PredicateBitset FeatureBitsets[] { {}, // GIFBS_Invalid {Feature_FPStackf32Bit, }, {Feature_FPStackf64Bit, }, {Feature_HasAVXBit, }, {Feature_HasAVX10_2Bit, }, {Feature_HasAVX10_2_512Bit, }, {Feature_HasAVX1OnlyBit, }, {Feature_HasAVX2Bit, }, {Feature_HasAVX512Bit, }, {Feature_HasAVXNECONVERTBit, }, {Feature_HasBITALGBit, }, {Feature_HasBWIBit, }, {Feature_HasCDIBit, }, {Feature_HasDQIBit, }, {Feature_HasFP16Bit, }, {Feature_HasFastSHLDRotateBit, }, {Feature_HasKLBit, }, {Feature_HasLWPBit, }, {Feature_HasMFenceBit, }, {Feature_HasMMXBit, }, {Feature_HasMOVBEBit, }, {Feature_HasMWAITXBit, }, {Feature_HasNDDBit, }, {Feature_HasPTWRITEBit, }, {Feature_HasRTMBit, }, {Feature_HasSERIALIZEBit, }, {Feature_HasSHABit, }, {Feature_HasSHA512Bit, }, {Feature_HasSM3Bit, }, {Feature_HasSM4Bit, }, {Feature_HasSSE1Bit, }, {Feature_HasSSE2Bit, }, {Feature_HasSSE3Bit, }, {Feature_HasSSE4ABit, }, {Feature_HasTBMBit, }, {Feature_HasTSXLDTRKBit, }, {Feature_HasVBMI2Bit, }, {Feature_HasVLXBit, }, {Feature_HasVPOPCNTDQBit, }, {Feature_HasWAITPKGBit, }, {Feature_HasWBNOINVDBit, }, {Feature_HasX87Bit, }, {Feature_HasXOPBit, }, {Feature_In64BitModeBit, }, {Feature_IsPSBit, }, {Feature_NoDQIBit, }, {Feature_NoNDDBit, }, {Feature_NoNDD_Or_NoMOVBEBit, }, {Feature_Not64BitModeBit, }, {Feature_NotPSBit, }, {Feature_UseAVXBit, }, {Feature_UseSSE1Bit, }, {Feature_UseSSE2Bit, }, {Feature_UseSSE41Bit, }, {Feature_UseSSSE3Bit, }, {Feature_HasAESBit, Feature_HasAVXBit, }, {Feature_HasAESBit, Feature_NoAVXBit, }, {Feature_HasAMXBF16Bit, Feature_In64BitModeBit, }, {Feature_HasAMXCOMPLEXBit, Feature_In64BitModeBit, }, {Feature_HasAMXFP16Bit, Feature_In64BitModeBit, }, {Feature_HasAMXINT8Bit, Feature_In64BitModeBit, }, {Feature_HasAMXTILEBit, Feature_In64BitModeBit, }, {Feature_HasAVXBit, Feature_In64BitModeBit, }, {Feature_HasAVXBit, Feature_NoAVX10_2Bit, }, {Feature_HasAVXBit, Feature_NoBWIBit, }, {Feature_HasAVXBit, Feature_NoVLXBit, }, {Feature_HasAVXBit, Feature_NoVLX_Or_NoBWIBit, }, {Feature_HasAVX2Bit, Feature_NoVLXBit, }, {Feature_HasAVX2Bit, Feature_NoVLX_Or_NoBWIBit, }, {Feature_HasAVX512Bit, Feature_HasVAESBit, }, {Feature_HasAVX512Bit, Feature_HasVLXBit, }, {Feature_HasAVX512Bit, Feature_HasVPCLMULQDQBit, }, {Feature_HasAVX512Bit, Feature_NoBWIBit, }, {Feature_HasAVX512Bit, Feature_NoDQIBit, }, {Feature_HasBF16Bit, Feature_HasVLXBit, }, {Feature_HasBITALGBit, Feature_HasVLXBit, }, {Feature_HasBMIBit, Feature_HasEGPRBit, }, {Feature_HasBMIBit, Feature_NoEGPRBit, }, {Feature_HasBMI2Bit, Feature_HasEGPRBit, }, {Feature_HasBMI2Bit, Feature_NoEGPRBit, }, {Feature_HasBWIBit, Feature_HasVLXBit, }, {Feature_HasCDIBit, Feature_HasVLXBit, }, {Feature_HasCRC32Bit, Feature_NoEGPRBit, }, {Feature_HasDQIBit, Feature_HasVLXBit, }, {Feature_HasDQIBit, Feature_NoBWIBit, }, {Feature_HasFMA4Bit, Feature_NoAVX512Bit, }, {Feature_HasFMA4Bit, Feature_NoVLXBit, }, {Feature_HasFP16Bit, Feature_HasVLXBit, }, {Feature_HasFSGSBaseBit, Feature_In64BitModeBit, }, {Feature_HasNDDBit, Feature_In64BitModeBit, }, {Feature_HasNDDBit, Feature_UseIncDecBit, }, {Feature_HasPCLMULBit, Feature_NoAVXBit, }, {Feature_HasPTWRITEBit, Feature_In64BitModeBit, }, {Feature_HasRDPIDBit, Feature_In64BitModeBit, }, {Feature_HasRDPIDBit, Feature_Not64BitModeBit, }, {Feature_HasUINTRBit, Feature_In64BitModeBit, }, {Feature_HasUSERMSRBit, Feature_NoEGPRBit, }, {Feature_HasVAESBit, Feature_HasVLXBit, }, {Feature_HasVAESBit, Feature_NoVLXBit, }, {Feature_HasVBMI2Bit, Feature_HasVLXBit, }, {Feature_HasVLXBit, Feature_HasVPCLMULQDQBit, }, {Feature_HasVLXBit, Feature_HasVPOPCNTDQBit, }, {Feature_HasVPCLMULQDQBit, Feature_NoVLXBit, }, {Feature_HasWAITPKGBit, Feature_In64BitModeBit, }, {Feature_HasWAITPKGBit, Feature_Not64BitModeBit, }, {Feature_In64BitModeBit, Feature_UseSSE2Bit, }, {Feature_NoNDDBit, Feature_UseIncDecBit, }, {Feature_Not64BitModeBit, Feature_OptForSizeBit, }, {Feature_NotWin64WithoutFPBit, Feature_OptForMinSizeBit, }, {Feature_HasAESBit, Feature_HasAVXBit, Feature_NoVLX_Or_NoVAESBit, }, {Feature_HasAVXBit, Feature_HasPCLMULBit, Feature_NoVLX_Or_NoVPCLMULQDQBit, }, {Feature_HasAVX512Bit, Feature_HasEVEX512Bit, Feature_NoVLXBit, }, {Feature_HasBITALGBit, Feature_HasEVEX512Bit, Feature_NoVLXBit, }, {Feature_HasBWIBit, Feature_HasEVEX512Bit, Feature_NoVLXBit, }, {Feature_HasCDIBit, Feature_HasEVEX512Bit, Feature_NoVLXBit, }, {Feature_HasCRC32Bit, Feature_HasEGPRBit, Feature_In64BitModeBit, }, {Feature_HasDQIBit, Feature_HasEVEX512Bit, Feature_NoVLXBit, }, {Feature_HasDQIBit, Feature_HasVLXBit, Feature_NoBWIBit, }, {Feature_HasEGPRBit, Feature_HasUSERMSRBit, Feature_In64BitModeBit, }, {Feature_HasEVEX512Bit, Feature_HasVPOPCNTDQBit, Feature_NoVLXBit, }, {Feature_HasFMABit, Feature_NoAVX512Bit, Feature_NoFMA4Bit, }, {Feature_HasFMABit, Feature_NoFMA4Bit, Feature_NoVLXBit, }, {Feature_HasMOVBEBit, Feature_HasNDDBit, Feature_In64BitModeBit, }, }; // ComplexPattern predicates. enum { GICP_Invalid, }; // See constructor for table contents X86InstructionSelector::ComplexMatcherMemFn X86InstructionSelector::ComplexPredicateFns[] = { nullptr, // GICP_Invalid }; // PatFrag predicates. bool X86InstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const MatcherState &State) const { const MachineFunction &MF = *MI.getParent()->getParent(); const MachineRegisterInfo &MRI = MF.getRegInfo(); const auto &Operands = State.RecordedOperands; (void)Operands; (void)MRI; llvm_unreachable("Unknown predicate"); return false; } // PatFrag predicates. enum { GICXXPred_I64_Predicate_AndMask64 = GICXXPred_Invalid + 1, GICXXPred_I64_Predicate_BTCBTSMask64, GICXXPred_I64_Predicate_BTRMask64, GICXXPred_I64_Predicate_i16immSExt8, GICXXPred_I64_Predicate_i32immSExt8, GICXXPred_I64_Predicate_i64immSExt8, GICXXPred_I64_Predicate_i64immSExt32, GICXXPred_I64_Predicate_i64immZExt32, GICXXPred_I64_Predicate_i64immZExt32SExt8, GICXXPred_I64_Predicate_i64timmSExt32, GICXXPred_I64_Predicate_immff00_ffff, }; bool X86InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const { switch (PredicateID) { case GICXXPred_I64_Predicate_AndMask64: { return isMask_64(Imm) && !isUInt<32>(Imm); } case GICXXPred_I64_Predicate_BTCBTSMask64: { return !isInt<32>(Imm) && isPowerOf2_64(Imm); } case GICXXPred_I64_Predicate_BTRMask64: { return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm); } case GICXXPred_I64_Predicate_i16immSExt8: { return isInt<8>(Imm); } case GICXXPred_I64_Predicate_i32immSExt8: { return isInt<8>(Imm); } case GICXXPred_I64_Predicate_i64immSExt8: { return isInt<8>(Imm); } case GICXXPred_I64_Predicate_i64immSExt32: { return isInt<32>(Imm); } case GICXXPred_I64_Predicate_i64immZExt32: { return isUInt<32>(Imm); } case GICXXPred_I64_Predicate_i64immZExt32SExt8: { return isUInt<32>(Imm) && isInt<8>(static_cast<int32_t>(Imm)); } case GICXXPred_I64_Predicate_i64timmSExt32: { return isInt<32>(Imm); } case GICXXPred_I64_Predicate_immff00_ffff: { return Imm >= 0xff00 && Imm <= 0xffff; } } llvm_unreachable("Unknown predicate"); return false; } // PatFrag predicates. enum { GICXXPred_APFloat_Predicate_fpimm0 = GICXXPred_Invalid + 1, GICXXPred_APFloat_Predicate_fpimm1, GICXXPred_APFloat_Predicate_fpimmneg0, GICXXPred_APFloat_Predicate_fpimmneg1, }; bool X86InstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const { switch (PredicateID) { case GICXXPred_APFloat_Predicate_fpimm0: { return Imm.isExactlyValue(+0.0); } case GICXXPred_APFloat_Predicate_fpimm1: { return Imm.isExactlyValue(+1.0); } case GICXXPred_APFloat_Predicate_fpimmneg0: { return Imm.isExactlyValue(-0.0); } case GICXXPred_APFloat_Predicate_fpimmneg1: { return Imm.isExactlyValue(-1.0); } } llvm_unreachable("Unknown predicate"); return false; } // PatFrag predicates. bool X86InstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const { llvm_unreachable("Unknown predicate"); return false; } bool X86InstructionSelector::testSimplePredicate(unsigned) const { llvm_unreachable("X86InstructionSelector does not support simple predicates!"); return false; } // Custom renderers. enum { GICR_Invalid, }; X86InstructionSelector::CustomRendererFn X86InstructionSelector::CustomRenderers[] = { nullptr, // GICR_Invalid }; bool X86InstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const { const PredicateBitset AvailableFeatures = getAvailableFeatures(); MachineIRBuilder B(I); State.MIs.clear(); State.MIs.push_back(&I); if (executeMatchTable(*this, State, ExecInfo, B, getMatchTable(), TII, MF->getRegInfo(), TRI, RBI, AvailableFeatures, &CoverageInfo)) { return true; } return false; } bool X86InstructionSelector::runCustomAction(unsigned, const MatcherState&, NewMIVector &) const { llvm_unreachable("X86InstructionSelector does not support custom C++ actions!"); } #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ #define GIMT_Encode2 … #define GIMT_Encode4 … #define GIMT_Encode8 … #else #define GIMT_Encode2 … #define GIMT_Encode4 … #define GIMT_Encode8 … #endif const uint8_t *X86InstructionSelector::getMatchTable() const { constexpr static uint8_t MatchTable0[] = { GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(53), GIMT_Encode2(283), /*)*//*default:*//*Label 67*/ GIMT_Encode4(86324), /*TargetOpcode::G_ADD*//*Label 0*/ GIMT_Encode4(930), /*TargetOpcode::G_SUB*//*Label 1*/ GIMT_Encode4(3288), /*TargetOpcode::G_MUL*//*Label 2*/ GIMT_Encode4(4880), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_AND*//*Label 3*/ GIMT_Encode4(6117), /*TargetOpcode::G_OR*//*Label 4*/ GIMT_Encode4(11913), /*TargetOpcode::G_XOR*//*Label 5*/ GIMT_Encode4(16281), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_CONCAT_VECTORS*//*Label 6*/ GIMT_Encode4(24620), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_BITCAST*//*Label 7*/ GIMT_Encode4(24787), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_INTRINSIC_LRINT*//*Label 8*/ GIMT_Encode4(26526), /*TargetOpcode::G_INTRINSIC_LLRINT*//*Label 9*/ GIMT_Encode4(27388), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_INTRINSIC*//*Label 10*/ GIMT_Encode4(27782), /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 11*/ GIMT_Encode4(33524), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_ANYEXT*//*Label 12*/ GIMT_Encode4(36284), /*TargetOpcode::G_TRUNC*//*Label 13*/ GIMT_Encode4(36719), /*TargetOpcode::G_CONSTANT*//*Label 14*/ GIMT_Encode4(37723), /*TargetOpcode::G_FCONSTANT*//*Label 15*/ GIMT_Encode4(38333), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_SEXT*//*Label 16*/ GIMT_Encode4(38786), GIMT_Encode4(0), /*TargetOpcode::G_ZEXT*//*Label 17*/ GIMT_Encode4(39809), /*TargetOpcode::G_SHL*//*Label 18*/ GIMT_Encode4(40727), /*TargetOpcode::G_LSHR*//*Label 19*/ GIMT_Encode4(41915), /*TargetOpcode::G_ASHR*//*Label 20*/ GIMT_Encode4(42895), /*TargetOpcode::G_FSHL*//*Label 21*/ GIMT_Encode4(43875), /*TargetOpcode::G_FSHR*//*Label 22*/ GIMT_Encode4(44251), /*TargetOpcode::G_ROTR*//*Label 23*/ GIMT_Encode4(44627), /*TargetOpcode::G_ROTL*//*Label 24*/ GIMT_Encode4(46633), /*TargetOpcode::G_ICMP*//*Label 25*/ GIMT_Encode4(48641), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_SELECT*//*Label 26*/ GIMT_Encode4(50298), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_UMULH*//*Label 27*/ GIMT_Encode4(58198), /*TargetOpcode::G_SMULH*//*Label 28*/ GIMT_Encode4(58445), /*TargetOpcode::G_UADDSAT*//*Label 29*/ GIMT_Encode4(58692), /*TargetOpcode::G_SADDSAT*//*Label 30*/ GIMT_Encode4(59142), /*TargetOpcode::G_USUBSAT*//*Label 31*/ GIMT_Encode4(59592), /*TargetOpcode::G_SSUBSAT*//*Label 32*/ GIMT_Encode4(60042), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_FADD*//*Label 33*/ GIMT_Encode4(60492), /*TargetOpcode::G_FSUB*//*Label 34*/ GIMT_Encode4(61571), /*TargetOpcode::G_FMUL*//*Label 35*/ GIMT_Encode4(62650), /*TargetOpcode::G_FMA*//*Label 36*/ GIMT_Encode4(63729), GIMT_Encode4(0), /*TargetOpcode::G_FDIV*//*Label 37*/ GIMT_Encode4(64938), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_FNEG*//*Label 38*/ GIMT_Encode4(66017), /*TargetOpcode::G_FPEXT*//*Label 39*/ GIMT_Encode4(66140), /*TargetOpcode::G_FPTRUNC*//*Label 40*/ GIMT_Encode4(66710), /*TargetOpcode::G_FPTOSI*//*Label 41*/ GIMT_Encode4(67037), /*TargetOpcode::G_FPTOUI*//*Label 42*/ GIMT_Encode4(67534), /*TargetOpcode::G_SITOFP*//*Label 43*/ GIMT_Encode4(67736), /*TargetOpcode::G_UITOFP*//*Label 44*/ GIMT_Encode4(68998), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_FABS*//*Label 45*/ GIMT_Encode4(69848), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_SMIN*//*Label 46*/ GIMT_Encode4(69971), /*TargetOpcode::G_SMAX*//*Label 47*/ GIMT_Encode4(71080), /*TargetOpcode::G_UMIN*//*Label 48*/ GIMT_Encode4(72189), /*TargetOpcode::G_UMAX*//*Label 49*/ GIMT_Encode4(73298), /*TargetOpcode::G_ABS*//*Label 50*/ GIMT_Encode4(74407), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_BR*//*Label 51*/ GIMT_Encode4(75280), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_VECTOR_COMPRESS*//*Label 52*/ GIMT_Encode4(75296), GIMT_Encode4(0), /*TargetOpcode::G_CTTZ_ZERO_UNDEF*//*Label 53*/ GIMT_Encode4(76684), /*TargetOpcode::G_CTLZ*//*Label 54*/ GIMT_Encode4(76798), GIMT_Encode4(0), /*TargetOpcode::G_CTPOP*//*Label 55*/ GIMT_Encode4(77472), /*TargetOpcode::G_BSWAP*//*Label 56*/ GIMT_Encode4(78780), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_FSQRT*//*Label 57*/ GIMT_Encode4(78956), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_STRICT_FADD*//*Label 58*/ GIMT_Encode4(79971), /*TargetOpcode::G_STRICT_FSUB*//*Label 59*/ GIMT_Encode4(80987), /*TargetOpcode::G_STRICT_FMUL*//*Label 60*/ GIMT_Encode4(82003), /*TargetOpcode::G_STRICT_FDIV*//*Label 61*/ GIMT_Encode4(83019), GIMT_Encode4(0), /*TargetOpcode::G_STRICT_FMA*//*Label 62*/ GIMT_Encode4(84035), /*TargetOpcode::G_STRICT_FSQRT*//*Label 63*/ GIMT_Encode4(85244), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*TargetOpcode::G_TRAP*//*Label 64*/ GIMT_Encode4(86259), /*TargetOpcode::G_DEBUGTRAP*//*Label 65*/ GIMT_Encode4(86272), /*TargetOpcode::G_UBSANTRAP*//*Label 66*/ GIMT_Encode4(86308), // Label 0: @930 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(25), /*)*//*default:*//*Label 84*/ GIMT_Encode4(3287), /*GILLT_s8*//*Label 68*/ GIMT_Encode4(1037), /*GILLT_s16*//*Label 69*/ GIMT_Encode4(1270), /*GILLT_s32*//*Label 70*/ GIMT_Encode4(1571), /*GILLT_s64*//*Label 71*/ GIMT_Encode4(1872), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v2s64*//*Label 72*/ GIMT_Encode4(2263), GIMT_Encode4(0), /*GILLT_v4s32*//*Label 73*/ GIMT_Encode4(2357), /*GILLT_v4s64*//*Label 74*/ GIMT_Encode4(2573), GIMT_Encode4(0), /*GILLT_v8s16*//*Label 75*/ GIMT_Encode4(2640), /*GILLT_v8s32*//*Label 76*/ GIMT_Encode4(2856), /*GILLT_v8s64*//*Label 77*/ GIMT_Encode4(2923), GIMT_Encode4(0), /*GILLT_v16s8*//*Label 78*/ GIMT_Encode4(2957), /*GILLT_v16s16*//*Label 79*/ GIMT_Encode4(3051), /*GILLT_v16s32*//*Label 80*/ GIMT_Encode4(3118), GIMT_Encode4(0), /*GILLT_v32s8*//*Label 81*/ GIMT_Encode4(3152), /*GILLT_v32s16*//*Label 82*/ GIMT_Encode4(3219), GIMT_Encode4(0), /*GILLT_v64s8*//*Label 83*/ GIMT_Encode4(3253), // Label 68: @1037 GIM_Try, /*On fail goto*//*Label 85*/ GIMT_Encode4(1269), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_Try, /*On fail goto*//*Label 86*/ GIMT_Encode4(1080), // Rule ID 24151 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, 1:{ *:[i8] }) => (INC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC8r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24151, GIR_EraseRootFromParent_Done, // Label 86: @1080 GIM_Try, /*On fail goto*//*Label 87*/ GIMT_Encode4(1104), // Rule ID 24155 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, -1:{ *:[i8] }) => (DEC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC8r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24155, GIR_EraseRootFromParent_Done, // Label 87: @1104 GIM_Try, /*On fail goto*//*Label 88*/ GIMT_Encode4(1128), // Rule ID 24241 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, 1:{ *:[i8] }) => (INC8r_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC8r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24241, GIR_EraseRootFromParent_Done, // Label 88: @1128 GIM_Try, /*On fail goto*//*Label 89*/ GIMT_Encode4(1152), // Rule ID 24245 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, -1:{ *:[i8] }) => (DEC8r_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC8r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24245, GIR_EraseRootFromParent_Done, // Label 89: @1152 GIM_Try, /*On fail goto*//*Label 90*/ GIMT_Encode4(1185), // Rule ID 24089 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ADD8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD8ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24089, GIR_EraseRootFromParent_Done, // Label 90: @1185 GIM_Try, /*On fail goto*//*Label 91*/ GIMT_Encode4(1218), // Rule ID 24179 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ADD8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD8ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24179, GIR_EraseRootFromParent_Done, // Label 91: @1218 GIM_Try, /*On fail goto*//*Label 92*/ GIMT_Encode4(1243), // Rule ID 24081 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD8rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24081, GIR_Done, // Label 92: @1243 GIM_Try, /*On fail goto*//*Label 93*/ GIMT_Encode4(1268), // Rule ID 24171 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (ADD8rr_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD8rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24171, GIR_Done, // Label 93: @1268 GIM_Reject, // Label 85: @1269 GIM_Reject, // Label 69: @1270 GIM_Try, /*On fail goto*//*Label 94*/ GIMT_Encode4(1570), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_Try, /*On fail goto*//*Label 95*/ GIMT_Encode4(1323), // Rule ID 23891 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128), // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, 128:{ *:[i16] }) => (SUB16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -128:{ *:[i16] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB16ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128), GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23891, GIR_EraseRootFromParent_Done, // Label 95: @1323 GIM_Try, /*On fail goto*//*Label 96*/ GIMT_Encode4(1357), // Rule ID 23897 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128), // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, 128:{ *:[i16] }) => (SUB16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -128:{ *:[i16] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB16ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128), GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23897, GIR_EraseRootFromParent_Done, // Label 96: @1357 GIM_Try, /*On fail goto*//*Label 97*/ GIMT_Encode4(1381), // Rule ID 24152 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, 1:{ *:[i16] }) => (INC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC16r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24152, GIR_EraseRootFromParent_Done, // Label 97: @1381 GIM_Try, /*On fail goto*//*Label 98*/ GIMT_Encode4(1405), // Rule ID 24156 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, -1:{ *:[i16] }) => (DEC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC16r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24156, GIR_EraseRootFromParent_Done, // Label 98: @1405 GIM_Try, /*On fail goto*//*Label 99*/ GIMT_Encode4(1429), // Rule ID 24242 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, 1:{ *:[i16] }) => (INC16r_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC16r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24242, GIR_EraseRootFromParent_Done, // Label 99: @1429 GIM_Try, /*On fail goto*//*Label 100*/ GIMT_Encode4(1453), // Rule ID 24246 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, -1:{ *:[i16] }) => (DEC16r_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC16r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24246, GIR_EraseRootFromParent_Done, // Label 100: @1453 GIM_Try, /*On fail goto*//*Label 101*/ GIMT_Encode4(1486), // Rule ID 24090 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (ADD16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD16ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24090, GIR_EraseRootFromParent_Done, // Label 101: @1486 GIM_Try, /*On fail goto*//*Label 102*/ GIMT_Encode4(1519), // Rule ID 24180 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (ADD16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD16ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24180, GIR_EraseRootFromParent_Done, // Label 102: @1519 GIM_Try, /*On fail goto*//*Label 103*/ GIMT_Encode4(1544), // Rule ID 24082 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD16rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24082, GIR_Done, // Label 103: @1544 GIM_Try, /*On fail goto*//*Label 104*/ GIMT_Encode4(1569), // Rule ID 24172 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (ADD16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD16rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24172, GIR_Done, // Label 104: @1569 GIM_Reject, // Label 94: @1570 GIM_Reject, // Label 70: @1571 GIM_Try, /*On fail goto*//*Label 105*/ GIMT_Encode4(1871), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_Try, /*On fail goto*//*Label 106*/ GIMT_Encode4(1624), // Rule ID 23892 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128), // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, 128:{ *:[i32] }) => (SUB32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -128:{ *:[i32] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB32ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128), GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23892, GIR_EraseRootFromParent_Done, // Label 106: @1624 GIM_Try, /*On fail goto*//*Label 107*/ GIMT_Encode4(1658), // Rule ID 23898 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128), // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, 128:{ *:[i32] }) => (SUB32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -128:{ *:[i32] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB32ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128), GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23898, GIR_EraseRootFromParent_Done, // Label 107: @1658 GIM_Try, /*On fail goto*//*Label 108*/ GIMT_Encode4(1682), // Rule ID 24153 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }) => (INC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC32r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24153, GIR_EraseRootFromParent_Done, // Label 108: @1682 GIM_Try, /*On fail goto*//*Label 109*/ GIMT_Encode4(1706), // Rule ID 24157 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }) => (DEC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC32r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24157, GIR_EraseRootFromParent_Done, // Label 109: @1706 GIM_Try, /*On fail goto*//*Label 110*/ GIMT_Encode4(1730), // Rule ID 24243 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }) => (INC32r_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC32r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24243, GIR_EraseRootFromParent_Done, // Label 110: @1730 GIM_Try, /*On fail goto*//*Label 111*/ GIMT_Encode4(1754), // Rule ID 24247 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }) => (DEC32r_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC32r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24247, GIR_EraseRootFromParent_Done, // Label 111: @1754 GIM_Try, /*On fail goto*//*Label 112*/ GIMT_Encode4(1787), // Rule ID 24091 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (ADD32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD32ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24091, GIR_EraseRootFromParent_Done, // Label 112: @1787 GIM_Try, /*On fail goto*//*Label 113*/ GIMT_Encode4(1820), // Rule ID 24181 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (ADD32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD32ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24181, GIR_EraseRootFromParent_Done, // Label 113: @1820 GIM_Try, /*On fail goto*//*Label 114*/ GIMT_Encode4(1845), // Rule ID 24083 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD32rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24083, GIR_Done, // Label 114: @1845 GIM_Try, /*On fail goto*//*Label 115*/ GIMT_Encode4(1870), // Rule ID 24173 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (ADD32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD32rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24173, GIR_Done, // Label 115: @1870 GIM_Reject, // Label 105: @1871 GIM_Reject, // Label 71: @1872 GIM_Try, /*On fail goto*//*Label 116*/ GIMT_Encode4(2262), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_Try, /*On fail goto*//*Label 117*/ GIMT_Encode4(1925), // Rule ID 23893 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128), // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 128:{ *:[i64] }) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -128:{ *:[i64] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128), GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23893, GIR_EraseRootFromParent_Done, // Label 117: @1925 GIM_Try, /*On fail goto*//*Label 118*/ GIMT_Encode4(1959), // Rule ID 23899 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(128), // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 128:{ *:[i64] }) => (SUB64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -128:{ *:[i64] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128), GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23899, GIR_EraseRootFromParent_Done, // Label 118: @1959 GIM_Try, /*On fail goto*//*Label 119*/ GIMT_Encode4(2000), // Rule ID 23909 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(2147483648), // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 2147483648:{ *:[i64] }) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -2147483648:{ *:[i64] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(-2147483648), GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23909, GIR_EraseRootFromParent_Done, // Label 119: @2000 GIM_Try, /*On fail goto*//*Label 120*/ GIMT_Encode4(2041), // Rule ID 23911 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(2147483648), // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 2147483648:{ *:[i64] }) => (SUB64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -2147483648:{ *:[i64] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(-2147483648), GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23911, GIR_EraseRootFromParent_Done, // Label 120: @2041 GIM_Try, /*On fail goto*//*Label 121*/ GIMT_Encode4(2065), // Rule ID 24154 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }) => (INC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC64r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24154, GIR_EraseRootFromParent_Done, // Label 121: @2065 GIM_Try, /*On fail goto*//*Label 122*/ GIMT_Encode4(2089), // Rule ID 24158 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }) => (DEC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC64r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24158, GIR_EraseRootFromParent_Done, // Label 122: @2089 GIM_Try, /*On fail goto*//*Label 123*/ GIMT_Encode4(2113), // Rule ID 24244 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }) => (INC64r_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INC64r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24244, GIR_EraseRootFromParent_Done, // Label 123: @2113 GIM_Try, /*On fail goto*//*Label 124*/ GIMT_Encode4(2137), // Rule ID 24248 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_UseIncDec), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }) => (DEC64r_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DEC64r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24248, GIR_EraseRootFromParent_Done, // Label 124: @2137 GIM_Try, /*On fail goto*//*Label 125*/ GIMT_Encode4(2174), // Rule ID 24092 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (ADD64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD64ri32), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24092, GIR_EraseRootFromParent_Done, // Label 125: @2174 GIM_Try, /*On fail goto*//*Label 126*/ GIMT_Encode4(2211), // Rule ID 24182 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (ADD64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD64ri32_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24182, GIR_EraseRootFromParent_Done, // Label 126: @2211 GIM_Try, /*On fail goto*//*Label 127*/ GIMT_Encode4(2236), // Rule ID 24084 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD64rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24084, GIR_Done, // Label 127: @2236 GIM_Try, /*On fail goto*//*Label 128*/ GIMT_Encode4(2261), // Rule ID 24174 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (ADD64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::ADD64rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24174, GIR_Done, // Label 128: @2261 GIM_Reject, // Label 116: @2262 GIM_Reject, // Label 72: @2263 GIM_Try, /*On fail goto*//*Label 129*/ GIMT_Encode4(2356), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 130*/ GIMT_Encode4(2301), // Rule ID 2488 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDQrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2488, GIR_Done, // Label 130: @2301 GIM_Try, /*On fail goto*//*Label 131*/ GIMT_Encode4(2328), // Rule ID 2490 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDQrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2490, GIR_Done, // Label 131: @2328 GIM_Try, /*On fail goto*//*Label 132*/ GIMT_Encode4(2355), // Rule ID 4603 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (add:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPADDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4603, GIR_Done, // Label 132: @2355 GIM_Reject, // Label 129: @2356 GIM_Reject, // Label 73: @2357 GIM_Try, /*On fail goto*//*Label 133*/ GIMT_Encode4(2572), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 134*/ GIMT_Encode4(2429), // Rule ID 19119 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_MUL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[v4i32] } (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2), VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSDDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_RootToRootCopy, /*OpIdx*/2, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19119, GIR_EraseRootFromParent_Done, // Label 134: @2429 GIM_Try, /*On fail goto*//*Label 135*/ GIMT_Encode4(2490), // Rule ID 26614 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_MUL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src3, (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSDDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_RootToRootCopy, /*OpIdx*/1, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26614, GIR_EraseRootFromParent_Done, // Label 135: @2490 GIM_Try, /*On fail goto*//*Label 136*/ GIMT_Encode4(2517), // Rule ID 2482 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2482, GIR_Done, // Label 136: @2517 GIM_Try, /*On fail goto*//*Label 137*/ GIMT_Encode4(2544), // Rule ID 2484 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2484, GIR_Done, // Label 137: @2544 GIM_Try, /*On fail goto*//*Label 138*/ GIMT_Encode4(2571), // Rule ID 4630 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (add:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPADDDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDDZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4630, GIR_Done, // Label 138: @2571 GIM_Reject, // Label 133: @2572 GIM_Reject, // Label 74: @2573 GIM_Try, /*On fail goto*//*Label 139*/ GIMT_Encode4(2639), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 140*/ GIMT_Encode4(2611), // Rule ID 2492 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (add:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPADDQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDQYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2492, GIR_Done, // Label 140: @2611 GIM_Try, /*On fail goto*//*Label 141*/ GIMT_Encode4(2638), // Rule ID 4594 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (add:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPADDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4594, GIR_Done, // Label 141: @2638 GIM_Reject, // Label 139: @2639 GIM_Reject, // Label 75: @2640 GIM_Try, /*On fail goto*//*Label 142*/ GIMT_Encode4(2855), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 143*/ GIMT_Encode4(2712), // Rule ID 19118 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_MUL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[v8i16] } (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2), VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSWWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_RootToRootCopy, /*OpIdx*/2, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19118, GIR_EraseRootFromParent_Done, // Label 143: @2712 GIM_Try, /*On fail goto*//*Label 144*/ GIMT_Encode4(2773), // Rule ID 26613 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_MUL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src3, (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSWWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_RootToRootCopy, /*OpIdx*/1, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26613, GIR_EraseRootFromParent_Done, // Label 144: @2773 GIM_Try, /*On fail goto*//*Label 145*/ GIMT_Encode4(2800), // Rule ID 2476 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDWrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2476, GIR_Done, // Label 145: @2800 GIM_Try, /*On fail goto*//*Label 146*/ GIMT_Encode4(2827), // Rule ID 2478 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDWrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2478, GIR_Done, // Label 146: @2827 GIM_Try, /*On fail goto*//*Label 147*/ GIMT_Encode4(2854), // Rule ID 4651 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (add:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDWZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4651, GIR_Done, // Label 147: @2854 GIM_Reject, // Label 142: @2855 GIM_Reject, // Label 76: @2856 GIM_Try, /*On fail goto*//*Label 148*/ GIMT_Encode4(2922), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 149*/ GIMT_Encode4(2894), // Rule ID 2486 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (add:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPADDDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDDYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2486, GIR_Done, // Label 149: @2894 GIM_Try, /*On fail goto*//*Label 150*/ GIMT_Encode4(2921), // Rule ID 4621 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (add:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPADDDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDDZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4621, GIR_Done, // Label 150: @2921 GIM_Reject, // Label 148: @2922 GIM_Reject, // Label 77: @2923 GIM_Try, /*On fail goto*//*Label 151*/ GIMT_Encode4(2956), // Rule ID 4585 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (add:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPADDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4585, GIR_Done, // Label 151: @2956 GIM_Reject, // Label 78: @2957 GIM_Try, /*On fail goto*//*Label 152*/ GIMT_Encode4(3050), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 153*/ GIMT_Encode4(2995), // Rule ID 2470 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDBrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2470, GIR_Done, // Label 153: @2995 GIM_Try, /*On fail goto*//*Label 154*/ GIMT_Encode4(3022), // Rule ID 2472 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PADDBrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2472, GIR_Done, // Label 154: @3022 GIM_Try, /*On fail goto*//*Label 155*/ GIMT_Encode4(3049), // Rule ID 4669 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (add:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDBZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4669, GIR_Done, // Label 155: @3049 GIM_Reject, // Label 152: @3050 GIM_Reject, // Label 79: @3051 GIM_Try, /*On fail goto*//*Label 156*/ GIMT_Encode4(3117), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 157*/ GIMT_Encode4(3089), // Rule ID 2480 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (add:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPADDWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDWYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2480, GIR_Done, // Label 157: @3089 GIM_Try, /*On fail goto*//*Label 158*/ GIMT_Encode4(3116), // Rule ID 4645 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (add:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPADDWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDWZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4645, GIR_Done, // Label 158: @3116 GIM_Reject, // Label 156: @3117 GIM_Reject, // Label 80: @3118 GIM_Try, /*On fail goto*//*Label 159*/ GIMT_Encode4(3151), // Rule ID 4612 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (add:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPADDDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDDZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4612, GIR_Done, // Label 159: @3151 GIM_Reject, // Label 81: @3152 GIM_Try, /*On fail goto*//*Label 160*/ GIMT_Encode4(3218), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 161*/ GIMT_Encode4(3190), // Rule ID 2474 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (add:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPADDBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDBYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2474, GIR_Done, // Label 161: @3190 GIM_Try, /*On fail goto*//*Label 162*/ GIMT_Encode4(3217), // Rule ID 4663 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (add:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPADDBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDBZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4663, GIR_Done, // Label 162: @3217 GIM_Reject, // Label 160: @3218 GIM_Reject, // Label 82: @3219 GIM_Try, /*On fail goto*//*Label 163*/ GIMT_Encode4(3252), // Rule ID 4639 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (add:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPADDWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDWZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4639, GIR_Done, // Label 163: @3252 GIM_Reject, // Label 83: @3253 GIM_Try, /*On fail goto*//*Label 164*/ GIMT_Encode4(3286), // Rule ID 4657 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (add:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPADDBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPADDBZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4657, GIR_Done, // Label 164: @3286 GIM_Reject, // Label 84: @3287 GIM_Reject, // Label 1: @3288 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(25), /*)*//*default:*//*Label 181*/ GIMT_Encode4(4879), /*GILLT_s8*//*Label 165*/ GIMT_Encode4(3395), /*GILLT_s16*//*Label 166*/ GIMT_Encode4(3569), /*GILLT_s32*//*Label 167*/ GIMT_Encode4(3743), /*GILLT_s64*//*Label 168*/ GIMT_Encode4(3917), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v2s64*//*Label 169*/ GIMT_Encode4(4099), GIMT_Encode4(0), /*GILLT_v4s32*//*Label 170*/ GIMT_Encode4(4193), /*GILLT_v4s64*//*Label 171*/ GIMT_Encode4(4287), GIMT_Encode4(0), /*GILLT_v8s16*//*Label 172*/ GIMT_Encode4(4354), /*GILLT_v8s32*//*Label 173*/ GIMT_Encode4(4448), /*GILLT_v8s64*//*Label 174*/ GIMT_Encode4(4515), GIMT_Encode4(0), /*GILLT_v16s8*//*Label 175*/ GIMT_Encode4(4549), /*GILLT_v16s16*//*Label 176*/ GIMT_Encode4(4643), /*GILLT_v16s32*//*Label 177*/ GIMT_Encode4(4710), GIMT_Encode4(0), /*GILLT_v32s8*//*Label 178*/ GIMT_Encode4(4744), /*GILLT_v32s16*//*Label 179*/ GIMT_Encode4(4811), GIMT_Encode4(0), /*GILLT_v64s8*//*Label 180*/ GIMT_Encode4(4845), // Label 165: @3395 GIM_Try, /*On fail goto*//*Label 182*/ GIMT_Encode4(3568), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_Try, /*On fail goto*//*Label 183*/ GIMT_Encode4(3435), // Rule ID 246 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode), GIM_CheckConstantInt8, /*MI*/0, /*Op*/1, 0, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (sub:{ *:[i8] } 0:{ *:[i8] }, GR8:{ *:[i8] }:$src1) => (NEG8r_NF_ND:{ *:[i8] } GR8:{ *:[i8] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NEG8r_NF_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 246, GIR_EraseRootFromParent_Done, // Label 183: @3435 GIM_Try, /*On fail goto*//*Label 184*/ GIMT_Encode4(3472), // Rule ID 24101 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SUB8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB8ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24101, GIR_EraseRootFromParent_Done, // Label 184: @3472 GIM_Try, /*On fail goto*//*Label 185*/ GIMT_Encode4(3509), // Rule ID 24191 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SUB8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB8ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24191, GIR_EraseRootFromParent_Done, // Label 185: @3509 GIM_Try, /*On fail goto*//*Label 186*/ GIMT_Encode4(3538), // Rule ID 24093 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (SUB8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB8rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24093, GIR_Done, // Label 186: @3538 GIM_Try, /*On fail goto*//*Label 187*/ GIMT_Encode4(3567), // Rule ID 24183 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (SUB8rr_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB8rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24183, GIR_Done, // Label 187: @3567 GIM_Reject, // Label 182: @3568 GIM_Reject, // Label 166: @3569 GIM_Try, /*On fail goto*//*Label 188*/ GIMT_Encode4(3742), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_Try, /*On fail goto*//*Label 189*/ GIMT_Encode4(3609), // Rule ID 247 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode), GIM_CheckConstantInt8, /*MI*/0, /*Op*/1, 0, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (sub:{ *:[i16] } 0:{ *:[i16] }, GR16:{ *:[i16] }:$src1) => (NEG16r_NF_ND:{ *:[i16] } GR16:{ *:[i16] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NEG16r_NF_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 247, GIR_EraseRootFromParent_Done, // Label 189: @3609 GIM_Try, /*On fail goto*//*Label 190*/ GIMT_Encode4(3646), // Rule ID 24102 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (SUB16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB16ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24102, GIR_EraseRootFromParent_Done, // Label 190: @3646 GIM_Try, /*On fail goto*//*Label 191*/ GIMT_Encode4(3683), // Rule ID 24192 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (SUB16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB16ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24192, GIR_EraseRootFromParent_Done, // Label 191: @3683 GIM_Try, /*On fail goto*//*Label 192*/ GIMT_Encode4(3712), // Rule ID 24094 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (SUB16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB16rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24094, GIR_Done, // Label 192: @3712 GIM_Try, /*On fail goto*//*Label 193*/ GIMT_Encode4(3741), // Rule ID 24184 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (SUB16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB16rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24184, GIR_Done, // Label 193: @3741 GIM_Reject, // Label 188: @3742 GIM_Reject, // Label 167: @3743 GIM_Try, /*On fail goto*//*Label 194*/ GIMT_Encode4(3916), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_Try, /*On fail goto*//*Label 195*/ GIMT_Encode4(3783), // Rule ID 248 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode), GIM_CheckConstantInt8, /*MI*/0, /*Op*/1, 0, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (sub:{ *:[i32] } 0:{ *:[i32] }, GR32:{ *:[i32] }:$src1) => (NEG32r_NF_ND:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NEG32r_NF_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 248, GIR_EraseRootFromParent_Done, // Label 195: @3783 GIM_Try, /*On fail goto*//*Label 196*/ GIMT_Encode4(3820), // Rule ID 24103 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (SUB32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB32ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24103, GIR_EraseRootFromParent_Done, // Label 196: @3820 GIM_Try, /*On fail goto*//*Label 197*/ GIMT_Encode4(3857), // Rule ID 24193 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (SUB32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB32ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24193, GIR_EraseRootFromParent_Done, // Label 197: @3857 GIM_Try, /*On fail goto*//*Label 198*/ GIMT_Encode4(3886), // Rule ID 24095 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (SUB32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB32rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24095, GIR_Done, // Label 198: @3886 GIM_Try, /*On fail goto*//*Label 199*/ GIMT_Encode4(3915), // Rule ID 24185 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (SUB32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB32rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24185, GIR_Done, // Label 199: @3915 GIM_Reject, // Label 194: @3916 GIM_Reject, // Label 168: @3917 GIM_Try, /*On fail goto*//*Label 200*/ GIMT_Encode4(4098), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_Try, /*On fail goto*//*Label 201*/ GIMT_Encode4(3957), // Rule ID 249 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode), GIM_CheckConstantInt8, /*MI*/0, /*Op*/1, 0, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (sub:{ *:[i64] } 0:{ *:[i64] }, GR64:{ *:[i64] }:$src1) => (NEG64r_NF_ND:{ *:[i64] } GR64:{ *:[i64] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NEG64r_NF_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 249, GIR_EraseRootFromParent_Done, // Label 201: @3957 GIM_Try, /*On fail goto*//*Label 202*/ GIMT_Encode4(3998), // Rule ID 24104 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24104, GIR_EraseRootFromParent_Done, // Label 202: @3998 GIM_Try, /*On fail goto*//*Label 203*/ GIMT_Encode4(4039), // Rule ID 24194 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (SUB64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SUB64ri32_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24194, GIR_EraseRootFromParent_Done, // Label 203: @4039 GIM_Try, /*On fail goto*//*Label 204*/ GIMT_Encode4(4068), // Rule ID 24096 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (SUB64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB64rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24096, GIR_Done, // Label 204: @4068 GIM_Try, /*On fail goto*//*Label 205*/ GIMT_Encode4(4097), // Rule ID 24186 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (SUB64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::SUB64rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24186, GIR_Done, // Label 205: @4097 GIM_Reject, // Label 200: @4098 GIM_Reject, // Label 169: @4099 GIM_Try, /*On fail goto*//*Label 206*/ GIMT_Encode4(4192), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 207*/ GIMT_Encode4(4137), // Rule ID 2554 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBQrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2554, GIR_Done, // Label 207: @4137 GIM_Try, /*On fail goto*//*Label 208*/ GIMT_Encode4(4164), // Rule ID 2556 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBQrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2556, GIR_Done, // Label 208: @4164 GIM_Try, /*On fail goto*//*Label 209*/ GIMT_Encode4(4191), // Rule ID 4693 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (sub:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSUBQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4693, GIR_Done, // Label 209: @4191 GIM_Reject, // Label 206: @4192 GIM_Reject, // Label 170: @4193 GIM_Try, /*On fail goto*//*Label 210*/ GIMT_Encode4(4286), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 211*/ GIMT_Encode4(4231), // Rule ID 2548 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2548, GIR_Done, // Label 211: @4231 GIM_Try, /*On fail goto*//*Label 212*/ GIMT_Encode4(4258), // Rule ID 2550 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2550, GIR_Done, // Label 212: @4258 GIM_Try, /*On fail goto*//*Label 213*/ GIMT_Encode4(4285), // Rule ID 4720 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (sub:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSUBDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBDZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4720, GIR_Done, // Label 213: @4285 GIM_Reject, // Label 210: @4286 GIM_Reject, // Label 171: @4287 GIM_Try, /*On fail goto*//*Label 214*/ GIMT_Encode4(4353), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 215*/ GIMT_Encode4(4325), // Rule ID 2558 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (sub:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPSUBQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBQYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2558, GIR_Done, // Label 215: @4325 GIM_Try, /*On fail goto*//*Label 216*/ GIMT_Encode4(4352), // Rule ID 4684 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (sub:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSUBQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4684, GIR_Done, // Label 216: @4352 GIM_Reject, // Label 214: @4353 GIM_Reject, // Label 172: @4354 GIM_Try, /*On fail goto*//*Label 217*/ GIMT_Encode4(4447), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 218*/ GIMT_Encode4(4392), // Rule ID 2542 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBWrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2542, GIR_Done, // Label 218: @4392 GIM_Try, /*On fail goto*//*Label 219*/ GIMT_Encode4(4419), // Rule ID 2544 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBWrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2544, GIR_Done, // Label 219: @4419 GIM_Try, /*On fail goto*//*Label 220*/ GIMT_Encode4(4446), // Rule ID 4741 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (sub:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBWZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4741, GIR_Done, // Label 220: @4446 GIM_Reject, // Label 217: @4447 GIM_Reject, // Label 173: @4448 GIM_Try, /*On fail goto*//*Label 221*/ GIMT_Encode4(4514), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 222*/ GIMT_Encode4(4486), // Rule ID 2552 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (sub:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSUBDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBDYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2552, GIR_Done, // Label 222: @4486 GIM_Try, /*On fail goto*//*Label 223*/ GIMT_Encode4(4513), // Rule ID 4711 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (sub:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSUBDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBDZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4711, GIR_Done, // Label 223: @4513 GIM_Reject, // Label 221: @4514 GIM_Reject, // Label 174: @4515 GIM_Try, /*On fail goto*//*Label 224*/ GIMT_Encode4(4548), // Rule ID 4675 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (sub:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSUBQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4675, GIR_Done, // Label 224: @4548 GIM_Reject, // Label 175: @4549 GIM_Try, /*On fail goto*//*Label 225*/ GIMT_Encode4(4642), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 226*/ GIMT_Encode4(4587), // Rule ID 2536 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBBrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2536, GIR_Done, // Label 226: @4587 GIM_Try, /*On fail goto*//*Label 227*/ GIMT_Encode4(4614), // Rule ID 2538 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PSUBBrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2538, GIR_Done, // Label 227: @4614 GIM_Try, /*On fail goto*//*Label 228*/ GIMT_Encode4(4641), // Rule ID 4759 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (sub:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBBZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4759, GIR_Done, // Label 228: @4641 GIM_Reject, // Label 225: @4642 GIM_Reject, // Label 176: @4643 GIM_Try, /*On fail goto*//*Label 229*/ GIMT_Encode4(4709), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 230*/ GIMT_Encode4(4681), // Rule ID 2546 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (sub:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSUBWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBWYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2546, GIR_Done, // Label 230: @4681 GIM_Try, /*On fail goto*//*Label 231*/ GIMT_Encode4(4708), // Rule ID 4735 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (sub:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSUBWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBWZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4735, GIR_Done, // Label 231: @4708 GIM_Reject, // Label 229: @4709 GIM_Reject, // Label 177: @4710 GIM_Try, /*On fail goto*//*Label 232*/ GIMT_Encode4(4743), // Rule ID 4702 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (sub:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSUBDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBDZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4702, GIR_Done, // Label 232: @4743 GIM_Reject, // Label 178: @4744 GIM_Try, /*On fail goto*//*Label 233*/ GIMT_Encode4(4810), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 234*/ GIMT_Encode4(4782), // Rule ID 2540 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (sub:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSUBBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBBYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2540, GIR_Done, // Label 234: @4782 GIM_Try, /*On fail goto*//*Label 235*/ GIMT_Encode4(4809), // Rule ID 4753 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (sub:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPSUBBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBBZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4753, GIR_Done, // Label 235: @4809 GIM_Reject, // Label 233: @4810 GIM_Reject, // Label 179: @4811 GIM_Try, /*On fail goto*//*Label 236*/ GIMT_Encode4(4844), // Rule ID 4729 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (sub:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSUBWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBWZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4729, GIR_Done, // Label 236: @4844 GIM_Reject, // Label 180: @4845 GIM_Try, /*On fail goto*//*Label 237*/ GIMT_Encode4(4878), // Rule ID 4747 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (sub:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPSUBBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPSUBBZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4747, GIR_Done, // Label 237: @4878 GIM_Reject, // Label 181: @4879 GIM_Reject, // Label 2: @4880 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(23), /*)*//*default:*//*Label 250*/ GIMT_Encode4(6116), /*GILLT_s16*//*Label 238*/ GIMT_Encode4(4975), /*GILLT_s32*//*Label 239*/ GIMT_Encode4(5076), /*GILLT_s64*//*Label 240*/ GIMT_Encode4(5177), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v2s64*//*Label 241*/ GIMT_Encode4(5282), GIMT_Encode4(0), /*GILLT_v4s32*//*Label 242*/ GIMT_Encode4(5487), /*GILLT_v4s64*//*Label 243*/ GIMT_Encode4(5581), GIMT_Encode4(0), /*GILLT_v8s16*//*Label 244*/ GIMT_Encode4(5786), /*GILLT_v8s32*//*Label 245*/ GIMT_Encode4(5880), /*GILLT_v8s64*//*Label 246*/ GIMT_Encode4(5947), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v16s16*//*Label 247*/ GIMT_Encode4(5981), /*GILLT_v16s32*//*Label 248*/ GIMT_Encode4(6048), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v32s16*//*Label 249*/ GIMT_Encode4(6082), // Label 238: @4975 GIM_Try, /*On fail goto*//*Label 251*/ GIMT_Encode4(5075), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_Try, /*On fail goto*//*Label 252*/ GIMT_Encode4(5024), // Rule ID 24261 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (IMUL16rri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::IMUL16rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24261, GIR_EraseRootFromParent_Done, // Label 252: @5024 GIM_Try, /*On fail goto*//*Label 253*/ GIMT_Encode4(5049), // Rule ID 24109 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (IMUL16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL16rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24109, GIR_Done, // Label 253: @5049 GIM_Try, /*On fail goto*//*Label 254*/ GIMT_Encode4(5074), // Rule ID 24199 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (IMUL16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL16rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24199, GIR_Done, // Label 254: @5074 GIM_Reject, // Label 251: @5075 GIM_Reject, // Label 239: @5076 GIM_Try, /*On fail goto*//*Label 255*/ GIMT_Encode4(5176), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_Try, /*On fail goto*//*Label 256*/ GIMT_Encode4(5125), // Rule ID 24262 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (IMUL32rri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::IMUL32rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24262, GIR_EraseRootFromParent_Done, // Label 256: @5125 GIM_Try, /*On fail goto*//*Label 257*/ GIMT_Encode4(5150), // Rule ID 24110 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (IMUL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL32rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24110, GIR_Done, // Label 257: @5150 GIM_Try, /*On fail goto*//*Label 258*/ GIMT_Encode4(5175), // Rule ID 24200 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (IMUL32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL32rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24200, GIR_Done, // Label 258: @5175 GIM_Reject, // Label 255: @5176 GIM_Reject, // Label 240: @5177 GIM_Try, /*On fail goto*//*Label 259*/ GIMT_Encode4(5281), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_Try, /*On fail goto*//*Label 260*/ GIMT_Encode4(5230), // Rule ID 24263 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (IMUL64rri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::IMUL64rri32), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24263, GIR_EraseRootFromParent_Done, // Label 260: @5230 GIM_Try, /*On fail goto*//*Label 261*/ GIMT_Encode4(5255), // Rule ID 24111 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (IMUL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL64rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24111, GIR_Done, // Label 261: @5255 GIM_Try, /*On fail goto*//*Label 262*/ GIMT_Encode4(5280), // Rule ID 24201 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (IMUL64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::IMUL64rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24201, GIR_Done, // Label 262: @5280 GIM_Reject, // Label 259: @5281 GIM_Reject, // Label 241: @5282 GIM_Try, /*On fail goto*//*Label 263*/ GIMT_Encode4(5486), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 264*/ GIMT_Encode4(5320), // Rule ID 4972 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (mul:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMULLQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4972, GIR_Done, // Label 264: @5320 GIM_Try, /*On fail goto*//*Label 265*/ GIMT_Encode4(5485), // Rule ID 21329 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasEVEX512_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (mul:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPMULLQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm8, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMULLQZrr), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), // GIR_Coverage, 21329, GIR_EraseRootFromParent_Done, // Label 265: @5485 GIM_Reject, // Label 263: @5486 GIM_Reject, // Label 242: @5487 GIM_Try, /*On fail goto*//*Label 266*/ GIMT_Encode4(5580), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 267*/ GIMT_Encode4(5525), // Rule ID 3187 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3187, GIR_Done, // Label 267: @5525 GIM_Try, /*On fail goto*//*Label 268*/ GIMT_Encode4(5552), // Rule ID 3195 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMULLDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3195, GIR_Done, // Label 268: @5552 GIM_Try, /*On fail goto*//*Label 269*/ GIMT_Encode4(5579), // Rule ID 4927 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (mul:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMULLDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLDZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4927, GIR_Done, // Label 269: @5579 GIM_Reject, // Label 266: @5580 GIM_Reject, // Label 243: @5581 GIM_Try, /*On fail goto*//*Label 270*/ GIMT_Encode4(5785), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 271*/ GIMT_Encode4(5619), // Rule ID 4963 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (mul:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMULLQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4963, GIR_Done, // Label 271: @5619 GIM_Try, /*On fail goto*//*Label 272*/ GIMT_Encode4(5784), // Rule ID 21327 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasEVEX512_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (mul:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPMULLQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm8, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPMULLQZrr), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), // GIR_Coverage, 21327, GIR_EraseRootFromParent_Done, // Label 272: @5784 GIM_Reject, // Label 270: @5785 GIM_Reject, // Label 244: @5786 GIM_Try, /*On fail goto*//*Label 273*/ GIMT_Encode4(5879), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 274*/ GIMT_Encode4(5824), // Rule ID 2518 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX_Or_NoBWI), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLWrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2518, GIR_Done, // Label 274: @5824 GIM_Try, /*On fail goto*//*Label 275*/ GIMT_Encode4(5851), // Rule ID 2520 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PMULLWrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2520, GIR_Done, // Label 275: @5851 GIM_Try, /*On fail goto*//*Label 276*/ GIMT_Encode4(5878), // Rule ID 4948 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (mul:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULLWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLWZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4948, GIR_Done, // Label 276: @5878 GIM_Reject, // Label 273: @5879 GIM_Reject, // Label 245: @5880 GIM_Try, /*On fail goto*//*Label 277*/ GIMT_Encode4(5946), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 278*/ GIMT_Encode4(5918), // Rule ID 3191 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (mul:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMULLDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLDYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3191, GIR_Done, // Label 278: @5918 GIM_Try, /*On fail goto*//*Label 279*/ GIMT_Encode4(5945), // Rule ID 4918 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (mul:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMULLDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLDZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4918, GIR_Done, // Label 279: @5945 GIM_Reject, // Label 277: @5946 GIM_Reject, // Label 246: @5947 GIM_Try, /*On fail goto*//*Label 280*/ GIMT_Encode4(5980), // Rule ID 4954 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (mul:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMULLQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4954, GIR_Done, // Label 280: @5980 GIM_Reject, // Label 247: @5981 GIM_Try, /*On fail goto*//*Label 281*/ GIMT_Encode4(6047), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 282*/ GIMT_Encode4(6019), // Rule ID 2522 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX_Or_NoBWI), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (mul:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULLWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLWYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2522, GIR_Done, // Label 282: @6019 GIM_Try, /*On fail goto*//*Label 283*/ GIMT_Encode4(6046), // Rule ID 4942 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (mul:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULLWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLWZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4942, GIR_Done, // Label 283: @6046 GIM_Reject, // Label 281: @6047 GIM_Reject, // Label 248: @6048 GIM_Try, /*On fail goto*//*Label 284*/ GIMT_Encode4(6081), // Rule ID 4909 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (mul:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMULLDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLDZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4909, GIR_Done, // Label 284: @6081 GIM_Reject, // Label 249: @6082 GIM_Try, /*On fail goto*//*Label 285*/ GIMT_Encode4(6115), // Rule ID 4936 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (mul:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULLWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPMULLWZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4936, GIR_Done, // Label 285: @6115 GIM_Reject, // Label 250: @6116 GIM_Reject, // Label 3: @6117 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(25), /*)*//*default:*//*Label 309*/ GIMT_Encode4(11912), /*GILLT_s1*//*Label 286*/ GIMT_Encode4(6228), /*GILLT_s8*//*Label 287*/ GIMT_Encode4(6556), /*GILLT_s16*//*Label 288*/ GIMT_Encode4(6693), /*GILLT_s32*//*Label 289*/ GIMT_Encode4(7158), /*GILLT_s64*//*Label 290*/ GIMT_Encode4(8344), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v2s1*//*Label 291*/ GIMT_Encode4(9408), /*GILLT_v2s64*//*Label 292*/ GIMT_Encode4(9736), /*GILLT_v4s1*//*Label 293*/ GIMT_Encode4(9830), /*GILLT_v4s32*//*Label 294*/ GIMT_Encode4(10158), /*GILLT_v4s64*//*Label 295*/ GIMT_Encode4(10252), /*GILLT_v8s1*//*Label 296*/ GIMT_Encode4(10346), /*GILLT_v8s16*//*Label 297*/ GIMT_Encode4(10826), /*GILLT_v8s32*//*Label 298*/ GIMT_Encode4(10920), /*GILLT_v8s64*//*Label 299*/ GIMT_Encode4(11014), /*GILLT_v16s1*//*Label 300*/ GIMT_Encode4(11048), /*GILLT_v16s8*//*Label 301*/ GIMT_Encode4(11208), /*GILLT_v16s16*//*Label 302*/ GIMT_Encode4(11302), /*GILLT_v16s32*//*Label 303*/ GIMT_Encode4(11396), /*GILLT_v32s1*//*Label 304*/ GIMT_Encode4(11430), /*GILLT_v32s8*//*Label 305*/ GIMT_Encode4(11590), /*GILLT_v32s16*//*Label 306*/ GIMT_Encode4(11684), /*GILLT_v64s1*//*Label 307*/ GIMT_Encode4(11718), /*GILLT_v64s8*//*Label 308*/ GIMT_Encode4(11878), // Label 286: @6228 GIM_Try, /*On fail goto*//*Label 310*/ GIMT_Encode4(6555), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_Try, /*On fail goto*//*Label 311*/ GIMT_Encode4(6357), // Rule ID 20773 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID), // GIR_Coverage, 20773, GIR_EraseRootFromParent_Done, // Label 311: @6357 GIM_Try, /*On fail goto*//*Label 312*/ GIMT_Encode4(6471), // Rule ID 26791 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID), // GIR_Coverage, 26791, GIR_EraseRootFromParent_Done, // Label 312: @6471 GIM_Try, /*On fail goto*//*Label 313*/ GIMT_Encode4(6554), // Rule ID 20769 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID), // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID), // GIR_Coverage, 20769, GIR_EraseRootFromParent_Done, // Label 313: @6554 GIM_Reject, // Label 310: @6555 GIM_Reject, // Label 287: @6556 GIM_Try, /*On fail goto*//*Label 314*/ GIMT_Encode4(6692), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_Try, /*On fail goto*//*Label 315*/ GIMT_Encode4(6608), // Rule ID 24147 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (AND8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND8ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24147, GIR_EraseRootFromParent_Done, // Label 315: @6608 GIM_Try, /*On fail goto*//*Label 316*/ GIMT_Encode4(6641), // Rule ID 24237 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (AND8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND8ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24237, GIR_EraseRootFromParent_Done, // Label 316: @6641 GIM_Try, /*On fail goto*//*Label 317*/ GIMT_Encode4(6666), // Rule ID 24139 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (AND8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND8rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24139, GIR_Done, // Label 317: @6666 GIM_Try, /*On fail goto*//*Label 318*/ GIMT_Encode4(6691), // Rule ID 24229 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (AND8rr_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND8rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24229, GIR_Done, // Label 318: @6691 GIM_Reject, // Label 314: @6692 GIM_Reject, // Label 288: @6693 GIM_Try, /*On fail goto*//*Label 319*/ GIMT_Encode4(7157), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16, GIM_Try, /*On fail goto*//*Label 320*/ GIMT_Encode4(6810), // Rule ID 27460 // GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i16] } (rotl:{ *:[i16] } -2:{ *:[i16] }, GR8:{ *:[i8] }:$src2), GR16:{ *:[i16] }:$src1) => (BTR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR16rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 27460, GIR_EraseRootFromParent_Done, // Label 320: @6810 GIM_Try, /*On fail goto*//*Label 321*/ GIMT_Encode4(6916), // Rule ID 24063 // GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (rotl:{ *:[i16] } -2:{ *:[i16] }, GR8:{ *:[i8] }:$src2)) => (BTR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR16rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24063, GIR_EraseRootFromParent_Done, // Label 321: @6916 GIM_Try, /*On fail goto*//*Label 322*/ GIMT_Encode4(7008), // Rule ID 23923 // GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(255), // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, 255:{ *:[i16] }) => (EXTRACT_SUBREG:{ *:[i16] } (MOVZX32rr8:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i8] } GR16:{ *:[i16] }:$src1, sub_8bit:{ *:[i32] })), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s8, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_CopySubReg, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/GIMT_Encode2(1), // src1 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::GR8RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr8), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID), // GIR_Coverage, 23923, GIR_EraseRootFromParent_Done, // Label 322: @7008 GIM_Try, /*On fail goto*//*Label 323*/ GIMT_Encode4(7049), // Rule ID 24148 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (AND16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND16ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24148, GIR_EraseRootFromParent_Done, // Label 323: @7049 GIM_Try, /*On fail goto*//*Label 324*/ GIMT_Encode4(7090), // Rule ID 24238 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (AND16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND16ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24238, GIR_EraseRootFromParent_Done, // Label 324: @7090 GIM_Try, /*On fail goto*//*Label 325*/ GIMT_Encode4(7123), // Rule ID 24140 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (AND16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND16rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24140, GIR_Done, // Label 325: @7123 GIM_Try, /*On fail goto*//*Label 326*/ GIMT_Encode4(7156), // Rule ID 24230 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (AND16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND16rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24230, GIR_Done, // Label 326: @7156 GIM_Reject, // Label 319: @7157 GIM_Reject, // Label 289: @7158 GIM_Try, /*On fail goto*//*Label 327*/ GIMT_Encode4(8343), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 328*/ GIMT_Encode4(7243), // Rule ID 26419 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCIC32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26419, GIR_EraseRootFromParent_Done, // Label 328: @7243 GIM_Try, /*On fail goto*//*Label 329*/ GIMT_Encode4(7320), // Rule ID 26431 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::TZMSK32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26431, GIR_EraseRootFromParent_Done, // Label 329: @7320 GIM_Try, /*On fail goto*//*Label 330*/ GIMT_Encode4(7397), // Rule ID 18608 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCIC32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18608, GIR_EraseRootFromParent_Done, // Label 330: @7397 GIM_Try, /*On fail goto*//*Label 331*/ GIMT_Encode4(7474), // Rule ID 18620 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::TZMSK32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18620, GIR_EraseRootFromParent_Done, // Label 331: @7474 GIM_Try, /*On fail goto*//*Label 332*/ GIMT_Encode4(7532), // Rule ID 26413 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCFILL32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26413, GIR_EraseRootFromParent_Done, // Label 332: @7532 GIM_Try, /*On fail goto*//*Label 333*/ GIMT_Encode4(7641), // Rule ID 27466 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i32] } (rotl:{ *:[i32] } -2:{ *:[i32] }, GR8:{ *:[i8] }:$src2), GR32:{ *:[i32] }:$src1) => (BTR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 27466, GIR_EraseRootFromParent_Done, // Label 333: @7641 GIM_Try, /*On fail goto*//*Label 334*/ GIMT_Encode4(7695), // Rule ID 18602 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCFILL32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18602, GIR_EraseRootFromParent_Done, // Label 334: @7695 GIM_Try, /*On fail goto*//*Label 335*/ GIMT_Encode4(7804), // Rule ID 24069 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (rotl:{ *:[i32] } -2:{ *:[i32] }, GR8:{ *:[i8] }:$src2)) => (BTR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24069, GIR_EraseRootFromParent_Done, // Label 335: @7804 GIM_Try, /*On fail goto*//*Label 336*/ GIMT_Encode4(7869), // Rule ID 23921 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(65535), // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 65535:{ *:[i32] }) => (MOVZX32rr16:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i16] } GR32:{ *:[i32] }:$src1, sub_16bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/GIMT_Encode2(4), // src1 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr16), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23921, GIR_EraseRootFromParent_Done, // Label 336: @7869 GIM_Try, /*On fail goto*//*Label 337*/ GIMT_Encode4(7934), // Rule ID 23922 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(255), // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 255:{ *:[i32] }) => (MOVZX32rr8:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i8] } GR32:{ *:[i32] }:$src1, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s8, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/GIMT_Encode2(1), // src1 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR8RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::MOVZX32rr8), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23922, GIR_EraseRootFromParent_Done, // Label 337: @7934 GIM_Try, /*On fail goto*//*Label 338*/ GIMT_Encode4(7978), // Rule ID 24149 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (AND32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND32ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24149, GIR_EraseRootFromParent_Done, // Label 338: @7978 GIM_Try, /*On fail goto*//*Label 339*/ GIMT_Encode4(8022), // Rule ID 24239 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (AND32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND32ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24239, GIR_EraseRootFromParent_Done, // Label 339: @8022 GIM_Try, /*On fail goto*//*Label 340*/ GIMT_Encode4(8084), // Rule ID 18796 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_NoEGPR), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src2) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18796, GIR_EraseRootFromParent_Done, // Label 340: @8084 GIM_Try, /*On fail goto*//*Label 341*/ GIMT_Encode4(8146), // Rule ID 18800 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_HasEGPR), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src2) => (ANDN32rr_EVEX:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN32rr_EVEX), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18800, GIR_EraseRootFromParent_Done, // Label 341: @8146 GIM_Try, /*On fail goto*//*Label 342*/ GIMT_Encode4(8208), // Rule ID 26525 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_NoEGPR), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src2, (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] })) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26525, GIR_EraseRootFromParent_Done, // Label 342: @8208 GIM_Try, /*On fail goto*//*Label 343*/ GIMT_Encode4(8270), // Rule ID 26529 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_HasEGPR), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src2, (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] })) => (ANDN32rr_EVEX:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN32rr_EVEX), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26529, GIR_EraseRootFromParent_Done, // Label 343: @8270 GIM_Try, /*On fail goto*//*Label 344*/ GIMT_Encode4(8306), // Rule ID 24141 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (AND32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND32rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24141, GIR_Done, // Label 344: @8306 GIM_Try, /*On fail goto*//*Label 345*/ GIMT_Encode4(8342), // Rule ID 24231 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (AND32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND32rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24231, GIR_Done, // Label 345: @8342 GIM_Reject, // Label 327: @8343 GIM_Reject, // Label 290: @8344 GIM_Try, /*On fail goto*//*Label 346*/ GIMT_Encode4(9407), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 347*/ GIMT_Encode4(8429), // Rule ID 26420 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCIC64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26420, GIR_EraseRootFromParent_Done, // Label 347: @8429 GIM_Try, /*On fail goto*//*Label 348*/ GIMT_Encode4(8506), // Rule ID 26432 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::TZMSK64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26432, GIR_EraseRootFromParent_Done, // Label 348: @8506 GIM_Try, /*On fail goto*//*Label 349*/ GIMT_Encode4(8583), // Rule ID 18609 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCIC64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18609, GIR_EraseRootFromParent_Done, // Label 349: @8583 GIM_Try, /*On fail goto*//*Label 350*/ GIMT_Encode4(8660), // Rule ID 18621 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::TZMSK64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18621, GIR_EraseRootFromParent_Done, // Label 350: @8660 GIM_Try, /*On fail goto*//*Label 351*/ GIMT_Encode4(8718), // Rule ID 26414 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCFILL64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26414, GIR_EraseRootFromParent_Done, // Label 351: @8718 GIM_Try, /*On fail goto*//*Label 352*/ GIMT_Encode4(8827), // Rule ID 27472 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i64] } (rotl:{ *:[i64] } -2:{ *:[i64] }, GR8:{ *:[i8] }:$src2), GR64:{ *:[i64] }:$src1) => (BTR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 27472, GIR_EraseRootFromParent_Done, // Label 352: @8827 GIM_Try, /*On fail goto*//*Label 353*/ GIMT_Encode4(8881), // Rule ID 18603 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCFILL64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18603, GIR_EraseRootFromParent_Done, // Label 353: @8881 GIM_Try, /*On fail goto*//*Label 354*/ GIMT_Encode4(8990), // Rule ID 24075 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ROTL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (rotl:{ *:[i64] } -2:{ *:[i64] }, GR8:{ *:[i8] }:$src2)) => (BTR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTR64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24075, GIR_EraseRootFromParent_Done, // Label 354: @8990 GIM_Try, /*On fail goto*//*Label 355*/ GIMT_Encode4(9038), // Rule ID 24150 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (AND64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND64ri32), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24150, GIR_EraseRootFromParent_Done, // Label 355: @9038 GIM_Try, /*On fail goto*//*Label 356*/ GIMT_Encode4(9086), // Rule ID 24240 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (AND64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AND64ri32_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24240, GIR_EraseRootFromParent_Done, // Label 356: @9086 GIM_Try, /*On fail goto*//*Label 357*/ GIMT_Encode4(9148), // Rule ID 18797 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_NoEGPR), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src2) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18797, GIR_EraseRootFromParent_Done, // Label 357: @9148 GIM_Try, /*On fail goto*//*Label 358*/ GIMT_Encode4(9210), // Rule ID 18801 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_HasEGPR), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src2) => (ANDN64rr_EVEX:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN64rr_EVEX), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18801, GIR_EraseRootFromParent_Done, // Label 358: @9210 GIM_Try, /*On fail goto*//*Label 359*/ GIMT_Encode4(9272), // Rule ID 26526 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_NoEGPR), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src2, (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] })) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26526, GIR_EraseRootFromParent_Done, // Label 359: @9272 GIM_Try, /*On fail goto*//*Label 360*/ GIMT_Encode4(9334), // Rule ID 26530 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBMI_HasEGPR), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src2, (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] })) => (ANDN64rr_EVEX:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ANDN64rr_EVEX), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26530, GIR_EraseRootFromParent_Done, // Label 360: @9334 GIM_Try, /*On fail goto*//*Label 361*/ GIMT_Encode4(9370), // Rule ID 24142 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (AND64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND64rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24142, GIR_Done, // Label 361: @9370 GIM_Try, /*On fail goto*//*Label 362*/ GIMT_Encode4(9406), // Rule ID 24232 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (AND64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::AND64rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24232, GIR_Done, // Label 362: @9406 GIM_Reject, // Label 346: @9407 GIM_Reject, // Label 291: @9408 GIM_Try, /*On fail goto*//*Label 363*/ GIMT_Encode4(9735), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_Try, /*On fail goto*//*Label 364*/ GIMT_Encode4(9537), // Rule ID 20774 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v2i1] } (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] }), VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDNWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID), // GIR_Coverage, 20774, GIR_EraseRootFromParent_Done, // Label 364: @9537 GIM_Try, /*On fail goto*//*Label 365*/ GIMT_Encode4(9651), // Rule ID 26792 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src2, (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] })) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDNWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID), // GIR_Coverage, 26792, GIR_EraseRootFromParent_Done, // Label 365: @9651 GIM_Try, /*On fail goto*//*Label 366*/ GIMT_Encode4(9734), // Rule ID 20770 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID), // (and:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID), // GIR_Coverage, 20770, GIR_EraseRootFromParent_Done, // Label 366: @9734 GIM_Reject, // Label 363: @9735 GIM_Reject, // Label 292: @9736 GIM_Try, /*On fail goto*//*Label 367*/ GIMT_Encode4(9829), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 368*/ GIMT_Encode4(9774), // Rule ID 2098 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2098, GIR_Done, // Label 368: @9774 GIM_Try, /*On fail goto*//*Label 369*/ GIMT_Encode4(9801), // Rule ID 2100 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PANDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2100, GIR_Done, // Label 369: @9801 GIM_Try, /*On fail goto*//*Label 370*/ GIMT_Encode4(9828), // Rule ID 5656 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (and:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPANDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5656, GIR_Done, // Label 370: @9828 GIM_Reject, // Label 367: @9829 GIM_Reject, // Label 293: @9830 GIM_Try, /*On fail goto*//*Label 371*/ GIMT_Encode4(10157), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_Try, /*On fail goto*//*Label 372*/ GIMT_Encode4(9959), // Rule ID 20775 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v4i1] } (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] }), VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDNWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID), // GIR_Coverage, 20775, GIR_EraseRootFromParent_Done, // Label 372: @9959 GIM_Try, /*On fail goto*//*Label 373*/ GIMT_Encode4(10073), // Rule ID 26793 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src2, (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] })) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDNWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID), // GIR_Coverage, 26793, GIR_EraseRootFromParent_Done, // Label 373: @10073 GIM_Try, /*On fail goto*//*Label 374*/ GIMT_Encode4(10156), // Rule ID 20771 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID), // (and:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID), // GIR_Coverage, 20771, GIR_EraseRootFromParent_Done, // Label 374: @10156 GIM_Reject, // Label 371: @10157 GIM_Reject, // Label 294: @10158 GIM_Try, /*On fail goto*//*Label 375*/ GIMT_Encode4(10251), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 376*/ GIMT_Encode4(10196), // Rule ID 5683 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (and:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPANDDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDDZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5683, GIR_Done, // Label 376: @10196 GIM_Try, /*On fail goto*//*Label 377*/ GIMT_Encode4(10223), // Rule ID 19408 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (and:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPANDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19408, GIR_Done, // Label 377: @10223 GIM_Try, /*On fail goto*//*Label 378*/ GIMT_Encode4(10250), // Rule ID 19432 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (and:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PANDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PANDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19432, GIR_Done, // Label 378: @10250 GIM_Reject, // Label 375: @10251 GIM_Reject, // Label 295: @10252 GIM_Try, /*On fail goto*//*Label 379*/ GIMT_Encode4(10345), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 380*/ GIMT_Encode4(10290), // Rule ID 2102 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPANDYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2102, GIR_Done, // Label 380: @10290 GIM_Try, /*On fail goto*//*Label 381*/ GIMT_Encode4(10317), // Rule ID 5647 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (and:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPANDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5647, GIR_Done, // Label 381: @10317 GIM_Try, /*On fail goto*//*Label 382*/ GIMT_Encode4(10344), // Rule ID 19377 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VANDPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VANDPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19377, GIR_Done, // Label 382: @10344 GIM_Reject, // Label 379: @10345 GIM_Reject, // Label 296: @10346 GIM_Try, /*On fail goto*//*Label 383*/ GIMT_Encode4(10825), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_Try, /*On fail goto*//*Label 384*/ GIMT_Encode4(10421), // Rule ID 4383 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (KANDNBkk:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNBkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4383, GIR_EraseRootFromParent_Done, // Label 384: @10421 GIM_Try, /*On fail goto*//*Label 385*/ GIMT_Encode4(10538), // Rule ID 20772 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDNWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID), // GIR_Coverage, 20772, GIR_EraseRootFromParent_Done, // Label 385: @10538 GIM_Try, /*On fail goto*//*Label 386*/ GIMT_Encode4(10598), // Rule ID 24990 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (KANDNBkk:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNBkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24990, GIR_EraseRootFromParent_Done, // Label 386: @10598 GIM_Try, /*On fail goto*//*Label 387*/ GIMT_Encode4(10715), // Rule ID 26790 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDNWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDNWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID), // GIR_Coverage, 26790, GIR_EraseRootFromParent_Done, // Label 387: @10715 GIM_Try, /*On fail goto*//*Label 388*/ GIMT_Encode4(10738), // Rule ID 4367 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KANDBkk:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KANDBkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4367, GIR_Done, // Label 388: @10738 GIM_Try, /*On fail goto*//*Label 389*/ GIMT_Encode4(10824), // Rule ID 20768 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KANDWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID), // GIR_Coverage, 20768, GIR_EraseRootFromParent_Done, // Label 389: @10824 GIM_Reject, // Label 383: @10825 GIM_Reject, // Label 297: @10826 GIM_Try, /*On fail goto*//*Label 390*/ GIMT_Encode4(10919), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 391*/ GIMT_Encode4(10864), // Rule ID 19407 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (and:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPANDrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19407, GIR_Done, // Label 391: @10864 GIM_Try, /*On fail goto*//*Label 392*/ GIMT_Encode4(10891), // Rule ID 19431 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (and:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PANDrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PANDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19431, GIR_Done, // Label 392: @10891 GIM_Try, /*On fail goto*//*Label 393*/ GIMT_Encode4(10918), // Rule ID 21348 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (and:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPANDQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21348, GIR_Done, // Label 393: @10918 GIM_Reject, // Label 390: @10919 GIM_Reject, // Label 298: @10920 GIM_Try, /*On fail goto*//*Label 394*/ GIMT_Encode4(11013), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 395*/ GIMT_Encode4(10958), // Rule ID 5674 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (and:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPANDDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDDZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5674, GIR_Done, // Label 395: @10958 GIM_Try, /*On fail goto*//*Label 396*/ GIMT_Encode4(10985), // Rule ID 19352 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (and:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPANDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19352, GIR_Done, // Label 396: @10985 GIM_Try, /*On fail goto*//*Label 397*/ GIMT_Encode4(11012), // Rule ID 19376 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (and:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VANDPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VANDPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19376, GIR_Done, // Label 397: @11012 GIM_Reject, // Label 394: @11013 GIM_Reject, // Label 299: @11014 GIM_Try, /*On fail goto*//*Label 398*/ GIMT_Encode4(11047), // Rule ID 5638 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (and:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPANDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5638, GIR_Done, // Label 398: @11047 GIM_Reject, // Label 300: @11048 GIM_Try, /*On fail goto*//*Label 399*/ GIMT_Encode4(11207), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_Try, /*On fail goto*//*Label 400*/ GIMT_Encode4(11123), // Rule ID 4384 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v16i1] } (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] }), VK16:{ *:[v16i1] }:$src2) => (KANDNWkk:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNWkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4384, GIR_EraseRootFromParent_Done, // Label 400: @11123 GIM_Try, /*On fail goto*//*Label 401*/ GIMT_Encode4(11183), // Rule ID 24991 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src2, (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] })) => (KANDNWkk:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNWkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24991, GIR_EraseRootFromParent_Done, // Label 401: @11183 GIM_Try, /*On fail goto*//*Label 402*/ GIMT_Encode4(11206), // Rule ID 4368 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID), // (and:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KANDWkk:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KANDWkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4368, GIR_Done, // Label 402: @11206 GIM_Reject, // Label 399: @11207 GIM_Reject, // Label 301: @11208 GIM_Try, /*On fail goto*//*Label 403*/ GIMT_Encode4(11301), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 404*/ GIMT_Encode4(11246), // Rule ID 19406 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (and:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPANDrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19406, GIR_Done, // Label 404: @11246 GIM_Try, /*On fail goto*//*Label 405*/ GIMT_Encode4(11273), // Rule ID 19430 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (and:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PANDrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PANDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19430, GIR_Done, // Label 405: @11273 GIM_Try, /*On fail goto*//*Label 406*/ GIMT_Encode4(11300), // Rule ID 21347 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (and:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPANDQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21347, GIR_Done, // Label 406: @11300 GIM_Reject, // Label 403: @11301 GIM_Reject, // Label 302: @11302 GIM_Try, /*On fail goto*//*Label 407*/ GIMT_Encode4(11395), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 408*/ GIMT_Encode4(11340), // Rule ID 19351 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (and:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPANDYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19351, GIR_Done, // Label 408: @11340 GIM_Try, /*On fail goto*//*Label 409*/ GIMT_Encode4(11367), // Rule ID 19375 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (and:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VANDPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VANDPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19375, GIR_Done, // Label 409: @11367 GIM_Try, /*On fail goto*//*Label 410*/ GIMT_Encode4(11394), // Rule ID 21364 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (and:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPANDQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21364, GIR_Done, // Label 410: @11394 GIM_Reject, // Label 407: @11395 GIM_Reject, // Label 303: @11396 GIM_Try, /*On fail goto*//*Label 411*/ GIMT_Encode4(11429), // Rule ID 5665 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (and:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPANDDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDDZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5665, GIR_Done, // Label 411: @11429 GIM_Reject, // Label 304: @11430 GIM_Try, /*On fail goto*//*Label 412*/ GIMT_Encode4(11589), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_Try, /*On fail goto*//*Label 413*/ GIMT_Encode4(11505), // Rule ID 4385 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v32i1] } (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] }), VK32:{ *:[v32i1] }:$src2) => (KANDNDkk:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNDkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4385, GIR_EraseRootFromParent_Done, // Label 413: @11505 GIM_Try, /*On fail goto*//*Label 414*/ GIMT_Encode4(11565), // Rule ID 24992 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src2, (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] })) => (KANDNDkk:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNDkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24992, GIR_EraseRootFromParent_Done, // Label 414: @11565 GIM_Try, /*On fail goto*//*Label 415*/ GIMT_Encode4(11588), // Rule ID 4369 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID), // (and:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KANDDkk:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KANDDkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4369, GIR_Done, // Label 415: @11588 GIM_Reject, // Label 412: @11589 GIM_Reject, // Label 305: @11590 GIM_Try, /*On fail goto*//*Label 416*/ GIMT_Encode4(11683), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 417*/ GIMT_Encode4(11628), // Rule ID 19350 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (and:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPANDYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19350, GIR_Done, // Label 417: @11628 GIM_Try, /*On fail goto*//*Label 418*/ GIMT_Encode4(11655), // Rule ID 19374 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (and:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VANDPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VANDPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19374, GIR_Done, // Label 418: @11655 GIM_Try, /*On fail goto*//*Label 419*/ GIMT_Encode4(11682), // Rule ID 21363 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (and:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPANDQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21363, GIR_Done, // Label 419: @11682 GIM_Reject, // Label 416: @11683 GIM_Reject, // Label 306: @11684 GIM_Try, /*On fail goto*//*Label 420*/ GIMT_Encode4(11717), // Rule ID 21380 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (and:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPANDQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21380, GIR_Done, // Label 420: @11717 GIM_Reject, // Label 307: @11718 GIM_Try, /*On fail goto*//*Label 421*/ GIMT_Encode4(11877), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_Try, /*On fail goto*//*Label 422*/ GIMT_Encode4(11793), // Rule ID 4386 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v64i1] } (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] }), VK64:{ *:[v64i1] }:$src2) => (KANDNQkk:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNQkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4386, GIR_EraseRootFromParent_Done, // Label 422: @11793 GIM_Try, /*On fail goto*//*Label 423*/ GIMT_Encode4(11853), // Rule ID 24993 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (and:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src2, (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] })) => (KANDNQkk:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KANDNQkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24993, GIR_EraseRootFromParent_Done, // Label 423: @11853 GIM_Try, /*On fail goto*//*Label 424*/ GIMT_Encode4(11876), // Rule ID 4370 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID), // (and:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KANDQkk:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KANDQkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4370, GIR_Done, // Label 424: @11876 GIM_Reject, // Label 421: @11877 GIM_Reject, // Label 308: @11878 GIM_Try, /*On fail goto*//*Label 425*/ GIMT_Encode4(11911), // Rule ID 21379 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (and:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPANDQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPANDQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21379, GIR_Done, // Label 425: @11911 GIM_Reject, // Label 309: @11912 GIM_Reject, // Label 4: @11913 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(25), /*)*//*default:*//*Label 449*/ GIMT_Encode4(16280), /*GILLT_s1*//*Label 426*/ GIMT_Encode4(12024), /*GILLT_s8*//*Label 427*/ GIMT_Encode4(12118), /*GILLT_s16*//*Label 428*/ GIMT_Encode4(12255), /*GILLT_s32*//*Label 429*/ GIMT_Encode4(12608), /*GILLT_s64*//*Label 430*/ GIMT_Encode4(13792), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v2s1*//*Label 431*/ GIMT_Encode4(14984), /*GILLT_v2s64*//*Label 432*/ GIMT_Encode4(15078), /*GILLT_v4s1*//*Label 433*/ GIMT_Encode4(15172), /*GILLT_v4s32*//*Label 434*/ GIMT_Encode4(15266), /*GILLT_v4s64*//*Label 435*/ GIMT_Encode4(15360), /*GILLT_v8s1*//*Label 436*/ GIMT_Encode4(15454), /*GILLT_v8s16*//*Label 437*/ GIMT_Encode4(15572), /*GILLT_v8s32*//*Label 438*/ GIMT_Encode4(15666), /*GILLT_v8s64*//*Label 439*/ GIMT_Encode4(15760), /*GILLT_v16s1*//*Label 440*/ GIMT_Encode4(15794), /*GILLT_v16s8*//*Label 441*/ GIMT_Encode4(15828), /*GILLT_v16s16*//*Label 442*/ GIMT_Encode4(15922), /*GILLT_v16s32*//*Label 443*/ GIMT_Encode4(16016), /*GILLT_v32s1*//*Label 444*/ GIMT_Encode4(16050), /*GILLT_v32s8*//*Label 445*/ GIMT_Encode4(16084), /*GILLT_v32s16*//*Label 446*/ GIMT_Encode4(16178), /*GILLT_v64s1*//*Label 447*/ GIMT_Encode4(16212), /*GILLT_v64s8*//*Label 448*/ GIMT_Encode4(16246), // Label 426: @12024 GIM_Try, /*On fail goto*//*Label 450*/ GIMT_Encode4(12117), // Rule ID 20777 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID), // (or:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID), // GIR_Coverage, 20777, GIR_EraseRootFromParent_Done, // Label 450: @12117 GIM_Reject, // Label 427: @12118 GIM_Try, /*On fail goto*//*Label 451*/ GIMT_Encode4(12254), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_Try, /*On fail goto*//*Label 452*/ GIMT_Encode4(12170), // Rule ID 24123 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (OR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR8ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24123, GIR_EraseRootFromParent_Done, // Label 452: @12170 GIM_Try, /*On fail goto*//*Label 453*/ GIMT_Encode4(12203), // Rule ID 24213 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (OR8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR8ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24213, GIR_EraseRootFromParent_Done, // Label 453: @12203 GIM_Try, /*On fail goto*//*Label 454*/ GIMT_Encode4(12228), // Rule ID 24115 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (OR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR8rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24115, GIR_Done, // Label 454: @12228 GIM_Try, /*On fail goto*//*Label 455*/ GIMT_Encode4(12253), // Rule ID 24205 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (OR8rr_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR8rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24205, GIR_Done, // Label 455: @12253 GIM_Reject, // Label 451: @12254 GIM_Reject, // Label 428: @12255 GIM_Try, /*On fail goto*//*Label 456*/ GIMT_Encode4(12607), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_Try, /*On fail goto*//*Label 457*/ GIMT_Encode4(12372), // Rule ID 27461 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i16] } (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2), GR16:{ *:[i16] }:$src1) => (BTS16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS16rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 27461, GIR_EraseRootFromParent_Done, // Label 457: @12372 GIM_Try, /*On fail goto*//*Label 458*/ GIMT_Encode4(12474), // Rule ID 24064 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2)) => (BTS16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS16rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24064, GIR_EraseRootFromParent_Done, // Label 458: @12474 GIM_Try, /*On fail goto*//*Label 459*/ GIMT_Encode4(12511), // Rule ID 24124 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (OR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR16ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24124, GIR_EraseRootFromParent_Done, // Label 459: @12511 GIM_Try, /*On fail goto*//*Label 460*/ GIMT_Encode4(12548), // Rule ID 24214 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (OR16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR16ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24214, GIR_EraseRootFromParent_Done, // Label 460: @12548 GIM_Try, /*On fail goto*//*Label 461*/ GIMT_Encode4(12577), // Rule ID 24116 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (OR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR16rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24116, GIR_Done, // Label 461: @12577 GIM_Try, /*On fail goto*//*Label 462*/ GIMT_Encode4(12606), // Rule ID 24206 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (OR16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR16rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24206, GIR_Done, // Label 462: @12606 GIM_Reject, // Label 456: @12607 GIM_Reject, // Label 429: @12608 GIM_Try, /*On fail goto*//*Label 463*/ GIMT_Encode4(13791), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 464*/ GIMT_Encode4(12693), // Rule ID 26427 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSIC32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26427, GIR_EraseRootFromParent_Done, // Label 464: @12693 GIM_Try, /*On fail goto*//*Label 465*/ GIMT_Encode4(12770), // Rule ID 26429 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::T1MSKC32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26429, GIR_EraseRootFromParent_Done, // Label 465: @12770 GIM_Try, /*On fail goto*//*Label 466*/ GIMT_Encode4(12848), // Rule ID 26415 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i32] } (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26415, GIR_EraseRootFromParent_Done, // Label 466: @12848 GIM_Try, /*On fail goto*//*Label 467*/ GIMT_Encode4(12925), // Rule ID 18616 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSIC32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18616, GIR_EraseRootFromParent_Done, // Label 467: @12925 GIM_Try, /*On fail goto*//*Label 468*/ GIMT_Encode4(13002), // Rule ID 18618 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::T1MSKC32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18618, GIR_EraseRootFromParent_Done, // Label 468: @13002 GIM_Try, /*On fail goto*//*Label 469*/ GIMT_Encode4(13076), // Rule ID 18604 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] })) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18604, GIR_EraseRootFromParent_Done, // Label 469: @13076 GIM_Try, /*On fail goto*//*Label 470*/ GIMT_Encode4(13134), // Rule ID 26423 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCS32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26423, GIR_EraseRootFromParent_Done, // Label 470: @13134 GIM_Try, /*On fail goto*//*Label 471*/ GIMT_Encode4(13192), // Rule ID 26425 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSFILL32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26425, GIR_EraseRootFromParent_Done, // Label 471: @13192 GIM_Try, /*On fail goto*//*Label 472*/ GIMT_Encode4(13301), // Rule ID 27467 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i32] } (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2), GR32:{ *:[i32] }:$src1) => (BTS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 27467, GIR_EraseRootFromParent_Done, // Label 472: @13301 GIM_Try, /*On fail goto*//*Label 473*/ GIMT_Encode4(13359), // Rule ID 26417 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SUB), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i32] } (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26417, GIR_EraseRootFromParent_Done, // Label 473: @13359 GIM_Try, /*On fail goto*//*Label 474*/ GIMT_Encode4(13413), // Rule ID 18612 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCS32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18612, GIR_EraseRootFromParent_Done, // Label 474: @13413 GIM_Try, /*On fail goto*//*Label 475*/ GIMT_Encode4(13467), // Rule ID 18614 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSFILL32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18614, GIR_EraseRootFromParent_Done, // Label 475: @13467 GIM_Try, /*On fail goto*//*Label 476*/ GIMT_Encode4(13576), // Rule ID 24070 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2)) => (BTS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24070, GIR_EraseRootFromParent_Done, // Label 476: @13576 GIM_Try, /*On fail goto*//*Label 477*/ GIMT_Encode4(13630), // Rule ID 18606 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SUB), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2), // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src)) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18606, GIR_EraseRootFromParent_Done, // Label 477: @13630 GIM_Try, /*On fail goto*//*Label 478*/ GIMT_Encode4(13674), // Rule ID 24125 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (OR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR32ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24125, GIR_EraseRootFromParent_Done, // Label 478: @13674 GIM_Try, /*On fail goto*//*Label 479*/ GIMT_Encode4(13718), // Rule ID 24215 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (OR32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR32ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24215, GIR_EraseRootFromParent_Done, // Label 479: @13718 GIM_Try, /*On fail goto*//*Label 480*/ GIMT_Encode4(13754), // Rule ID 24117 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (OR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR32rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24117, GIR_Done, // Label 480: @13754 GIM_Try, /*On fail goto*//*Label 481*/ GIMT_Encode4(13790), // Rule ID 24207 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (OR32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR32rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24207, GIR_Done, // Label 481: @13790 GIM_Reject, // Label 463: @13791 GIM_Reject, // Label 430: @13792 GIM_Try, /*On fail goto*//*Label 482*/ GIMT_Encode4(14983), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 483*/ GIMT_Encode4(13877), // Rule ID 26428 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSIC64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26428, GIR_EraseRootFromParent_Done, // Label 483: @13877 GIM_Try, /*On fail goto*//*Label 484*/ GIMT_Encode4(13954), // Rule ID 26430 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::T1MSKC64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26430, GIR_EraseRootFromParent_Done, // Label 484: @13954 GIM_Try, /*On fail goto*//*Label 485*/ GIMT_Encode4(14032), // Rule ID 26416 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i64] } (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26416, GIR_EraseRootFromParent_Done, // Label 485: @14032 GIM_Try, /*On fail goto*//*Label 486*/ GIMT_Encode4(14109), // Rule ID 18617 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSIC64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18617, GIR_EraseRootFromParent_Done, // Label 486: @14109 GIM_Try, /*On fail goto*//*Label 487*/ GIMT_Encode4(14186), // Rule ID 18619 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::T1MSKC64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18619, GIR_EraseRootFromParent_Done, // Label 487: @14186 GIM_Try, /*On fail goto*//*Label 488*/ GIMT_Encode4(14260), // Rule ID 18605 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] })) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18605, GIR_EraseRootFromParent_Done, // Label 488: @14260 GIM_Try, /*On fail goto*//*Label 489*/ GIMT_Encode4(14318), // Rule ID 26424 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCS64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26424, GIR_EraseRootFromParent_Done, // Label 489: @14318 GIM_Try, /*On fail goto*//*Label 490*/ GIMT_Encode4(14376), // Rule ID 26426 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSFILL64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26426, GIR_EraseRootFromParent_Done, // Label 490: @14376 GIM_Try, /*On fail goto*//*Label 491*/ GIMT_Encode4(14485), // Rule ID 27473 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i64] } (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2), GR64:{ *:[i64] }:$src1) => (BTS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 27473, GIR_EraseRootFromParent_Done, // Label 491: @14485 GIM_Try, /*On fail goto*//*Label 492*/ GIMT_Encode4(14543), // Rule ID 26418 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SUB), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i64] } (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26418, GIR_EraseRootFromParent_Done, // Label 492: @14543 GIM_Try, /*On fail goto*//*Label 493*/ GIMT_Encode4(14597), // Rule ID 18613 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCS64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18613, GIR_EraseRootFromParent_Done, // Label 493: @14597 GIM_Try, /*On fail goto*//*Label 494*/ GIMT_Encode4(14651), // Rule ID 18615 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, uint8_t(-1), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLSFILL64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18615, GIR_EraseRootFromParent_Done, // Label 494: @14651 GIM_Try, /*On fail goto*//*Label 495*/ GIMT_Encode4(14760), // Rule ID 24076 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2)) => (BTS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTS64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24076, GIR_EraseRootFromParent_Done, // Label 495: @14760 GIM_Try, /*On fail goto*//*Label 496*/ GIMT_Encode4(14814), // Rule ID 18607 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SUB), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, uint8_t(-2), // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src)) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCI64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18607, GIR_EraseRootFromParent_Done, // Label 496: @14814 GIM_Try, /*On fail goto*//*Label 497*/ GIMT_Encode4(14862), // Rule ID 24126 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (OR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR64ri32), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24126, GIR_EraseRootFromParent_Done, // Label 497: @14862 GIM_Try, /*On fail goto*//*Label 498*/ GIMT_Encode4(14910), // Rule ID 24216 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (OR64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::OR64ri32_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24216, GIR_EraseRootFromParent_Done, // Label 498: @14910 GIM_Try, /*On fail goto*//*Label 499*/ GIMT_Encode4(14946), // Rule ID 24118 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (OR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR64rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24118, GIR_Done, // Label 499: @14946 GIM_Try, /*On fail goto*//*Label 500*/ GIMT_Encode4(14982), // Rule ID 24208 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (OR64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::OR64rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24208, GIR_Done, // Label 500: @14982 GIM_Reject, // Label 482: @14983 GIM_Reject, // Label 431: @14984 GIM_Try, /*On fail goto*//*Label 501*/ GIMT_Encode4(15077), // Rule ID 20778 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID), // (or:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID), // GIR_Coverage, 20778, GIR_EraseRootFromParent_Done, // Label 501: @15077 GIM_Reject, // Label 432: @15078 GIM_Try, /*On fail goto*//*Label 502*/ GIMT_Encode4(15171), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 503*/ GIMT_Encode4(15116), // Rule ID 2104 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2104, GIR_Done, // Label 503: @15116 GIM_Try, /*On fail goto*//*Label 504*/ GIMT_Encode4(15143), // Rule ID 2106 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2106, GIR_Done, // Label 504: @15143 GIM_Try, /*On fail goto*//*Label 505*/ GIMT_Encode4(15170), // Rule ID 5710 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (or:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5710, GIR_Done, // Label 505: @15170 GIM_Reject, // Label 502: @15171 GIM_Reject, // Label 433: @15172 GIM_Try, /*On fail goto*//*Label 506*/ GIMT_Encode4(15265), // Rule ID 20779 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID), // (or:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID), // GIR_Coverage, 20779, GIR_EraseRootFromParent_Done, // Label 506: @15265 GIM_Reject, // Label 434: @15266 GIM_Try, /*On fail goto*//*Label 507*/ GIMT_Encode4(15359), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 508*/ GIMT_Encode4(15304), // Rule ID 5737 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (or:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPORDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORDZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5737, GIR_Done, // Label 508: @15304 GIM_Try, /*On fail goto*//*Label 509*/ GIMT_Encode4(15331), // Rule ID 19411 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (or:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19411, GIR_Done, // Label 509: @15331 GIM_Try, /*On fail goto*//*Label 510*/ GIMT_Encode4(15358), // Rule ID 19435 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (or:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19435, GIR_Done, // Label 510: @15358 GIM_Reject, // Label 507: @15359 GIM_Reject, // Label 435: @15360 GIM_Try, /*On fail goto*//*Label 511*/ GIMT_Encode4(15453), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 512*/ GIMT_Encode4(15398), // Rule ID 2108 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2108, GIR_Done, // Label 512: @15398 GIM_Try, /*On fail goto*//*Label 513*/ GIMT_Encode4(15425), // Rule ID 5701 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (or:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5701, GIR_Done, // Label 513: @15425 GIM_Try, /*On fail goto*//*Label 514*/ GIMT_Encode4(15452), // Rule ID 19381 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VORPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19381, GIR_Done, // Label 514: @15452 GIM_Reject, // Label 511: @15453 GIM_Reject, // Label 436: @15454 GIM_Try, /*On fail goto*//*Label 515*/ GIMT_Encode4(15571), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_Try, /*On fail goto*//*Label 516*/ GIMT_Encode4(15492), // Rule ID 4371 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KORBkk:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KORBkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4371, GIR_Done, // Label 516: @15492 GIM_Try, /*On fail goto*//*Label 517*/ GIMT_Encode4(15570), // Rule ID 20776 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI), // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID), // GIR_Coverage, 20776, GIR_EraseRootFromParent_Done, // Label 517: @15570 GIM_Reject, // Label 515: @15571 GIM_Reject, // Label 437: @15572 GIM_Try, /*On fail goto*//*Label 518*/ GIMT_Encode4(15665), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 519*/ GIMT_Encode4(15610), // Rule ID 19410 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (or:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19410, GIR_Done, // Label 519: @15610 GIM_Try, /*On fail goto*//*Label 520*/ GIMT_Encode4(15637), // Rule ID 19434 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (or:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19434, GIR_Done, // Label 520: @15637 GIM_Try, /*On fail goto*//*Label 521*/ GIMT_Encode4(15664), // Rule ID 21350 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (or:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPORQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21350, GIR_Done, // Label 521: @15664 GIM_Reject, // Label 518: @15665 GIM_Reject, // Label 438: @15666 GIM_Try, /*On fail goto*//*Label 522*/ GIMT_Encode4(15759), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 523*/ GIMT_Encode4(15704), // Rule ID 5728 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (or:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPORDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORDZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5728, GIR_Done, // Label 523: @15704 GIM_Try, /*On fail goto*//*Label 524*/ GIMT_Encode4(15731), // Rule ID 19355 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (or:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPORYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19355, GIR_Done, // Label 524: @15731 GIM_Try, /*On fail goto*//*Label 525*/ GIMT_Encode4(15758), // Rule ID 19380 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (or:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VORPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VORPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19380, GIR_Done, // Label 525: @15758 GIM_Reject, // Label 522: @15759 GIM_Reject, // Label 439: @15760 GIM_Try, /*On fail goto*//*Label 526*/ GIMT_Encode4(15793), // Rule ID 5692 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (or:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5692, GIR_Done, // Label 526: @15793 GIM_Reject, // Label 440: @15794 GIM_Try, /*On fail goto*//*Label 527*/ GIMT_Encode4(15827), // Rule ID 4372 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID), // (or:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KORWkk:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KORWkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4372, GIR_Done, // Label 527: @15827 GIM_Reject, // Label 441: @15828 GIM_Try, /*On fail goto*//*Label 528*/ GIMT_Encode4(15921), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 529*/ GIMT_Encode4(15866), // Rule ID 19409 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (or:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19409, GIR_Done, // Label 529: @15866 GIM_Try, /*On fail goto*//*Label 530*/ GIMT_Encode4(15893), // Rule ID 19433 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (or:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19433, GIR_Done, // Label 530: @15893 GIM_Try, /*On fail goto*//*Label 531*/ GIMT_Encode4(15920), // Rule ID 21349 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (or:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPORQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21349, GIR_Done, // Label 531: @15920 GIM_Reject, // Label 528: @15921 GIM_Reject, // Label 442: @15922 GIM_Try, /*On fail goto*//*Label 532*/ GIMT_Encode4(16015), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 533*/ GIMT_Encode4(15960), // Rule ID 19354 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (or:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPORYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19354, GIR_Done, // Label 533: @15960 GIM_Try, /*On fail goto*//*Label 534*/ GIMT_Encode4(15987), // Rule ID 19379 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (or:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VORPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VORPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19379, GIR_Done, // Label 534: @15987 GIM_Try, /*On fail goto*//*Label 535*/ GIMT_Encode4(16014), // Rule ID 21366 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (or:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPORQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21366, GIR_Done, // Label 535: @16014 GIM_Reject, // Label 532: @16015 GIM_Reject, // Label 443: @16016 GIM_Try, /*On fail goto*//*Label 536*/ GIMT_Encode4(16049), // Rule ID 5719 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (or:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPORDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORDZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5719, GIR_Done, // Label 536: @16049 GIM_Reject, // Label 444: @16050 GIM_Try, /*On fail goto*//*Label 537*/ GIMT_Encode4(16083), // Rule ID 4373 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID), // (or:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KORDkk:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KORDkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4373, GIR_Done, // Label 537: @16083 GIM_Reject, // Label 445: @16084 GIM_Try, /*On fail goto*//*Label 538*/ GIMT_Encode4(16177), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 539*/ GIMT_Encode4(16122), // Rule ID 19353 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (or:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPORYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19353, GIR_Done, // Label 539: @16122 GIM_Try, /*On fail goto*//*Label 540*/ GIMT_Encode4(16149), // Rule ID 19378 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (or:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VORPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VORPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19378, GIR_Done, // Label 540: @16149 GIM_Try, /*On fail goto*//*Label 541*/ GIMT_Encode4(16176), // Rule ID 21365 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (or:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPORQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21365, GIR_Done, // Label 541: @16176 GIM_Reject, // Label 538: @16177 GIM_Reject, // Label 446: @16178 GIM_Try, /*On fail goto*//*Label 542*/ GIMT_Encode4(16211), // Rule ID 21382 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (or:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPORQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21382, GIR_Done, // Label 542: @16211 GIM_Reject, // Label 447: @16212 GIM_Try, /*On fail goto*//*Label 543*/ GIMT_Encode4(16245), // Rule ID 4374 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID), // (or:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KORQkk:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KORQkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4374, GIR_Done, // Label 543: @16245 GIM_Reject, // Label 448: @16246 GIM_Try, /*On fail goto*//*Label 544*/ GIMT_Encode4(16279), // Rule ID 21381 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (or:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPORQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPORQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21381, GIR_Done, // Label 544: @16279 GIM_Reject, // Label 449: @16280 GIM_Reject, // Label 5: @16281 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(25), /*)*//*default:*//*Label 568*/ GIMT_Encode4(24619), /*GILLT_s1*//*Label 545*/ GIMT_Encode4(16392), /*GILLT_s8*//*Label 546*/ GIMT_Encode4(16923), /*GILLT_s16*//*Label 547*/ GIMT_Encode4(17126), /*GILLT_s32*//*Label 548*/ GIMT_Encode4(17571), /*GILLT_s64*//*Label 549*/ GIMT_Encode4(18184), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v2s1*//*Label 550*/ GIMT_Encode4(18756), /*GILLT_v2s64*//*Label 551*/ GIMT_Encode4(19271), /*GILLT_v4s1*//*Label 552*/ GIMT_Encode4(19643), /*GILLT_v4s32*//*Label 553*/ GIMT_Encode4(20158), /*GILLT_v4s64*//*Label 554*/ GIMT_Encode4(20530), /*GILLT_v8s1*//*Label 555*/ GIMT_Encode4(20902), /*GILLT_v8s16*//*Label 556*/ GIMT_Encode4(21673), /*GILLT_v8s32*//*Label 557*/ GIMT_Encode4(22045), /*GILLT_v8s64*//*Label 558*/ GIMT_Encode4(22417), /*GILLT_v16s1*//*Label 559*/ GIMT_Encode4(22495), /*GILLT_v16s8*//*Label 560*/ GIMT_Encode4(22753), /*GILLT_v16s16*//*Label 561*/ GIMT_Encode4(23125), /*GILLT_v16s32*//*Label 562*/ GIMT_Encode4(23497), /*GILLT_v32s1*//*Label 563*/ GIMT_Encode4(23575), /*GILLT_v32s8*//*Label 564*/ GIMT_Encode4(23833), /*GILLT_v32s16*//*Label 565*/ GIMT_Encode4(24205), /*GILLT_v64s1*//*Label 566*/ GIMT_Encode4(24283), /*GILLT_v64s8*//*Label 567*/ GIMT_Encode4(24541), // Label 545: @16392 GIM_Try, /*On fail goto*//*Label 569*/ GIMT_Encode4(16922), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s1, GIM_Try, /*On fail goto*//*Label 570*/ GIMT_Encode4(16521), // Rule ID 26796 // GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID), // GIR_Coverage, 26796, GIR_EraseRootFromParent_Done, // Label 570: @16521 GIM_Try, /*On fail goto*//*Label 571*/ GIMT_Encode4(16640), // Rule ID 20781 // GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2), immAllOnesV:{ *:[v1i1] }) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID), // GIR_Coverage, 20781, GIR_EraseRootFromParent_Done, // Label 571: @16640 GIM_Try, /*On fail goto*//*Label 572*/ GIMT_Encode4(16758), // Rule ID 26797 // GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID), // GIR_Coverage, 26797, GIR_EraseRootFromParent_Done, // Label 572: @16758 GIM_Try, /*On fail goto*//*Label 573*/ GIMT_Encode4(16834), // Rule ID 20767 // GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src, immAllOnesV:{ *:[v1i1] }) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KNOTWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KNOTWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID), // GIR_Coverage, 20767, GIR_EraseRootFromParent_Done, // Label 573: @16834 GIM_Try, /*On fail goto*//*Label 574*/ GIMT_Encode4(16921), // Rule ID 20785 // GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK1RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK1RegClassID), // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK1RegClassID), // GIR_Coverage, 20785, GIR_EraseRootFromParent_Done, // Label 574: @16921 GIM_Reject, // Label 569: @16922 GIM_Reject, // Label 546: @16923 GIM_Try, /*On fail goto*//*Label 575*/ GIMT_Encode4(17125), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_Try, /*On fail goto*//*Label 576*/ GIMT_Encode4(16966), // Rule ID 23888 // GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-128), // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, -128:{ *:[i8] }) => (ADD8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, -128:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD8ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-128), GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23888, GIR_EraseRootFromParent_Done, // Label 576: @16966 GIM_Try, /*On fail goto*//*Label 577*/ GIMT_Encode4(16987), // Rule ID 234 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, -1:{ *:[i8] }) => (NOT8r:{ *:[i8] } GR8:{ *:[i8] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT8r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 234, GIR_EraseRootFromParent_Done, // Label 577: @16987 GIM_Try, /*On fail goto*//*Label 578*/ GIMT_Encode4(17008), // Rule ID 242 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, -1:{ *:[i8] }) => (NOT8r_ND:{ *:[i8] } GR8:{ *:[i8] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT8r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 242, GIR_EraseRootFromParent_Done, // Label 578: @17008 GIM_Try, /*On fail goto*//*Label 579*/ GIMT_Encode4(17041), // Rule ID 24135 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (XOR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR8ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24135, GIR_EraseRootFromParent_Done, // Label 579: @17041 GIM_Try, /*On fail goto*//*Label 580*/ GIMT_Encode4(17074), // Rule ID 24225 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (XOR8ri_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR8ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24225, GIR_EraseRootFromParent_Done, // Label 580: @17074 GIM_Try, /*On fail goto*//*Label 581*/ GIMT_Encode4(17099), // Rule ID 24127 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (XOR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR8rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24127, GIR_Done, // Label 581: @17099 GIM_Try, /*On fail goto*//*Label 582*/ GIMT_Encode4(17124), // Rule ID 24217 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (XOR8rr_ND:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR8rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24217, GIR_Done, // Label 582: @17124 GIM_Reject, // Label 575: @17125 GIM_Reject, // Label 547: @17126 GIM_Try, /*On fail goto*//*Label 583*/ GIMT_Encode4(17570), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_Try, /*On fail goto*//*Label 584*/ GIMT_Encode4(17183), // Rule ID 23889 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(-32768), // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, -32768:{ *:[i16] }) => (ADD16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -32768:{ *:[i16] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD16ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(-32768), GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23889, GIR_EraseRootFromParent_Done, // Label 584: @17183 GIM_Try, /*On fail goto*//*Label 585*/ GIMT_Encode4(17285), // Rule ID 27462 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i16] } (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2), GR16:{ *:[i16] }:$src1) => (BTC16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC16rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 27462, GIR_EraseRootFromParent_Done, // Label 585: @17285 GIM_Try, /*On fail goto*//*Label 586*/ GIMT_Encode4(17387), // Rule ID 24065 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2)) => (BTC16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC16rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24065, GIR_EraseRootFromParent_Done, // Label 586: @17387 GIM_Try, /*On fail goto*//*Label 587*/ GIMT_Encode4(17412), // Rule ID 235 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, -1:{ *:[i16] }) => (NOT16r:{ *:[i16] } GR16:{ *:[i16] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT16r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 235, GIR_EraseRootFromParent_Done, // Label 587: @17412 GIM_Try, /*On fail goto*//*Label 588*/ GIMT_Encode4(17437), // Rule ID 243 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, -1:{ *:[i16] }) => (NOT16r_ND:{ *:[i16] } GR16:{ *:[i16] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT16r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 243, GIR_EraseRootFromParent_Done, // Label 588: @17437 GIM_Try, /*On fail goto*//*Label 589*/ GIMT_Encode4(17474), // Rule ID 24136 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (XOR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR16ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24136, GIR_EraseRootFromParent_Done, // Label 589: @17474 GIM_Try, /*On fail goto*//*Label 590*/ GIMT_Encode4(17511), // Rule ID 24226 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (XOR16ri_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR16ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24226, GIR_EraseRootFromParent_Done, // Label 590: @17511 GIM_Try, /*On fail goto*//*Label 591*/ GIMT_Encode4(17540), // Rule ID 24128 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (XOR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR16rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24128, GIR_Done, // Label 591: @17540 GIM_Try, /*On fail goto*//*Label 592*/ GIMT_Encode4(17569), // Rule ID 24218 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (XOR16rr_ND:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR16rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24218, GIR_Done, // Label 592: @17569 GIM_Reject, // Label 583: @17570 GIM_Reject, // Label 548: @17571 GIM_Try, /*On fail goto*//*Label 593*/ GIMT_Encode4(18183), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 594*/ GIMT_Encode4(17628), // Rule ID 23890 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(-2147483648), // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -2147483648:{ *:[i32] }) => (ADD32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -2147483648:{ *:[i32] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::ADD32ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(-2147483648), GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23890, GIR_EraseRootFromParent_Done, // Label 594: @17628 GIM_Try, /*On fail goto*//*Label 595*/ GIMT_Encode4(17686), // Rule ID 26421 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCMSK32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26421, GIR_EraseRootFromParent_Done, // Label 595: @17686 GIM_Try, /*On fail goto*//*Label 596*/ GIMT_Encode4(17795), // Rule ID 27468 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i32] } (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2), GR32:{ *:[i32] }:$src1) => (BTC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 27468, GIR_EraseRootFromParent_Done, // Label 596: @17795 GIM_Try, /*On fail goto*//*Label 597*/ GIMT_Encode4(17849), // Rule ID 18610 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCMSK32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18610, GIR_EraseRootFromParent_Done, // Label 597: @17849 GIM_Try, /*On fail goto*//*Label 598*/ GIMT_Encode4(17958), // Rule ID 24071 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2)) => (BTC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC32rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24071, GIR_EraseRootFromParent_Done, // Label 598: @17958 GIM_Try, /*On fail goto*//*Label 599*/ GIMT_Encode4(17990), // Rule ID 236 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }) => (NOT32r:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT32r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 236, GIR_EraseRootFromParent_Done, // Label 599: @17990 GIM_Try, /*On fail goto*//*Label 600*/ GIMT_Encode4(18022), // Rule ID 244 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }) => (NOT32r_ND:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT32r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 244, GIR_EraseRootFromParent_Done, // Label 600: @18022 GIM_Try, /*On fail goto*//*Label 601*/ GIMT_Encode4(18066), // Rule ID 24137 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (XOR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR32ri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24137, GIR_EraseRootFromParent_Done, // Label 601: @18066 GIM_Try, /*On fail goto*//*Label 602*/ GIMT_Encode4(18110), // Rule ID 24227 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (XOR32ri_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR32ri_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24227, GIR_EraseRootFromParent_Done, // Label 602: @18110 GIM_Try, /*On fail goto*//*Label 603*/ GIMT_Encode4(18146), // Rule ID 24129 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (XOR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR32rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24129, GIR_Done, // Label 603: @18146 GIM_Try, /*On fail goto*//*Label 604*/ GIMT_Encode4(18182), // Rule ID 24219 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (XOR32rr_ND:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR32rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24219, GIR_Done, // Label 604: @18182 GIM_Reject, // Label 593: @18183 GIM_Reject, // Label 549: @18184 GIM_Try, /*On fail goto*//*Label 605*/ GIMT_Encode4(18755), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 606*/ GIMT_Encode4(18250), // Rule ID 26422 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCMSK64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 26422, GIR_EraseRootFromParent_Done, // Label 606: @18250 GIM_Try, /*On fail goto*//*Label 607*/ GIMT_Encode4(18359), // Rule ID 27474 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i64] } (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2), GR64:{ *:[i64] }:$src1) => (BTC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 27474, GIR_EraseRootFromParent_Done, // Label 607: @18359 GIM_Try, /*On fail goto*//*Label 608*/ GIMT_Encode4(18413), // Rule ID 18611 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTBM), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BLCMSK64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 18611, GIR_EraseRootFromParent_Done, // Label 608: @18413 GIM_Try, /*On fail goto*//*Label 609*/ GIMT_Encode4(18522), // Rule ID 24077 // GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt8, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2)) => (BTC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::GR64_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::BTC64rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24077, GIR_EraseRootFromParent_Done, // Label 609: @18522 GIM_Try, /*On fail goto*//*Label 610*/ GIMT_Encode4(18554), // Rule ID 237 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }) => (NOT64r:{ *:[i64] } GR64:{ *:[i64] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT64r), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 237, GIR_EraseRootFromParent_Done, // Label 610: @18554 GIM_Try, /*On fail goto*//*Label 611*/ GIMT_Encode4(18586), // Rule ID 245 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD_In64BitMode), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1), // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }) => (NOT64r_ND:{ *:[i64] } GR64:{ *:[i64] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::NOT64r_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 245, GIR_EraseRootFromParent_Done, // Label 611: @18586 GIM_Try, /*On fail goto*//*Label 612*/ GIMT_Encode4(18634), // Rule ID 24138 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (XOR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR64ri32), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24138, GIR_EraseRootFromParent_Done, // Label 612: @18634 GIM_Try, /*On fail goto*//*Label 613*/ GIMT_Encode4(18682), // Rule ID 24228 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_i64immSExt32), // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (XOR64ri32_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XOR64ri32_ND), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for X86::EFLAGS*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24228, GIR_EraseRootFromParent_Done, // Label 613: @18682 GIM_Try, /*On fail goto*//*Label 614*/ GIMT_Encode4(18718), // Rule ID 24130 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (XOR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR64rr), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24130, GIR_Done, // Label 614: @18718 GIM_Try, /*On fail goto*//*Label 615*/ GIMT_Encode4(18754), // Rule ID 24220 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNDD), GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (XOR64rr_ND:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::XOR64rr_ND), GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(X86::EFLAGS), GIMT_Encode2(RegState::Dead), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24220, GIR_Done, // Label 615: @18754 GIM_Reject, // Label 605: @18755 GIM_Reject, // Label 550: @18756 GIM_Try, /*On fail goto*//*Label 616*/ GIMT_Encode4(19270), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_Try, /*On fail goto*//*Label 617*/ GIMT_Encode4(18885), // Rule ID 26798 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v2i1] } (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] }), VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID), // GIR_Coverage, 26798, GIR_EraseRootFromParent_Done, // Label 617: @18885 GIM_Try, /*On fail goto*//*Label 618*/ GIMT_Encode4(19000), // Rule ID 20782 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v2i1] } (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2), immAllOnesV:{ *:[v2i1] }) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID), // GIR_Coverage, 20782, GIR_EraseRootFromParent_Done, // Label 618: @19000 GIM_Try, /*On fail goto*//*Label 619*/ GIMT_Encode4(19114), // Rule ID 26799 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src2, (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] })) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID), // GIR_Coverage, 26799, GIR_EraseRootFromParent_Done, // Label 619: @19114 GIM_Try, /*On fail goto*//*Label 620*/ GIMT_Encode4(19186), // Rule ID 20766 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src, immAllOnesV:{ *:[v2i1] }) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KNOTWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KNOTWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID), // GIR_Coverage, 20766, GIR_EraseRootFromParent_Done, // Label 620: @19186 GIM_Try, /*On fail goto*//*Label 621*/ GIMT_Encode4(19269), // Rule ID 20786 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK2RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK2RegClassID), // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK2RegClassID), // GIR_Coverage, 20786, GIR_EraseRootFromParent_Done, // Label 621: @19269 GIM_Reject, // Label 616: @19270 GIM_Reject, // Label 551: @19271 GIM_Try, /*On fail goto*//*Label 622*/ GIMT_Encode4(19642), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 623*/ GIMT_Encode4(19514), // Rule ID 23265 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src, immAllOnesV:{ *:[v2i64] }) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/6, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5, GIR_AddImm8, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), // GIR_Coverage, 23265, GIR_EraseRootFromParent_Done, // Label 623: @19514 GIM_Try, /*On fail goto*//*Label 624*/ GIMT_Encode4(19560), // Rule ID 23273 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src, immAllOnesV:{ *:[v2i64] }) => (VPTERNLOGQZ128rri:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src, VR128X:{ *:[v2i64] }:$src, VR128X:{ *:[v2i64] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ128rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23273, GIR_EraseRootFromParent_Done, // Label 624: @19560 GIM_Try, /*On fail goto*//*Label 625*/ GIMT_Encode4(19587), // Rule ID 2110 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2110, GIR_Done, // Label 625: @19587 GIM_Try, /*On fail goto*//*Label 626*/ GIMT_Encode4(19614), // Rule ID 2112 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PXORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2112, GIR_Done, // Label 626: @19614 GIM_Try, /*On fail goto*//*Label 627*/ GIMT_Encode4(19641), // Rule ID 5764 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPXORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5764, GIR_Done, // Label 627: @19641 GIM_Reject, // Label 622: @19642 GIM_Reject, // Label 552: @19643 GIM_Try, /*On fail goto*//*Label 628*/ GIMT_Encode4(20157), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_Try, /*On fail goto*//*Label 629*/ GIMT_Encode4(19772), // Rule ID 26800 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v4i1] } (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] }), VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID), // GIR_Coverage, 26800, GIR_EraseRootFromParent_Done, // Label 629: @19772 GIM_Try, /*On fail goto*//*Label 630*/ GIMT_Encode4(19887), // Rule ID 20783 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v4i1] } (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2), immAllOnesV:{ *:[v4i1] }) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID), // GIR_Coverage, 20783, GIR_EraseRootFromParent_Done, // Label 630: @19887 GIM_Try, /*On fail goto*//*Label 631*/ GIMT_Encode4(20001), // Rule ID 26801 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src2, (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] })) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID), // GIR_Coverage, 26801, GIR_EraseRootFromParent_Done, // Label 631: @20001 GIM_Try, /*On fail goto*//*Label 632*/ GIMT_Encode4(20073), // Rule ID 20765 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src, immAllOnesV:{ *:[v4i1] }) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KNOTWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KNOTWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID), // GIR_Coverage, 20765, GIR_EraseRootFromParent_Done, // Label 632: @20073 GIM_Try, /*On fail goto*//*Label 633*/ GIMT_Encode4(20156), // Rule ID 20787 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK4RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK4RegClassID), // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK4RegClassID), // GIR_Coverage, 20787, GIR_EraseRootFromParent_Done, // Label 633: @20156 GIM_Reject, // Label 628: @20157 GIM_Reject, // Label 553: @20158 GIM_Try, /*On fail goto*//*Label 634*/ GIMT_Encode4(20529), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 635*/ GIMT_Encode4(20401), // Rule ID 23264 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src, immAllOnesV:{ *:[v4i32] }) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v4i32] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v4i32] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v4i32] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/6, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5, GIR_AddImm8, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), // GIR_Coverage, 23264, GIR_EraseRootFromParent_Done, // Label 635: @20401 GIM_Try, /*On fail goto*//*Label 636*/ GIMT_Encode4(20447), // Rule ID 23272 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src, immAllOnesV:{ *:[v4i32] }) => (VPTERNLOGQZ128rri:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src, VR128X:{ *:[v4i32] }:$src, VR128X:{ *:[v4i32] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ128rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23272, GIR_EraseRootFromParent_Done, // Label 636: @20447 GIM_Try, /*On fail goto*//*Label 637*/ GIMT_Encode4(20474), // Rule ID 5791 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (xor:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPXORDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORDZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5791, GIR_Done, // Label 637: @20474 GIM_Try, /*On fail goto*//*Label 638*/ GIMT_Encode4(20501), // Rule ID 19414 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (xor:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPXORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19414, GIR_Done, // Label 638: @20501 GIM_Try, /*On fail goto*//*Label 639*/ GIMT_Encode4(20528), // Rule ID 19438 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (xor:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PXORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PXORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19438, GIR_Done, // Label 639: @20528 GIM_Reject, // Label 634: @20529 GIM_Reject, // Label 554: @20530 GIM_Try, /*On fail goto*//*Label 640*/ GIMT_Encode4(20901), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 641*/ GIMT_Encode4(20773), // Rule ID 23269 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src, immAllOnesV:{ *:[v4i64] }) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/6, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5, GIR_AddImm8, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), // GIR_Coverage, 23269, GIR_EraseRootFromParent_Done, // Label 641: @20773 GIM_Try, /*On fail goto*//*Label 642*/ GIMT_Encode4(20819), // Rule ID 23277 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src, immAllOnesV:{ *:[v4i64] }) => (VPTERNLOGQZ256rri:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src, VR256X:{ *:[v4i64] }:$src, VR256X:{ *:[v4i64] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ256rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23277, GIR_EraseRootFromParent_Done, // Label 642: @20819 GIM_Try, /*On fail goto*//*Label 643*/ GIMT_Encode4(20846), // Rule ID 2114 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPXORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2114, GIR_Done, // Label 643: @20846 GIM_Try, /*On fail goto*//*Label 644*/ GIMT_Encode4(20873), // Rule ID 5755 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPXORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5755, GIR_Done, // Label 644: @20873 GIM_Try, /*On fail goto*//*Label 645*/ GIMT_Encode4(20900), // Rule ID 19385 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VXORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VXORPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19385, GIR_Done, // Label 645: @20900 GIM_Reject, // Label 640: @20901 GIM_Reject, // Label 555: @20902 GIM_Try, /*On fail goto*//*Label 646*/ GIMT_Encode4(21672), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_Try, /*On fail goto*//*Label 647*/ GIMT_Encode4(20977), // Rule ID 24982 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (KXNORBkk:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORBkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24982, GIR_EraseRootFromParent_Done, // Label 647: @20977 GIM_Try, /*On fail goto*//*Label 648*/ GIMT_Encode4(21094), // Rule ID 26794 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID), // GIR_Coverage, 26794, GIR_EraseRootFromParent_Done, // Label 648: @21094 GIM_Try, /*On fail goto*//*Label 649*/ GIMT_Encode4(21157), // Rule ID 4375 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2), immAllOnesV:{ *:[v8i1] }) => (KXNORBkk:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORBkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4375, GIR_EraseRootFromParent_Done, // Label 649: @21157 GIM_Try, /*On fail goto*//*Label 650*/ GIMT_Encode4(21275), // Rule ID 20780 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2), immAllOnesV:{ *:[v8i1] }) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID), // GIR_Coverage, 20780, GIR_EraseRootFromParent_Done, // Label 650: @21275 GIM_Try, /*On fail goto*//*Label 651*/ GIMT_Encode4(21335), // Rule ID 24983 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (KXNORBkk:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORBkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24983, GIR_EraseRootFromParent_Done, // Label 651: @21335 GIM_Try, /*On fail goto*//*Label 652*/ GIMT_Encode4(21452), // Rule ID 26795 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXNORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID), // GIR_Coverage, 26795, GIR_EraseRootFromParent_Done, // Label 652: @21452 GIM_Try, /*On fail goto*//*Label 653*/ GIMT_Encode4(21487), // Rule ID 4363 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src, immAllOnesV:{ *:[v8i1] }) => (KNOTBkk:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KNOTBkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4363, GIR_EraseRootFromParent_Done, // Label 653: @21487 GIM_Try, /*On fail goto*//*Label 654*/ GIMT_Encode4(21562), // Rule ID 20764 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_NoDQI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src, immAllOnesV:{ *:[v8i1] }) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KNOTWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KNOTWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID), // GIR_Coverage, 20764, GIR_EraseRootFromParent_Done, // Label 654: @21562 GIM_Try, /*On fail goto*//*Label 655*/ GIMT_Encode4(21585), // Rule ID 4379 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KXORBkk:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KXORBkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4379, GIR_Done, // Label 655: @21585 GIM_Try, /*On fail goto*//*Label 656*/ GIMT_Encode4(21671), // Rule ID 20784 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_NoDQI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXORWkk:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KXORWkk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID), // GIR_Coverage, 20784, GIR_EraseRootFromParent_Done, // Label 656: @21671 GIM_Reject, // Label 646: @21672 GIM_Reject, // Label 556: @21673 GIM_Try, /*On fail goto*//*Label 657*/ GIMT_Encode4(22044), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 658*/ GIMT_Encode4(21916), // Rule ID 23263 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src, immAllOnesV:{ *:[v8i16] }) => (EXTRACT_SUBREG:{ *:[v8i16] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v8i16] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v8i16] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v8i16] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/6, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5, GIR_AddImm8, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), // GIR_Coverage, 23263, GIR_EraseRootFromParent_Done, // Label 658: @21916 GIM_Try, /*On fail goto*//*Label 659*/ GIMT_Encode4(21962), // Rule ID 23271 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src, immAllOnesV:{ *:[v8i16] }) => (VPTERNLOGQZ128rri:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src, VR128X:{ *:[v8i16] }:$src, VR128X:{ *:[v8i16] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ128rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23271, GIR_EraseRootFromParent_Done, // Label 659: @21962 GIM_Try, /*On fail goto*//*Label 660*/ GIMT_Encode4(21989), // Rule ID 19413 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (xor:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPXORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19413, GIR_Done, // Label 660: @21989 GIM_Try, /*On fail goto*//*Label 661*/ GIMT_Encode4(22016), // Rule ID 19437 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (xor:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PXORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PXORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19437, GIR_Done, // Label 661: @22016 GIM_Try, /*On fail goto*//*Label 662*/ GIMT_Encode4(22043), // Rule ID 21352 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (xor:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPXORQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21352, GIR_Done, // Label 662: @22043 GIM_Reject, // Label 657: @22044 GIM_Reject, // Label 557: @22045 GIM_Try, /*On fail goto*//*Label 663*/ GIMT_Encode4(22416), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 664*/ GIMT_Encode4(22288), // Rule ID 23268 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src, immAllOnesV:{ *:[v8i32] }) => (EXTRACT_SUBREG:{ *:[v8i32] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/6, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5, GIR_AddImm8, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), // GIR_Coverage, 23268, GIR_EraseRootFromParent_Done, // Label 664: @22288 GIM_Try, /*On fail goto*//*Label 665*/ GIMT_Encode4(22334), // Rule ID 23276 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src, immAllOnesV:{ *:[v8i32] }) => (VPTERNLOGQZ256rri:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src, VR256X:{ *:[v8i32] }:$src, VR256X:{ *:[v8i32] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ256rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23276, GIR_EraseRootFromParent_Done, // Label 665: @22334 GIM_Try, /*On fail goto*//*Label 666*/ GIMT_Encode4(22361), // Rule ID 5782 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (xor:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPXORDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORDZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5782, GIR_Done, // Label 666: @22361 GIM_Try, /*On fail goto*//*Label 667*/ GIMT_Encode4(22388), // Rule ID 19358 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (xor:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPXORYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19358, GIR_Done, // Label 667: @22388 GIM_Try, /*On fail goto*//*Label 668*/ GIMT_Encode4(22415), // Rule ID 19384 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (xor:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VXORPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VXORPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19384, GIR_Done, // Label 668: @22415 GIM_Reject, // Label 663: @22416 GIM_Reject, // Label 558: @22417 GIM_Try, /*On fail goto*//*Label 669*/ GIMT_Encode4(22494), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_Try, /*On fail goto*//*Label 670*/ GIMT_Encode4(22474), // Rule ID 23261 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src, immAllOnesV:{ *:[v8i64] }) => (VPTERNLOGQZrri:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src, VR512:{ *:[v8i64] }:$src, VR512:{ *:[v8i64] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23261, GIR_EraseRootFromParent_Done, // Label 670: @22474 GIM_Try, /*On fail goto*//*Label 671*/ GIMT_Encode4(22493), // Rule ID 5746 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (xor:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPXORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5746, GIR_Done, // Label 671: @22493 GIM_Reject, // Label 669: @22494 GIM_Reject, // Label 559: @22495 GIM_Try, /*On fail goto*//*Label 672*/ GIMT_Encode4(22752), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_Try, /*On fail goto*//*Label 673*/ GIMT_Encode4(22570), // Rule ID 24984 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v16i1] } (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] }), VK16:{ *:[v16i1] }:$src2) => (KXNORWkk:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24984, GIR_EraseRootFromParent_Done, // Label 673: @22570 GIM_Try, /*On fail goto*//*Label 674*/ GIMT_Encode4(22633), // Rule ID 4376 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v16i1] } (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2), immAllOnesV:{ *:[v16i1] }) => (KXNORWkk:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4376, GIR_EraseRootFromParent_Done, // Label 674: @22633 GIM_Try, /*On fail goto*//*Label 675*/ GIMT_Encode4(22693), // Rule ID 24985 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src2, (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] })) => (KXNORWkk:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORWkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24985, GIR_EraseRootFromParent_Done, // Label 675: @22693 GIM_Try, /*On fail goto*//*Label 676*/ GIMT_Encode4(22728), // Rule ID 4364 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src, immAllOnesV:{ *:[v16i1] }) => (KNOTWkk:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KNOTWkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4364, GIR_EraseRootFromParent_Done, // Label 676: @22728 GIM_Try, /*On fail goto*//*Label 677*/ GIMT_Encode4(22751), // Rule ID 4380 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID), // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KXORWkk:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KXORWkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4380, GIR_Done, // Label 677: @22751 GIM_Reject, // Label 672: @22752 GIM_Reject, // Label 560: @22753 GIM_Try, /*On fail goto*//*Label 678*/ GIMT_Encode4(23124), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 679*/ GIMT_Encode4(22996), // Rule ID 23262 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src, immAllOnesV:{ *:[v16i8] }) => (EXTRACT_SUBREG:{ *:[v16i8] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v16i8] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v16i8] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v16i8] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/6, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR128XRegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5, GIR_AddImm8, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_xmm), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), // GIR_Coverage, 23262, GIR_EraseRootFromParent_Done, // Label 679: @22996 GIM_Try, /*On fail goto*//*Label 680*/ GIMT_Encode4(23042), // Rule ID 23270 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src, immAllOnesV:{ *:[v16i8] }) => (VPTERNLOGQZ128rri:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src, VR128X:{ *:[v16i8] }:$src, VR128X:{ *:[v16i8] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ128rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23270, GIR_EraseRootFromParent_Done, // Label 680: @23042 GIM_Try, /*On fail goto*//*Label 681*/ GIMT_Encode4(23069), // Rule ID 19412 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (xor:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPXORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19412, GIR_Done, // Label 681: @23069 GIM_Try, /*On fail goto*//*Label 682*/ GIMT_Encode4(23096), // Rule ID 19436 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (xor:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PXORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::PXORrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19436, GIR_Done, // Label 682: @23096 GIM_Try, /*On fail goto*//*Label 683*/ GIMT_Encode4(23123), // Rule ID 21351 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (xor:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPXORQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ128rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21351, GIR_Done, // Label 683: @23123 GIM_Reject, // Label 678: @23124 GIM_Reject, // Label 561: @23125 GIM_Try, /*On fail goto*//*Label 684*/ GIMT_Encode4(23496), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 685*/ GIMT_Encode4(23368), // Rule ID 23267 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src, immAllOnesV:{ *:[v16i16] }) => (EXTRACT_SUBREG:{ *:[v16i16] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/6, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5, GIR_AddImm8, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), // GIR_Coverage, 23267, GIR_EraseRootFromParent_Done, // Label 685: @23368 GIM_Try, /*On fail goto*//*Label 686*/ GIMT_Encode4(23414), // Rule ID 23275 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src, immAllOnesV:{ *:[v16i16] }) => (VPTERNLOGQZ256rri:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src, VR256X:{ *:[v16i16] }:$src, VR256X:{ *:[v16i16] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ256rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23275, GIR_EraseRootFromParent_Done, // Label 686: @23414 GIM_Try, /*On fail goto*//*Label 687*/ GIMT_Encode4(23441), // Rule ID 19357 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (xor:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPXORYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19357, GIR_Done, // Label 687: @23441 GIM_Try, /*On fail goto*//*Label 688*/ GIMT_Encode4(23468), // Rule ID 19383 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (xor:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VXORPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VXORPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19383, GIR_Done, // Label 688: @23468 GIM_Try, /*On fail goto*//*Label 689*/ GIMT_Encode4(23495), // Rule ID 21368 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (xor:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPXORQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21368, GIR_Done, // Label 689: @23495 GIM_Reject, // Label 684: @23496 GIM_Reject, // Label 562: @23497 GIM_Try, /*On fail goto*//*Label 690*/ GIMT_Encode4(23574), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_Try, /*On fail goto*//*Label 691*/ GIMT_Encode4(23554), // Rule ID 23260 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src, immAllOnesV:{ *:[v16i32] }) => (VPTERNLOGQZrri:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src, VR512:{ *:[v16i32] }:$src, VR512:{ *:[v16i32] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23260, GIR_EraseRootFromParent_Done, // Label 691: @23554 GIM_Try, /*On fail goto*//*Label 692*/ GIMT_Encode4(23573), // Rule ID 5773 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (xor:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPXORDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORDZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 5773, GIR_Done, // Label 692: @23573 GIM_Reject, // Label 690: @23574 GIM_Reject, // Label 563: @23575 GIM_Try, /*On fail goto*//*Label 693*/ GIMT_Encode4(23832), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_Try, /*On fail goto*//*Label 694*/ GIMT_Encode4(23650), // Rule ID 24986 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v32i1] } (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] }), VK32:{ *:[v32i1] }:$src2) => (KXNORDkk:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORDkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24986, GIR_EraseRootFromParent_Done, // Label 694: @23650 GIM_Try, /*On fail goto*//*Label 695*/ GIMT_Encode4(23713), // Rule ID 4377 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v32i1] } (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2), immAllOnesV:{ *:[v32i1] }) => (KXNORDkk:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORDkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4377, GIR_EraseRootFromParent_Done, // Label 695: @23713 GIM_Try, /*On fail goto*//*Label 696*/ GIMT_Encode4(23773), // Rule ID 24987 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src2, (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] })) => (KXNORDkk:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORDkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24987, GIR_EraseRootFromParent_Done, // Label 696: @23773 GIM_Try, /*On fail goto*//*Label 697*/ GIMT_Encode4(23808), // Rule ID 4365 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src, immAllOnesV:{ *:[v32i1] }) => (KNOTDkk:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KNOTDkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4365, GIR_EraseRootFromParent_Done, // Label 697: @23808 GIM_Try, /*On fail goto*//*Label 698*/ GIMT_Encode4(23831), // Rule ID 4381 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID), // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KXORDkk:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KXORDkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4381, GIR_Done, // Label 698: @23831 GIM_Reject, // Label 693: @23832 GIM_Reject, // Label 564: @23833 GIM_Try, /*On fail goto*//*Label 699*/ GIMT_Encode4(24204), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 700*/ GIMT_Encode4(24076), // Rule ID 23266 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasEVEX512_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src, immAllOnesV:{ *:[v32i8] }) => (EXTRACT_SUBREG:{ *:[v32i8] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v32i8] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v32i8] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v32i8] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/6, /*TempRegID*/6, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/6, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/5, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/4, /*TempRegID*/4, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::VR256XRegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/3, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/5, GIR_AddImm8, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_ymm), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VR256XRegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::VR512RegClassID), // GIR_Coverage, 23266, GIR_EraseRootFromParent_Done, // Label 700: @24076 GIM_Try, /*On fail goto*//*Label 701*/ GIMT_Encode4(24122), // Rule ID 23274 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src, immAllOnesV:{ *:[v32i8] }) => (VPTERNLOGQZ256rri:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src, VR256X:{ *:[v32i8] }:$src, VR256X:{ *:[v32i8] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZ256rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23274, GIR_EraseRootFromParent_Done, // Label 701: @24122 GIM_Try, /*On fail goto*//*Label 702*/ GIMT_Encode4(24149), // Rule ID 19356 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2_NoVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (xor:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPXORYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19356, GIR_Done, // Label 702: @24149 GIM_Try, /*On fail goto*//*Label 703*/ GIMT_Encode4(24176), // Rule ID 19382 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX1Only), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (xor:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VXORPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VXORPSYrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19382, GIR_Done, // Label 703: @24176 GIM_Try, /*On fail goto*//*Label 704*/ GIMT_Encode4(24203), // Rule ID 21367 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (xor:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPXORQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZ256rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21367, GIR_Done, // Label 704: @24203 GIM_Reject, // Label 699: @24204 GIM_Reject, // Label 565: @24205 GIM_Try, /*On fail goto*//*Label 705*/ GIMT_Encode4(24282), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_Try, /*On fail goto*//*Label 706*/ GIMT_Encode4(24262), // Rule ID 23259 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src, immAllOnesV:{ *:[v32i16] }) => (VPTERNLOGQZrri:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src, VR512:{ *:[v32i16] }:$src, VR512:{ *:[v32i16] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23259, GIR_EraseRootFromParent_Done, // Label 706: @24262 GIM_Try, /*On fail goto*//*Label 707*/ GIMT_Encode4(24281), // Rule ID 21384 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (xor:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPXORQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21384, GIR_Done, // Label 707: @24281 GIM_Reject, // Label 705: @24282 GIM_Reject, // Label 566: @24283 GIM_Try, /*On fail goto*//*Label 708*/ GIMT_Encode4(24540), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_Try, /*On fail goto*//*Label 709*/ GIMT_Encode4(24358), // Rule ID 24988 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v64i1] } (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] }), VK64:{ *:[v64i1] }:$src2) => (KXNORQkk:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORQkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24988, GIR_EraseRootFromParent_Done, // Label 709: @24358 GIM_Try, /*On fail goto*//*Label 710*/ GIMT_Encode4(24421), // Rule ID 4378 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v64i1] } (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2), immAllOnesV:{ *:[v64i1] }) => (KXNORQkk:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORQkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4378, GIR_EraseRootFromParent_Done, // Label 710: @24421 GIM_Try, /*On fail goto*//*Label 711*/ GIMT_Encode4(24481), // Rule ID 24989 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*NumInsns*/2, // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src2, (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] })) => (KXNORQkk:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KXNORQkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_RootToRootCopy, /*OpIdx*/1, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 24989, GIR_EraseRootFromParent_Done, // Label 711: @24481 GIM_Try, /*On fail goto*//*Label 712*/ GIMT_Encode4(24516), // Rule ID 4366 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src, immAllOnesV:{ *:[v64i1] }) => (KNOTQkk:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KNOTQkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4366, GIR_EraseRootFromParent_Done, // Label 712: @24516 GIM_Try, /*On fail goto*//*Label 713*/ GIMT_Encode4(24539), // Rule ID 4382 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK64RegClassID), // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KXORQkk:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::KXORQkk), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4382, GIR_Done, // Label 713: @24539 GIM_Reject, // Label 708: @24540 GIM_Reject, // Label 567: @24541 GIM_Try, /*On fail goto*//*Label 714*/ GIMT_Encode4(24618), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v64s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_Try, /*On fail goto*//*Label 715*/ GIMT_Encode4(24598), // Rule ID 23258 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC), GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*NumInsns*/1, // (xor:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src, immAllOnesV:{ *:[v64i8] }) => (VPTERNLOGQZrri:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src, VR512:{ *:[v64i8] }:$src, VR512:{ *:[v64i8] }:$src, 15:{ *:[i8] }) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPTERNLOGQZrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_RootToRootCopy, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/0, /*Imm*/15, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23258, GIR_EraseRootFromParent_Done, // Label 715: @24598 GIM_Try, /*On fail goto*//*Label 716*/ GIMT_Encode4(24617), // Rule ID 21383 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (xor:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPXORQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VPXORQZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21383, GIR_Done, // Label 716: @24617 GIM_Reject, // Label 714: @24618 GIM_Reject, // Label 568: @24619 GIM_Reject, // Label 6: @24620 GIM_Try, /*On fail goto*//*Label 717*/ GIMT_Encode4(24786), GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(16), GIMT_Encode2(24), /*)*//*default:*//*Label 721*/ GIMT_Encode4(24785), /*GILLT_v16s1*//*Label 718*/ GIMT_Encode4(24671), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v32s1*//*Label 719*/ GIMT_Encode4(24709), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v64s1*//*Label 720*/ GIMT_Encode4(24747), // Label 718: @24671 GIM_Try, /*On fail goto*//*Label 722*/ GIMT_Encode4(24708), // Rule ID 20788 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK8RegClassID), // (concat_vectors:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KUNPCKBWkk:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK8:{ *:[v8i1] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KUNPCKBWkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 20788, GIR_EraseRootFromParent_Done, // Label 722: @24708 GIM_Reject, // Label 719: @24709 GIM_Try, /*On fail goto*//*Label 723*/ GIMT_Encode4(24746), // Rule ID 20789 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK16RegClassID), // (concat_vectors:{ *:[v32i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KUNPCKWDkk:{ *:[v32i1] } VK16:{ *:[v16i1] }:$src2, VK16:{ *:[v16i1] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KUNPCKWDkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 20789, GIR_EraseRootFromParent_Done, // Label 723: @24746 GIM_Reject, // Label 720: @24747 GIM_Try, /*On fail goto*//*Label 724*/ GIMT_Encode4(24784), // Rule ID 20790 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VK32RegClassID), // (concat_vectors:{ *:[v64i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KUNPCKDQkk:{ *:[v64i1] } VK32:{ *:[v32i1] }:$src2, VK32:{ *:[v32i1] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KUNPCKDQkk), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src2 GIR_RootToRootCopy, /*OpIdx*/1, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 20790, GIR_EraseRootFromParent_Done, // Label 724: @24784 GIM_Reject, // Label 721: @24785 GIM_Reject, // Label 717: @24786 GIM_Reject, // Label 7: @24787 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(1), GIMT_Encode2(24), /*)*//*default:*//*Label 733*/ GIMT_Encode4(26525), /*GILLT_s8*//*Label 725*/ GIMT_Encode4(24890), /*GILLT_s16*//*Label 726*/ GIMT_Encode4(24948), /*GILLT_s32*//*Label 727*/ GIMT_Encode4(25763), /*GILLT_s64*//*Label 728*/ GIMT_Encode4(25991), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v8s1*//*Label 729*/ GIMT_Encode4(26219), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v16s1*//*Label 730*/ GIMT_Encode4(26301), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v32s1*//*Label 731*/ GIMT_Encode4(26383), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v64s1*//*Label 732*/ GIMT_Encode4(26454), // Label 725: @24890 GIM_Try, /*On fail goto*//*Label 734*/ GIMT_Encode4(24947), // Rule ID 20719 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK8RegClassID), // (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } (COPY_TO_REGCLASS:{ *:[i32] } VK8:{ *:[v8i1] }:$src, GR32:{ *:[i32] }), sub_8bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_8bit), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR8RegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID), // GIR_Coverage, 20719, GIR_EraseRootFromParent_Done, // Label 734: @24947 GIM_Reject, // Label 726: @24948 GIM_Try, /*On fail goto*//*Label 735*/ GIMT_Encode4(25005), // Rule ID 20716 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK16RegClassID), // (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (COPY_TO_REGCLASS:{ *:[i32] } VK16:{ *:[v16i1] }:$src, GR32:{ *:[i32] }), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID), // GIR_Coverage, 20716, GIR_EraseRootFromParent_Done, // Label 735: @25005 GIM_Try, /*On fail goto*//*Label 736*/ GIMT_Encode4(25106), // Rule ID 23476 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (bitconvert:{ *:[f16] } GR16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (VMOVW2SHrr:{ *:[f128] } (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] })), FR16X:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/2, /*TempRegID*/2, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/2, /*Imm*/4, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID), GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, GIMT_Encode2(X86::GR16RegClassID), GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVW2SHrr), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID), // GIR_Coverage, 23476, GIR_EraseRootFromParent_Done, // Label 736: @25106 GIM_Try, /*On fail goto*//*Label 737*/ GIMT_Encode4(25183), // Rule ID 23489 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR16XRegClassID), // (bitconvert:{ *:[i16] } FR16X:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (VMOVSH2Wrr:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[f128] } FR16X:{ *:[f16] }:$src, VR128X:{ *:[i32] })), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVSH2Wrr), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID), // GIR_Coverage, 23489, GIR_EraseRootFromParent_Done, // Label 737: @25183 GIM_Try, /*On fail goto*//*Label 738*/ GIMT_Encode4(25259), // Rule ID 19600 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (bitconvert:{ *:[i16] } f16:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (VPEXTRWrri:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[v8i16] } FR16:{ *:[f16] }:$src, VR128:{ *:[i32] }), 0:{ *:[i8] }), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPEXTRWrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddImm8, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID), // GIR_Coverage, 19600, GIR_EraseRootFromParent_Done, // Label 738: @25259 GIM_Try, /*On fail goto*//*Label 739*/ GIMT_Encode4(25376), // Rule ID 19601 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16RegClassID), // (bitconvert:{ *:[f16] } i16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (VPINSRWrri:{ *:[f128] } (IMPLICIT_DEF:{ *:[v8i16] }), (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), 0:{ *:[i8] }), FR16:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/4, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/3, /*Imm*/4, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID), GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID), GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::GR16RegClassID), GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPINSRWrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_AddImm8, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16RegClassID), // GIR_Coverage, 19601, GIR_EraseRootFromParent_Done, // Label 739: @25376 GIM_Try, /*On fail goto*//*Label 740*/ GIMT_Encode4(25452), // Rule ID 19597 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (bitconvert:{ *:[i16] } f16:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (PEXTRWrri:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[v8i16] } FR16:{ *:[f16] }:$src, VR128:{ *:[i32] }), 0:{ *:[i8] }), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::PEXTRWrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddImm8, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID), // GIR_Coverage, 19597, GIR_EraseRootFromParent_Done, // Label 740: @25452 GIM_Try, /*On fail goto*//*Label 741*/ GIMT_Encode4(25569), // Rule ID 19598 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16RegClassID), // (bitconvert:{ *:[f16] } i16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (PINSRWrri:{ *:[f128] } (IMPLICIT_DEF:{ *:[v8i16] }), (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), 0:{ *:[i8] }), FR16:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/4, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/3, /*Imm*/4, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID), GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID), GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::GR16RegClassID), GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::PINSRWrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_AddImm8, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16RegClassID), // GIR_Coverage, 19598, GIR_EraseRootFromParent_Done, // Label 741: @25569 GIM_Try, /*On fail goto*//*Label 742*/ GIMT_Encode4(25645), // Rule ID 23160 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (bitconvert:{ *:[i16] } f16:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (VPEXTRWZrri:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[v8i16] } FR16X:{ *:[f16] }:$src, VR128X:{ *:[i32] }), 0:{ *:[i8] }), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPEXTRWZrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddImm8, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(X86::sub_16bit), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR16RegClassID), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(X86::GR32RegClassID), // GIR_Coverage, 23160, GIR_EraseRootFromParent_Done, // Label 742: @25645 GIM_Try, /*On fail goto*//*Label 743*/ GIMT_Encode4(25762), // Rule ID 23161 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBWI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR16XRegClassID), // (bitconvert:{ *:[f16] } i16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (VPINSRWZrri:{ *:[f128] } (IMPLICIT_DEF:{ *:[v8i16] }), (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), 0:{ *:[i8] }), FR16X:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/4, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/4, GIR_BuildMI, /*InsnID*/3, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/3, /*TempRegID*/3, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/3, /*Imm*/4, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID), GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID), GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, GIMT_Encode2(X86::GR16RegClassID), GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VPINSRWZrri), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/2, GIR_AddImm8, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::FR16XRegClassID), // GIR_Coverage, 23161, GIR_EraseRootFromParent_Done, // Label 743: @25762 GIM_Reject, // Label 727: @25763 GIM_Try, /*On fail goto*//*Label 744*/ GIMT_Encode4(25789), // Rule ID 2863 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVDI2SSrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2863, GIR_Done, // Label 744: @25789 GIM_Try, /*On fail goto*//*Label 745*/ GIMT_Encode4(25815), // Rule ID 2864 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (MOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVDI2SSrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2864, GIR_Done, // Label 745: @25815 GIM_Try, /*On fail goto*//*Label 746*/ GIMT_Encode4(25841), // Rule ID 2873 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID), // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VMOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVSS2DIrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2873, GIR_Done, // Label 746: @25841 GIM_Try, /*On fail goto*//*Label 747*/ GIMT_Encode4(25867), // Rule ID 2874 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID), // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (MOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVSS2DIrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2874, GIR_Done, // Label 747: @25867 GIM_Try, /*On fail goto*//*Label 748*/ GIMT_Encode4(25893), // Rule ID 4550 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSZrr:{ *:[f32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVDI2SSZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4550, GIR_Done, // Label 748: @25893 GIM_Try, /*On fail goto*//*Label 749*/ GIMT_Encode4(25919), // Rule ID 4555 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID), // (bitconvert:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VMOVSS2DIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVSS2DIZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4555, GIR_Done, // Label 749: @25919 GIM_Try, /*On fail goto*//*Label 750*/ GIMT_Encode4(25946), // Rule ID 20727 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), // (bitconvert:{ *:[i32] } VK32:{ *:[v32i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i32] } VK32:{ *:[v32i1] }:$src, GR32:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR32RegClassID), // GIR_Coverage, 20727, GIR_Done, // Label 750: @25946 GIM_Try, /*On fail goto*//*Label 751*/ GIMT_Encode4(25990), // Rule ID 21207 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v32s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR32XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK32RegClassID), // (bitconvert:{ *:[f32] } VK32:{ *:[v32i1] }:$src) => (VMOVDI2SSZrr:{ *:[f32] } (KMOVDrk:{ *:[i32] } VK32:{ *:[v32i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KMOVDrk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOVDI2SSZrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21207, GIR_EraseRootFromParent_Done, // Label 751: @25990 GIM_Reject, // Label 728: @25991 GIM_Try, /*On fail goto*//*Label 752*/ GIMT_Encode4(26017), // Rule ID 2858 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOV64toSDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2858, GIR_Done, // Label 752: @26017 GIM_Try, /*On fail goto*//*Label 753*/ GIMT_Encode4(26043), // Rule ID 2862 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (MOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOV64toSDrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2862, GIR_Done, // Label 753: @26043 GIM_Try, /*On fail goto*//*Label 754*/ GIMT_Encode4(26069), // Rule ID 2871 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID), // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VMOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVSDto64rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2871, GIR_Done, // Label 754: @26069 GIM_Try, /*On fail goto*//*Label 755*/ GIMT_Encode4(26095), // Rule ID 2872 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID), // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (MOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::MOVSDto64rr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2872, GIR_Done, // Label 755: @26095 GIM_Try, /*On fail goto*//*Label 756*/ GIMT_Encode4(26121), // Rule ID 4548 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDZrr:{ *:[f64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOV64toSDZrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4548, GIR_Done, // Label 756: @26121 GIM_Try, /*On fail goto*//*Label 757*/ GIMT_Encode4(26147), // Rule ID 4549 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID), // (bitconvert:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VMOVSDto64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VMOVSDto64Zrr), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 4549, GIR_Done, // Label 757: @26147 GIM_Try, /*On fail goto*//*Label 758*/ GIMT_Encode4(26174), // Rule ID 20729 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), // (bitconvert:{ *:[i64] } VK64:{ *:[v64i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i64] } VK64:{ *:[v64i1] }:$src, GR64:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::GR64RegClassID), // GIR_Coverage, 20729, GIR_Done, // Label 758: @26174 GIM_Try, /*On fail goto*//*Label 759*/ GIMT_Encode4(26218), // Rule ID 21209 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v64s1, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::FR64XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VK64RegClassID), // (bitconvert:{ *:[f64] } VK64:{ *:[v64i1] }:$src) => (VMOV64toSDZrr:{ *:[f64] } (KMOVQrk:{ *:[i64] } VK64:{ *:[v64i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::KMOVQrk), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMOV64toSDZrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21209, GIR_EraseRootFromParent_Done, // Label 759: @26218 GIM_Reject, // Label 729: @26219 GIM_Try, /*On fail goto*//*Label 760*/ GIMT_Encode4(26300), // Rule ID 20718 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK8RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (bitconvert:{ *:[v8i1] } GR8:{ *:[i8] }:$src) => (COPY_TO_REGCLASS:{ *:[v8i1] } (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src, sub_8bit:{ *:[i32] }), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR8RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK8RegClassID), // GIR_Coverage, 20718, GIR_EraseRootFromParent_Done, // Label 760: @26300 GIM_Reject, // Label 730: @26301 GIM_Try, /*On fail goto*//*Label 761*/ GIMT_Encode4(26382), // Rule ID 20715 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK16RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (bitconvert:{ *:[v16i1] } GR16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[v16i1] } (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), VK16:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF), GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::INSERT_SUBREG), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm8, /*InsnID*/1, /*Imm*/4, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, GIMT_Encode2(X86::LOW32_ADDR_ACCESS_RBPRegClassID), GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, GIMT_Encode2(X86::GR16RegClassID), GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK16RegClassID), // GIR_Coverage, 20715, GIR_EraseRootFromParent_Done, // Label 761: @26382 GIM_Reject, // Label 731: @26383 GIM_Try, /*On fail goto*//*Label 762*/ GIMT_Encode4(26453), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK32RegClassID), GIM_Try, /*On fail goto*//*Label 763*/ GIMT_Encode4(26415), // Rule ID 20726 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (bitconvert:{ *:[v32i1] } GR32:{ *:[i32] }:$src) => (COPY_TO_REGCLASS:{ *:[v32i1] } GR32:{ *:[i32] }:$src, VK32:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK32RegClassID), // GIR_Coverage, 20726, GIR_Done, // Label 763: @26415 GIM_Try, /*On fail goto*//*Label 764*/ GIMT_Encode4(26452), // Rule ID 21206 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID), // (bitconvert:{ *:[v32i1] } FR32X:{ *:[f32] }:$src) => (KMOVDkr:{ *:[v32i1] } (VMOVSS2DIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVSS2DIZrr), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KMOVDkr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21206, GIR_EraseRootFromParent_Done, // Label 764: @26452 GIM_Reject, // Label 762: @26453 GIM_Reject, // Label 732: @26454 GIM_Try, /*On fail goto*//*Label 765*/ GIMT_Encode4(26524), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VK64RegClassID), GIM_Try, /*On fail goto*//*Label 766*/ GIMT_Encode4(26486), // Rule ID 20728 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (bitconvert:{ *:[v64i1] } GR64:{ *:[i64] }:$src) => (COPY_TO_REGCLASS:{ *:[v64i1] } GR64:{ *:[i64] }:$src, VK64:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(X86::VK64RegClassID), // GIR_Coverage, 20728, GIR_Done, // Label 766: @26486 GIM_Try, /*On fail goto*//*Label 767*/ GIMT_Encode4(26523), // Rule ID 21208 // GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID), // (bitconvert:{ *:[v64i1] } FR64X:{ *:[f64] }:$src) => (KMOVQkr:{ *:[v64i1] } (VMOVSDto64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(X86::VMOVSDto64Zrr), GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::KMOVQkr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 21208, GIR_EraseRootFromParent_Done, // Label 767: @26523 GIM_Reject, // Label 765: @26524 GIM_Reject, // Label 733: @26525 GIM_Reject, // Label 8: @26526 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(20), /*)*//*default:*//*Label 776*/ GIMT_Encode4(27387), /*GILLT_s32*//*Label 768*/ GIMT_Encode4(26605), /*GILLT_s64*//*Label 769*/ GIMT_Encode4(26786), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v2s64*//*Label 770*/ GIMT_Encode4(26967), GIMT_Encode4(0), /*GILLT_v4s32*//*Label 771*/ GIMT_Encode4(26998), /*GILLT_v4s64*//*Label 772*/ GIMT_Encode4(27149), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v8s32*//*Label 773*/ GIMT_Encode4(27210), /*GILLT_v8s64*//*Label 774*/ GIMT_Encode4(27298), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v16s32*//*Label 775*/ GIMT_Encode4(27359), // Label 768: @26605 GIM_Try, /*On fail goto*//*Label 777*/ GIMT_Encode4(26635), // Rule ID 1743 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID), // (lrint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VCVTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SIrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1743, GIR_Done, // Label 777: @26635 GIM_Try, /*On fail goto*//*Label 778*/ GIMT_Encode4(26665), // Rule ID 1747 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID), // (lrint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (VCVTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SIrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1747, GIR_Done, // Label 778: @26665 GIM_Try, /*On fail goto*//*Label 779*/ GIMT_Encode4(26695), // Rule ID 1767 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID), // (lrint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (CVTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSS2SIrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1767, GIR_Done, // Label 779: @26695 GIM_Try, /*On fail goto*//*Label 780*/ GIMT_Encode4(26725), // Rule ID 1771 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID), // (lrint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (CVTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSD2SIrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1771, GIR_Done, // Label 780: @26725 GIM_Try, /*On fail goto*//*Label 781*/ GIMT_Encode4(26755), // Rule ID 10238 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID), // (lrint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SIZrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 10238, GIR_Done, // Label 781: @26755 GIM_Try, /*On fail goto*//*Label 782*/ GIMT_Encode4(26785), // Rule ID 10242 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID), // (lrint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SIZrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 10242, GIR_Done, // Label 782: @26785 GIM_Reject, // Label 769: @26786 GIM_Try, /*On fail goto*//*Label 783*/ GIMT_Encode4(26816), // Rule ID 19249 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID), // (lrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SI64rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19249, GIR_Done, // Label 783: @26816 GIM_Try, /*On fail goto*//*Label 784*/ GIMT_Encode4(26846), // Rule ID 19251 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID), // (lrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SI64rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19251, GIR_Done, // Label 784: @26846 GIM_Try, /*On fail goto*//*Label 785*/ GIMT_Encode4(26876), // Rule ID 19253 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID), // (lrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (CVTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSS2SI64rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19253, GIR_Done, // Label 785: @26876 GIM_Try, /*On fail goto*//*Label 786*/ GIMT_Encode4(26906), // Rule ID 19255 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID), // (lrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (CVTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSD2SI64rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19255, GIR_Done, // Label 786: @26906 GIM_Try, /*On fail goto*//*Label 787*/ GIMT_Encode4(26936), // Rule ID 22490 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID), // (lrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SI64Zrr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SI64Zrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22490, GIR_Done, // Label 787: @26936 GIM_Try, /*On fail goto*//*Label 788*/ GIMT_Encode4(26966), // Rule ID 22492 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID), // (lrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTSD2SI64Zrr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SI64Zrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22492, GIR_Done, // Label 788: @26966 GIM_Reject, // Label 770: @26967 GIM_Try, /*On fail goto*//*Label 789*/ GIMT_Encode4(26997), // Rule ID 22715 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (lrint:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) => (VCVTPD2QQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZ128rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22715, GIR_Done, // Label 789: @26997 GIM_Reject, // Label 771: @26998 GIM_Try, /*On fail goto*//*Label 790*/ GIMT_Encode4(27028), // Rule ID 19303 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (lrint:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) => (VCVTPS2DQrr:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2DQrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19303, GIR_Done, // Label 790: @27028 GIM_Try, /*On fail goto*//*Label 791*/ GIMT_Encode4(27058), // Rule ID 19307 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (lrint:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src) => (VCVTPD2DQYrr:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2DQYrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19307, GIR_Done, // Label 791: @27058 GIM_Try, /*On fail goto*//*Label 792*/ GIMT_Encode4(27088), // Rule ID 19309 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (lrint:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) => (CVTPS2DQrr:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTPS2DQrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19309, GIR_Done, // Label 792: @27088 GIM_Try, /*On fail goto*//*Label 793*/ GIMT_Encode4(27118), // Rule ID 22687 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (lrint:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src) => (VCVTPS2DQZ128rr:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2DQZ128rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22687, GIR_Done, // Label 793: @27118 GIM_Try, /*On fail goto*//*Label 794*/ GIMT_Encode4(27148), // Rule ID 22691 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (lrint:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src) => (VCVTPD2DQZ256rr:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2DQZ256rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22691, GIR_Done, // Label 794: @27148 GIM_Reject, // Label 772: @27149 GIM_Try, /*On fail goto*//*Label 795*/ GIMT_Encode4(27179), // Rule ID 22711 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (lrint:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) => (VCVTPS2QQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2QQZ256rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22711, GIR_Done, // Label 795: @27179 GIM_Try, /*On fail goto*//*Label 796*/ GIMT_Encode4(27209), // Rule ID 22717 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (lrint:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) => (VCVTPD2QQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZ256rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22717, GIR_Done, // Label 796: @27209 GIM_Reject, // Label 773: @27210 GIM_Try, /*On fail goto*//*Label 797*/ GIMT_Encode4(27240), // Rule ID 19305 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (lrint:{ *:[v8i32] } VR256:{ *:[v8f32] }:$src) => (VCVTPS2DQYrr:{ *:[v8i32] } VR256:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2DQYrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19305, GIR_Done, // Label 797: @27240 GIM_Try, /*On fail goto*//*Label 798*/ GIMT_Encode4(27270), // Rule ID 22689 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (lrint:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2DQZ256rr:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2DQZ256rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22689, GIR_Done, // Label 798: @27270 GIM_Try, /*On fail goto*//*Label 799*/ GIMT_Encode4(27297), // Rule ID 22695 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (lrint:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src) => (VCVTPD2DQZrr:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2DQZrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22695, GIR_Done, // Label 799: @27297 GIM_Reject, // Label 774: @27298 GIM_Try, /*On fail goto*//*Label 800*/ GIMT_Encode4(27328), // Rule ID 22723 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (lrint:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2QQZrr:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2QQZrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22723, GIR_Done, // Label 800: @27328 GIM_Try, /*On fail goto*//*Label 801*/ GIMT_Encode4(27358), // Rule ID 22727 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (lrint:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) => (VCVTPD2QQZrr:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22727, GIR_Done, // Label 801: @27358 GIM_Reject, // Label 775: @27359 GIM_Try, /*On fail goto*//*Label 802*/ GIMT_Encode4(27386), // Rule ID 22693 // GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (lrint:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src) => (VCVTPS2DQZrr:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2DQZrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22693, GIR_Done, // Label 802: @27386 GIM_Reject, // Label 776: @27387 GIM_Reject, // Label 9: @27388 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(16), /*)*//*default:*//*Label 807*/ GIMT_Encode4(27781), /*GILLT_s64*//*Label 803*/ GIMT_Encode4(27447), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v2s64*//*Label 804*/ GIMT_Encode4(27628), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v4s64*//*Label 805*/ GIMT_Encode4(27659), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), /*GILLT_v8s64*//*Label 806*/ GIMT_Encode4(27720), // Label 803: @27447 GIM_Try, /*On fail goto*//*Label 808*/ GIMT_Encode4(27477), // Rule ID 1745 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID), // (llrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SI64rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1745, GIR_Done, // Label 808: @27477 GIM_Try, /*On fail goto*//*Label 809*/ GIMT_Encode4(27507), // Rule ID 1749 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseAVX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID), // (llrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SI64rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1749, GIR_Done, // Label 809: @27507 GIM_Try, /*On fail goto*//*Label 810*/ GIMT_Encode4(27537), // Rule ID 1769 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32RegClassID), // (llrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (CVTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSS2SI64rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1769, GIR_Done, // Label 810: @27537 GIM_Try, /*On fail goto*//*Label 811*/ GIMT_Encode4(27567), // Rule ID 1773 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE2), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64RegClassID), // (llrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (CVTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::CVTSD2SI64rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1773, GIR_Done, // Label 811: @27567 GIM_Try, /*On fail goto*//*Label 812*/ GIMT_Encode4(27597), // Rule ID 10240 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR32XRegClassID), // (llrint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSS2SI64Zrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 10240, GIR_Done, // Label 812: @27597 GIM_Try, /*On fail goto*//*Label 813*/ GIMT_Encode4(27627), // Rule ID 10244 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::FR64XRegClassID), // (llrint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTSD2SI64Zrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 10244, GIR_Done, // Label 813: @27627 GIM_Reject, // Label 804: @27628 GIM_Try, /*On fail goto*//*Label 814*/ GIMT_Encode4(27658), // Rule ID 22719 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (llrint:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) => (VCVTPD2QQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZ128rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22719, GIR_Done, // Label 814: @27658 GIM_Reject, // Label 805: @27659 GIM_Try, /*On fail goto*//*Label 815*/ GIMT_Encode4(27689), // Rule ID 22713 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (llrint:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) => (VCVTPS2QQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2QQZ256rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22713, GIR_Done, // Label 815: @27689 GIM_Try, /*On fail goto*//*Label 816*/ GIMT_Encode4(27719), // Rule ID 22721 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI_HasVLX), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (llrint:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) => (VCVTPD2QQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZ256rr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22721, GIR_Done, // Label 816: @27719 GIM_Reject, // Label 806: @27720 GIM_Try, /*On fail goto*//*Label 817*/ GIMT_Encode4(27750), // Rule ID 22725 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (llrint:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2QQZrr:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPS2QQZrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22725, GIR_Done, // Label 817: @27750 GIM_Try, /*On fail goto*//*Label 818*/ GIMT_Encode4(27780), // Rule ID 22729 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasDQI), GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (llrint:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) => (VCVTPD2QQZrr:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(X86::VCVTPD2QQZrr), GIR_AddImplicitUse, /*InsnID*/0, GIMT_Encode2(X86::MXCSR), GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 22729, GIR_Done, // Label 818: @27780 GIM_Reject, // Label 807: @27781 GIM_Reject, // Label 10: @27782 GIM_Try, /*On fail goto*//*Label 819*/ GIMT_Encode4(28915), GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, GIM_Try, /*On fail goto*//*Label 820*/ GIMT_Encode4(27826), // Rule ID 1517 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphsubwd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14244:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHSUBWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHSUBWDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1517, GIR_EraseRootFromParent_Done, // Label 820: @27826 GIM_Try, /*On fail goto*//*Label 821*/ GIMT_Encode4(27862), // Rule ID 1519 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphsubdq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14243:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHSUBDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHSUBDQrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1519, GIR_EraseRootFromParent_Done, // Label 821: @27862 GIM_Try, /*On fail goto*//*Label 822*/ GIMT_Encode4(27898), // Rule ID 1521 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphsubbw), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8i16] } 14242:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHSUBBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHSUBBWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1521, GIR_EraseRootFromParent_Done, // Label 822: @27898 GIM_Try, /*On fail goto*//*Label 823*/ GIMT_Encode4(27934), // Rule ID 1523 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddwq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14241:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDWQrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1523, GIR_EraseRootFromParent_Done, // Label 823: @27934 GIM_Try, /*On fail goto*//*Label 824*/ GIMT_Encode4(27970), // Rule ID 1525 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddwd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14240:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDWDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1525, GIR_EraseRootFromParent_Done, // Label 824: @27970 GIM_Try, /*On fail goto*//*Label 825*/ GIMT_Encode4(28006), // Rule ID 1527 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphadduwq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14239:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUWQrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1527, GIR_EraseRootFromParent_Done, // Label 825: @28006 GIM_Try, /*On fail goto*//*Label 826*/ GIMT_Encode4(28042), // Rule ID 1529 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphadduwd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14238:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUWDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1529, GIR_EraseRootFromParent_Done, // Label 826: @28042 GIM_Try, /*On fail goto*//*Label 827*/ GIMT_Encode4(28078), // Rule ID 1531 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddudq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14237:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDUDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUDQrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1531, GIR_EraseRootFromParent_Done, // Label 827: @28078 GIM_Try, /*On fail goto*//*Label 828*/ GIMT_Encode4(28114), // Rule ID 1533 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddubw), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8i16] } 14236:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUBWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1533, GIR_EraseRootFromParent_Done, // Label 828: @28114 GIM_Try, /*On fail goto*//*Label 829*/ GIMT_Encode4(28150), // Rule ID 1535 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddubq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14235:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUBQrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1535, GIR_EraseRootFromParent_Done, // Label 829: @28150 GIM_Try, /*On fail goto*//*Label 830*/ GIMT_Encode4(28186), // Rule ID 1537 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddubd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14234:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDUBDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1537, GIR_EraseRootFromParent_Done, // Label 830: @28186 GIM_Try, /*On fail goto*//*Label 831*/ GIMT_Encode4(28222), // Rule ID 1539 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphadddq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14233:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDDQrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1539, GIR_EraseRootFromParent_Done, // Label 831: @28222 GIM_Try, /*On fail goto*//*Label 832*/ GIMT_Encode4(28258), // Rule ID 1541 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddbw), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8i16] } 14232:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDBWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1541, GIR_EraseRootFromParent_Done, // Label 832: @28258 GIM_Try, /*On fail goto*//*Label 833*/ GIMT_Encode4(28294), // Rule ID 1543 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddbq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14231:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDBQrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1543, GIR_EraseRootFromParent_Done, // Label 833: @28294 GIM_Try, /*On fail goto*//*Label 834*/ GIMT_Encode4(28330), // Rule ID 1545 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vphaddbd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14230:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDBDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1545, GIR_EraseRootFromParent_Done, // Label 834: @28330 GIM_Try, /*On fail goto*//*Label 835*/ GIMT_Encode4(28366), // Rule ID 1547 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_ss), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4f32] } 14225:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZSSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZSSrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1547, GIR_EraseRootFromParent_Done, // Label 835: @28366 GIM_Try, /*On fail goto*//*Label 836*/ GIMT_Encode4(28402), // Rule ID 1551 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_ps), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4f32] } 14222:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZPSrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1551, GIR_EraseRootFromParent_Done, // Label 836: @28402 GIM_Try, /*On fail goto*//*Label 837*/ GIMT_Encode4(28438), // Rule ID 1553 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_ps_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v8f32] } 14223:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src) => (VFRCZPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZPSYrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1553, GIR_EraseRootFromParent_Done, // Label 837: @28438 GIM_Try, /*On fail goto*//*Label 838*/ GIMT_Encode4(28474), // Rule ID 1555 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_sd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2f64] } 14224:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZSDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZSDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1555, GIR_EraseRootFromParent_Done, // Label 838: @28474 GIM_Try, /*On fail goto*//*Label 839*/ GIMT_Encode4(28510), // Rule ID 1559 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_pd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2f64] } 14220:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZPDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1559, GIR_EraseRootFromParent_Done, // Label 839: @28510 GIM_Try, /*On fail goto*//*Label 840*/ GIMT_Encode4(28546), // Rule ID 1561 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vfrcz_pd_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v4f64] } 14221:{ *:[iPTR] }, VR256:{ *:[v4f64] }:$src) => (VFRCZPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VFRCZPDYrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1561, GIR_EraseRootFromParent_Done, // Label 840: @28546 GIM_Try, /*On fail goto*//*Label 841*/ GIMT_Encode4(28582), // Rule ID 3311 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesimc), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12583:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (VAESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESIMCrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3311, GIR_EraseRootFromParent_Done, // Label 841: @28582 GIM_Try, /*On fail goto*//*Label 842*/ GIMT_Encode4(28618), // Rule ID 3313 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesimc), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12583:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (AESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESIMCrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3313, GIR_EraseRootFromParent_Done, // Label 842: @28618 GIM_Try, /*On fail goto*//*Label 843*/ GIMT_Encode4(28654), // Rule ID 3503 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXNECONVERT), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vcvtneps2bf16128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8bf16] } 14182:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VCVTNEPS2BF16rr:{ *:[v8bf16] } VR128:{ *:[v4f32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTNEPS2BF16rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3503, GIR_EraseRootFromParent_Done, // Label 843: @28654 GIM_Try, /*On fail goto*//*Label 844*/ GIMT_Encode4(28690), // Rule ID 3505 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVXNECONVERT), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vcvtneps2bf16256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v8bf16] } 14183:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src) => (VCVTNEPS2BF16Yrr:{ *:[v8bf16] } VR256:{ *:[v8f32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTNEPS2BF16Yrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3505, GIR_EraseRootFromParent_Done, // Label 844: @28690 GIM_Try, /*On fail goto*//*Label 845*/ GIMT_Encode4(28728), // Rule ID 19526 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse_rsqrt_ss), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4f32] } 13990:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RSQRTSSr_Int), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19526, GIR_EraseRootFromParent_Done, // Label 845: @28728 GIM_Try, /*On fail goto*//*Label 846*/ GIMT_Encode4(28766), // Rule ID 19530 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse_rsqrt_ss), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4f32] } 13990:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VRSQRTSSr_Int), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19530, GIR_EraseRootFromParent_Done, // Label 846: @28766 GIM_Try, /*On fail goto*//*Label 847*/ GIMT_Encode4(28804), // Rule ID 19546 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE1), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse_rcp_ss), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4f32] } 13988:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::RCPSSr_Int), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19546, GIR_EraseRootFromParent_Done, // Label 847: @28804 GIM_Try, /*On fail goto*//*Label 848*/ GIMT_Encode4(28842), // Rule ID 19550 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse_rcp_ss), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4f32] } 13988:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VRCPSSr_Int), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 19550, GIR_EraseRootFromParent_Done, // Label 848: @28842 GIM_Try, /*On fail goto*//*Label 849*/ GIMT_Encode4(28878), // Rule ID 23462 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBF16_HasVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vcvtneps2bf16128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (intrinsic_wo_chain:{ *:[v8bf16] } 14182:{ *:[iPTR] }, VR128X:{ *:[v4f32] }:$src) => (VCVTNEPS2BF16Z128rr:{ *:[v8bf16] } VR128X:{ *:[v4f32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTNEPS2BF16Z128rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23462, GIR_EraseRootFromParent_Done, // Label 849: @28878 GIM_Try, /*On fail goto*//*Label 850*/ GIMT_Encode4(28914), // Rule ID 23464 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasBF16_HasVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vcvtneps2bf16256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (intrinsic_wo_chain:{ *:[v8bf16] } 14183:{ *:[iPTR] }, VR256X:{ *:[v8f32] }:$src) => (VCVTNEPS2BF16Z256rr:{ *:[v8bf16] } VR256X:{ *:[v8f32] }:$src) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VCVTNEPS2BF16Z256rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 23464, GIR_EraseRootFromParent_Done, // Label 850: @28914 GIM_Reject, // Label 819: @28915 GIM_Try, /*On fail goto*//*Label 851*/ GIMT_Encode4(31976), GIM_CheckNumOperands, /*MI*/0, /*Expected*/4, GIM_Try, /*On fail goto*//*Label 852*/ GIMT_Encode4(28964), // Rule ID 3315 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aeskeygenassist), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_wo_chain:{ *:[v2i64] } 12584:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) => (VAESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESKEYGENASSIST128rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3315, GIR_EraseRootFromParent_Done, // Label 852: @28964 GIM_Try, /*On fail goto*//*Label 853*/ GIMT_Encode4(29005), // Rule ID 3317 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aeskeygenassist), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_wo_chain:{ *:[v2i64] } 12584:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) => (AESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESKEYGENASSIST128rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3317, GIR_EraseRootFromParent_Done, // Label 853: @29005 GIM_Try, /*On fail goto*//*Label 854*/ GIMT_Encode4(29050), // Rule ID 2970 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_b_128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v16i8] } 14128:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNBrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2970, GIR_EraseRootFromParent_Done, // Label 854: @29050 GIM_Try, /*On fail goto*//*Label 855*/ GIMT_Encode4(29095), // Rule ID 2972 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_w_128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8i16] } 14132:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2972, GIR_EraseRootFromParent_Done, // Label 855: @29095 GIM_Try, /*On fail goto*//*Label 856*/ GIMT_Encode4(29140), // Rule ID 2974 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_d_128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14130:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2974, GIR_EraseRootFromParent_Done, // Label 856: @29140 GIM_Try, /*On fail goto*//*Label 857*/ GIMT_Encode4(29185), // Rule ID 2976 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_phadd_sw_128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8i16] } 14112:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDSWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2976, GIR_EraseRootFromParent_Done, // Label 857: @29185 GIM_Try, /*On fail goto*//*Label 858*/ GIMT_Encode4(29230), // Rule ID 2978 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_phsub_sw_128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8i16] } 14118:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHSUBSWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2978, GIR_EraseRootFromParent_Done, // Label 858: @29230 GIM_Try, /*On fail goto*//*Label 859*/ GIMT_Encode4(29275), // Rule ID 2994 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_psign_b), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v32s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s8, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v32i8] } 13024:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSIGNBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNBYrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2994, GIR_EraseRootFromParent_Done, // Label 859: @29275 GIM_Try, /*On fail goto*//*Label 860*/ GIMT_Encode4(29320), // Rule ID 2996 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_psign_w), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v16i16] } 13026:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSIGNWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNWYrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2996, GIR_EraseRootFromParent_Done, // Label 860: @29320 GIM_Try, /*On fail goto*//*Label 861*/ GIMT_Encode4(29365), // Rule ID 2998 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_psign_d), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v8i32] } 13025:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSIGNDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPSIGNDYrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 2998, GIR_EraseRootFromParent_Done, // Label 861: @29365 GIM_Try, /*On fail goto*//*Label 862*/ GIMT_Encode4(29410), // Rule ID 3000 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_phadd_sw), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v16i16] } 13011:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHADDSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHADDSWYrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3000, GIR_EraseRootFromParent_Done, // Label 862: @29410 GIM_Try, /*On fail goto*//*Label 863*/ GIMT_Encode4(29455), // Rule ID 3002 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx2_phsub_sw), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v16i16] } 13014:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHSUBSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPHSUBSWYrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3002, GIR_EraseRootFromParent_Done, // Label 863: @29455 GIM_Try, /*On fail goto*//*Label 864*/ GIMT_Encode4(29500), // Rule ID 3012 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_b_128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v16i8] } 14128:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PSIGNBrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3012, GIR_EraseRootFromParent_Done, // Label 864: @29500 GIM_Try, /*On fail goto*//*Label 865*/ GIMT_Encode4(29545), // Rule ID 3014 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_w_128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8i16] } 14132:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PSIGNWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3014, GIR_EraseRootFromParent_Done, // Label 865: @29545 GIM_Try, /*On fail goto*//*Label 866*/ GIMT_Encode4(29590), // Rule ID 3016 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_psign_d_128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14130:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PSIGNDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3016, GIR_EraseRootFromParent_Done, // Label 866: @29590 GIM_Try, /*On fail goto*//*Label 867*/ GIMT_Encode4(29635), // Rule ID 3020 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_phadd_sw_128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8i16] } 14112:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PHADDSWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3020, GIR_EraseRootFromParent_Done, // Label 867: @29635 GIM_Try, /*On fail goto*//*Label 868*/ GIMT_Encode4(29680), // Rule ID 3022 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSSE3), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_ssse3_phsub_sw_128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8i16] } 14118:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PHSUBSWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3022, GIR_EraseRootFromParent_Done, // Label 868: @29680 GIM_Try, /*On fail goto*//*Label 869*/ GIMT_Encode4(29725), // Rule ID 3257 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_NoEGPR), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_8), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (intrinsic_wo_chain:{ *:[i32] } 14086:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (CRC32r32r8:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r8), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3257, GIR_EraseRootFromParent_Done, // Label 869: @29725 GIM_Try, /*On fail goto*//*Label 870*/ GIMT_Encode4(29770), // Rule ID 3259 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_NoEGPR), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_16), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (intrinsic_wo_chain:{ *:[i32] } 14084:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) => (CRC32r32r16:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r16), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3259, GIR_EraseRootFromParent_Done, // Label 870: @29770 GIM_Try, /*On fail goto*//*Label 871*/ GIMT_Encode4(29815), // Rule ID 3261 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_NoEGPR), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_32), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (intrinsic_wo_chain:{ *:[i32] } 14085:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (CRC32r32r32:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r32), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3261, GIR_EraseRootFromParent_Done, // Label 871: @29815 GIM_Try, /*On fail goto*//*Label 872*/ GIMT_Encode4(29860), // Rule ID 3263 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_NoEGPR), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_64_64), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (intrinsic_wo_chain:{ *:[i64] } 14087:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (CRC32r64r64:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r64r64), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3263, GIR_EraseRootFromParent_Done, // Label 872: @29860 GIM_Try, /*On fail goto*//*Label 873*/ GIMT_Encode4(29905), // Rule ID 3265 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_HasEGPR_In64BitMode), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_8), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR8RegClassID), // (intrinsic_wo_chain:{ *:[i32] } 14086:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (CRC32r32r8_EVEX:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r8_EVEX), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3265, GIR_EraseRootFromParent_Done, // Label 873: @29905 GIM_Try, /*On fail goto*//*Label 874*/ GIMT_Encode4(29950), // Rule ID 3267 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_HasEGPR_In64BitMode), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_16), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR16RegClassID), // (intrinsic_wo_chain:{ *:[i32] } 14084:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) => (CRC32r32r16_EVEX:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r16_EVEX), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3267, GIR_EraseRootFromParent_Done, // Label 874: @29950 GIM_Try, /*On fail goto*//*Label 875*/ GIMT_Encode4(29995), // Rule ID 3269 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_HasEGPR_In64BitMode), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_32_32), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR32RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR32RegClassID), // (intrinsic_wo_chain:{ *:[i32] } 14085:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (CRC32r32r32_EVEX:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r32r32_EVEX), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3269, GIR_EraseRootFromParent_Done, // Label 875: @29995 GIM_Try, /*On fail goto*//*Label 876*/ GIMT_Encode4(30040), // Rule ID 3271 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasCRC32_HasEGPR_In64BitMode), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse42_crc32_64_64), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::GR64RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::GR64RegClassID), // (intrinsic_wo_chain:{ *:[i64] } 14087:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (CRC32r64r64_EVEX:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CRC32r64r64_EVEX), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3271, GIR_EraseRootFromParent_Done, // Label 876: @30040 GIM_Try, /*On fail goto*//*Label 877*/ GIMT_Encode4(30085), // Rule ID 3275 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha1nexte), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 13956:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1NEXTErr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA1NEXTErr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3275, GIR_EraseRootFromParent_Done, // Label 877: @30085 GIM_Try, /*On fail goto*//*Label 878*/ GIMT_Encode4(30130), // Rule ID 3277 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha1msg1), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 13954:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA1MSG1rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3277, GIR_EraseRootFromParent_Done, // Label 878: @30130 GIM_Try, /*On fail goto*//*Label 879*/ GIMT_Encode4(30175), // Rule ID 3279 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha1msg2), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 13955:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA1MSG2rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3279, GIR_EraseRootFromParent_Done, // Label 879: @30175 GIM_Try, /*On fail goto*//*Label 880*/ GIMT_Encode4(30220), // Rule ID 3283 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha256msg1), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 13958:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA256MSG1rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3283, GIR_EraseRootFromParent_Done, // Label 880: @30220 GIM_Try, /*On fail goto*//*Label 881*/ GIMT_Encode4(30265), // Rule ID 3285 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha256msg2), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 13959:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA256MSG2rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3285, GIR_EraseRootFromParent_Done, // Label 881: @30265 GIM_Try, /*On fail goto*//*Label 882*/ GIMT_Encode4(30310), // Rule ID 3287 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12577:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3287, GIR_EraseRootFromParent_Done, // Label 882: @30310 GIM_Try, /*On fail goto*//*Label 883*/ GIMT_Encode4(30355), // Rule ID 3289 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12580:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCLASTrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3289, GIR_EraseRootFromParent_Done, // Label 883: @30355 GIM_Try, /*On fail goto*//*Label 884*/ GIMT_Encode4(30400), // Rule ID 3291 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12571:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3291, GIR_EraseRootFromParent_Done, // Label 884: @30400 GIM_Try, /*On fail goto*//*Label 885*/ GIMT_Encode4(30445), // Rule ID 3293 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12574:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECLASTrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3293, GIR_EraseRootFromParent_Done, // Label 885: @30445 GIM_Try, /*On fail goto*//*Label 886*/ GIMT_Encode4(30490), // Rule ID 3295 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_NoVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v4i64] } 12578:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCYrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3295, GIR_EraseRootFromParent_Done, // Label 886: @30490 GIM_Try, /*On fail goto*//*Label 887*/ GIMT_Encode4(30535), // Rule ID 3297 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_NoVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v4i64] } 12581:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCLASTYrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3297, GIR_EraseRootFromParent_Done, // Label 887: @30535 GIM_Try, /*On fail goto*//*Label 888*/ GIMT_Encode4(30580), // Rule ID 3299 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_NoVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v4i64] } 12572:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECYrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3299, GIR_EraseRootFromParent_Done, // Label 888: @30580 GIM_Try, /*On fail goto*//*Label 889*/ GIMT_Encode4(30625), // Rule ID 3301 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_NoVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v4i64] } 12575:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECLASTYrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3301, GIR_EraseRootFromParent_Done, // Label 889: @30625 GIM_Try, /*On fail goto*//*Label 890*/ GIMT_Encode4(30670), // Rule ID 3303 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12577:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESENCrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3303, GIR_EraseRootFromParent_Done, // Label 890: @30670 GIM_Try, /*On fail goto*//*Label 891*/ GIMT_Encode4(30715), // Rule ID 3305 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12580:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESENCLASTrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3305, GIR_EraseRootFromParent_Done, // Label 891: @30715 GIM_Try, /*On fail goto*//*Label 892*/ GIMT_Encode4(30760), // Rule ID 3307 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12571:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESDECrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3307, GIR_EraseRootFromParent_Done, // Label 892: @30760 GIM_Try, /*On fail goto*//*Label 893*/ GIMT_Encode4(30805), // Rule ID 3309 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAES_NoAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12574:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::AESDECLASTrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3309, GIR_EraseRootFromParent_Done, // Label 893: @30805 GIM_Try, /*On fail goto*//*Label 894*/ GIMT_Encode4(30850), // Rule ID 3326 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSSE4A), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse4a_extrq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14102:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask) => (EXTRQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::EXTRQ), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootToRootCopy, /*OpIdx*/3, // mask GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3326, GIR_EraseRootFromParent_Done, // Label 894: @30850 GIM_Try, /*On fail goto*//*Label 895*/ GIMT_Encode4(30895), // Rule ID 3328 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSSE4A), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse4a_insertq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14104:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask) => (INSERTQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::INSERTQ), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src GIR_RootToRootCopy, /*OpIdx*/3, // mask GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3328, GIR_EraseRootFromParent_Done, // Label 895: @30895 GIM_Try, /*On fail goto*//*Label 896*/ GIMT_Encode4(30940), // Rule ID 3507 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA512), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsha512msg1), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i64] } 14195:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VSHA512MSG1rr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSHA512MSG1rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3507, GIR_EraseRootFromParent_Done, // Label 896: @30940 GIM_Try, /*On fail goto*//*Label 897*/ GIMT_Encode4(30985), // Rule ID 3508 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA512), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsha512msg2), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v4i64] } 14196:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VSHA512MSG2rr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSHA512MSG2rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3508, GIR_EraseRootFromParent_Done, // Label 897: @30985 GIM_Try, /*On fail goto*//*Label 898*/ GIMT_Encode4(31030), // Rule ID 3516 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM4), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm4key4128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14201:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VSM4KEY4rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM4KEY4rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3516, GIR_EraseRootFromParent_Done, // Label 898: @31030 GIM_Try, /*On fail goto*//*Label 899*/ GIMT_Encode4(31075), // Rule ID 3518 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM4), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm4key4256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v8i32] } 14202:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VSM4KEY4Yrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM4KEY4Yrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3518, GIR_EraseRootFromParent_Done, // Label 899: @31075 GIM_Try, /*On fail goto*//*Label 900*/ GIMT_Encode4(31120), // Rule ID 3520 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM4), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm4rnds4128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14203:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VSM4RNDS4rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM4RNDS4rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3520, GIR_EraseRootFromParent_Done, // Label 900: @31120 GIM_Try, /*On fail goto*//*Label 901*/ GIMT_Encode4(31165), // Rule ID 3522 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM4), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm4rnds4256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // (intrinsic_wo_chain:{ *:[v8i32] } 14204:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VSM4RNDS4Yrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM4RNDS4Yrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3522, GIR_EraseRootFromParent_Done, // Label 901: @31165 GIM_Try, /*On fail goto*//*Label 902*/ GIMT_Encode4(31210), // Rule ID 13946 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12577:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCZ128rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13946, GIR_EraseRootFromParent_Done, // Label 902: @31210 GIM_Try, /*On fail goto*//*Label 903*/ GIMT_Encode4(31255), // Rule ID 13948 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (intrinsic_wo_chain:{ *:[v4i64] } 12578:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCZ256rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13948, GIR_EraseRootFromParent_Done, // Label 903: @31255 GIM_Try, /*On fail goto*//*Label 904*/ GIMT_Encode4(31300), // Rule ID 13950 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVAES), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenc_512), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (intrinsic_wo_chain:{ *:[v8i64] } 12579:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCZrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13950, GIR_EraseRootFromParent_Done, // Label 904: @31300 GIM_Try, /*On fail goto*//*Label 905*/ GIMT_Encode4(31345), // Rule ID 13952 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12580:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCLASTZ128rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13952, GIR_EraseRootFromParent_Done, // Label 905: @31345 GIM_Try, /*On fail goto*//*Label 906*/ GIMT_Encode4(31390), // Rule ID 13954 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (intrinsic_wo_chain:{ *:[v4i64] } 12581:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCLASTZ256rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13954, GIR_EraseRootFromParent_Done, // Label 906: @31390 GIM_Try, /*On fail goto*//*Label 907*/ GIMT_Encode4(31435), // Rule ID 13956 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVAES), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesenclast_512), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (intrinsic_wo_chain:{ *:[v8i64] } 12582:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESENCLASTZrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13956, GIR_EraseRootFromParent_Done, // Label 907: @31435 GIM_Try, /*On fail goto*//*Label 908*/ GIMT_Encode4(31480), // Rule ID 13958 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12571:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECZ128rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13958, GIR_EraseRootFromParent_Done, // Label 908: @31480 GIM_Try, /*On fail goto*//*Label 909*/ GIMT_Encode4(31525), // Rule ID 13960 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (intrinsic_wo_chain:{ *:[v4i64] } 12572:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECZ256rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13960, GIR_EraseRootFromParent_Done, // Label 909: @31525 GIM_Try, /*On fail goto*//*Label 910*/ GIMT_Encode4(31570), // Rule ID 13962 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVAES), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdec_512), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (intrinsic_wo_chain:{ *:[v8i64] } 12573:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECZrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13962, GIR_EraseRootFromParent_Done, // Label 910: @31570 GIM_Try, /*On fail goto*//*Label 911*/ GIMT_Encode4(31615), // Rule ID 13964 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 12574:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECLASTZ128rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13964, GIR_EraseRootFromParent_Done, // Label 911: @31615 GIM_Try, /*On fail goto*//*Label 912*/ GIMT_Encode4(31660), // Rule ID 13966 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVAES_HasVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (intrinsic_wo_chain:{ *:[v4i64] } 12575:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECLASTZ256rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13966, GIR_EraseRootFromParent_Done, // Label 912: @31660 GIM_Try, /*On fail goto*//*Label 913*/ GIMT_Encode4(31705), // Rule ID 13968 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVAES), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_aesni_aesdeclast_512), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (intrinsic_wo_chain:{ *:[v8i64] } 12576:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VAESDECLASTZrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13968, GIR_EraseRootFromParent_Done, // Label 913: @31705 GIM_Try, /*On fail goto*//*Label 914*/ GIMT_Encode4(31750), // Rule ID 17369 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX10_2_512), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx10_vminpbf16512), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v32s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (intrinsic_wo_chain:{ *:[v32bf16] } 12944:{ *:[iPTR] }, VR512:{ *:[v32bf16] }:$src1, VR512:{ *:[v32bf16] }:$src2) => (VMINPBF16Zrr:{ *:[v32bf16] } VR512:{ *:[v32bf16] }:$src1, VR512:{ *:[v32bf16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMINPBF16Zrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 17369, GIR_EraseRootFromParent_Done, // Label 914: @31750 GIM_Try, /*On fail goto*//*Label 915*/ GIMT_Encode4(31795), // Rule ID 17378 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX10_2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx10_vminpbf16128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (intrinsic_wo_chain:{ *:[v8bf16] } 12942:{ *:[iPTR] }, VR128X:{ *:[v8bf16] }:$src1, VR128X:{ *:[v8bf16] }:$src2) => (VMINPBF16Z128rr:{ *:[v8bf16] } VR128X:{ *:[v8bf16] }:$src1, VR128X:{ *:[v8bf16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMINPBF16Z128rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 17378, GIR_EraseRootFromParent_Done, // Label 915: @31795 GIM_Try, /*On fail goto*//*Label 916*/ GIMT_Encode4(31840), // Rule ID 17387 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX10_2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx10_vminpbf16256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (intrinsic_wo_chain:{ *:[v16bf16] } 12943:{ *:[iPTR] }, VR256X:{ *:[v16bf16] }:$src1, VR256X:{ *:[v16bf16] }:$src2) => (VMINPBF16Z256rr:{ *:[v16bf16] } VR256X:{ *:[v16bf16] }:$src1, VR256X:{ *:[v16bf16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMINPBF16Z256rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 17387, GIR_EraseRootFromParent_Done, // Label 916: @31840 GIM_Try, /*On fail goto*//*Label 917*/ GIMT_Encode4(31885), // Rule ID 17396 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX10_2_512), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx10_vmaxpbf16512), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v32s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v32s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v32s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // (intrinsic_wo_chain:{ *:[v32bf16] } 12929:{ *:[iPTR] }, VR512:{ *:[v32bf16] }:$src1, VR512:{ *:[v32bf16] }:$src2) => (VMAXPBF16Zrr:{ *:[v32bf16] } VR512:{ *:[v32bf16] }:$src1, VR512:{ *:[v32bf16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMAXPBF16Zrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 17396, GIR_EraseRootFromParent_Done, // Label 917: @31885 GIM_Try, /*On fail goto*//*Label 918*/ GIMT_Encode4(31930), // Rule ID 17405 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX10_2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx10_vmaxpbf16128), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // (intrinsic_wo_chain:{ *:[v8bf16] } 12927:{ *:[iPTR] }, VR128X:{ *:[v8bf16] }:$src1, VR128X:{ *:[v8bf16] }:$src2) => (VMAXPBF16Z128rr:{ *:[v8bf16] } VR128X:{ *:[v8bf16] }:$src1, VR128X:{ *:[v8bf16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMAXPBF16Z128rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 17405, GIR_EraseRootFromParent_Done, // Label 918: @31930 GIM_Try, /*On fail goto*//*Label 919*/ GIMT_Encode4(31975), // Rule ID 17414 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX10_2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx10_vmaxpbf16256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // (intrinsic_wo_chain:{ *:[v16bf16] } 12928:{ *:[iPTR] }, VR256X:{ *:[v16bf16] }:$src1, VR256X:{ *:[v16bf16] }:$src2) => (VMAXPBF16Z256rr:{ *:[v16bf16] } VR256X:{ *:[v16bf16] }:$src1, VR256X:{ *:[v16bf16] }:$src2) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VMAXPBF16Z256rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 17414, GIR_EraseRootFromParent_Done, // Label 919: @31975 GIM_Reject, // Label 851: @31976 GIM_Try, /*On fail goto*//*Label 920*/ GIMT_Encode4(33461), GIM_CheckNumOperands, /*MI*/0, /*Expected*/5, GIM_Try, /*On fail goto*//*Label 921*/ GIMT_Encode4(32034), // Rule ID 3201 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoAVX10_2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse41_dpps), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4f32] } 14071:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VDPPSrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3201, GIR_EraseRootFromParent_Done, // Label 921: @32034 GIM_Try, /*On fail goto*//*Label 922*/ GIMT_Encode4(32084), // Rule ID 3203 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoAVX10_2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse41_dppd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2f64] } 14070:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VDPPDrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3203, GIR_EraseRootFromParent_Done, // Label 922: @32084 GIM_Try, /*On fail goto*//*Label 923*/ GIMT_Encode4(32134), // Rule ID 3205 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_NoAVX10_2), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_avx_dp_ps_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v8f32] } 12609:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPSYrri:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VDPPSYrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3205, GIR_EraseRootFromParent_Done, // Label 923: @32134 GIM_Try, /*On fail goto*//*Label 924*/ GIMT_Encode4(32184), // Rule ID 3211 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse41_dpps), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4f32] } 14071:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) => (DPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DPPSrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3211, GIR_EraseRootFromParent_Done, // Label 924: @32184 GIM_Try, /*On fail goto*//*Label 925*/ GIMT_Encode4(32234), // Rule ID 3213 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_UseSSE41), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sse41_dppd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2f64] } 14070:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) => (DPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::DPPDrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3213, GIR_EraseRootFromParent_Done, // Label 925: @32234 GIM_Try, /*On fail goto*//*Label 926*/ GIMT_Encode4(32284), // Rule ID 3273 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha1rnds4), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4i32] } 13957:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (timm:{ *:[i8] }):$src3) => (SHA1RNDS4rri:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA1RNDS4rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3273, GIR_EraseRootFromParent_Done, // Label 926: @32284 GIM_Try, /*On fail goto*//*Label 927*/ GIMT_Encode4(32334), // Rule ID 3319 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasPCLMUL_NoAVX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2i64] } 13923:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (PCLMULQDQrri:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::PCLMULQDQrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3319, GIR_EraseRootFromParent_Done, // Label 927: @32334 GIM_Try, /*On fail goto*//*Label 928*/ GIMT_Encode4(32384), // Rule ID 3321 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2i64] } 13923:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQrri:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPCLMULQDQrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3321, GIR_EraseRootFromParent_Done, // Label 928: @32384 GIM_Try, /*On fail goto*//*Label 929*/ GIMT_Encode4(32434), // Rule ID 3323 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVPCLMULQDQ_NoVLX), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4i64] } 13924:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQYrri:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPCLMULQDQYrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3323, GIR_EraseRootFromParent_Done, // Label 929: @32434 GIM_Try, /*On fail goto*//*Label 930*/ GIMT_Encode4(32484), // Rule ID 13970 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAVX512_HasVPCLMULQDQ), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq_512), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR512RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR512RegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v8i64] } 13925:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZrri:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPCLMULQDQZrri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13970, GIR_EraseRootFromParent_Done, // Label 930: @32484 GIM_Try, /*On fail goto*//*Label 931*/ GIMT_Encode4(32534), // Rule ID 13972 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX_HasVPCLMULQDQ), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128XRegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2i64] } 13923:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZ128rri:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPCLMULQDQZ128rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13972, GIR_EraseRootFromParent_Done, // Label 931: @32534 GIM_Try, /*On fail goto*//*Label 932*/ GIMT_Encode4(32584), // Rule ID 13974 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasVLX_HasVPCLMULQDQ), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_pclmulqdq_256), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256XRegClassID), // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4i64] } 13924:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZ256rri:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPCLMULQDQZ256rri), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 13974, GIR_EraseRootFromParent_Done, // Label 932: @32584 GIM_Try, /*On fail goto*//*Label 933*/ GIMT_Encode4(32638), // Rule ID 1607 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmadcswd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14256:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMADCSWDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1607, GIR_EraseRootFromParent_Done, // Label 933: @32638 GIM_Try, /*On fail goto*//*Label 934*/ GIMT_Encode4(32692), // Rule ID 1609 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmadcsswd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14255:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMADCSSWDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1609, GIR_EraseRootFromParent_Done, // Label 934: @32692 GIM_Try, /*On fail goto*//*Label 935*/ GIMT_Encode4(32746), // Rule ID 1611 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacsww), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8i16] } 14254:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSWWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1611, GIR_EraseRootFromParent_Done, // Label 935: @32746 GIM_Try, /*On fail goto*//*Label 936*/ GIMT_Encode4(32800), // Rule ID 1613 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacswd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14253:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSWDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1613, GIR_EraseRootFromParent_Done, // Label 936: @32800 GIM_Try, /*On fail goto*//*Label 937*/ GIMT_Encode4(32854), // Rule ID 1615 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacssww), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v8i16] } 14252:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSSWWrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1615, GIR_EraseRootFromParent_Done, // Label 937: @32854 GIM_Try, /*On fail goto*//*Label 938*/ GIMT_Encode4(32908), // Rule ID 1617 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacsswd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14251:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSSWDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1617, GIR_EraseRootFromParent_Done, // Label 938: @32908 GIM_Try, /*On fail goto*//*Label 939*/ GIMT_Encode4(32962), // Rule ID 1619 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacssdql), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14250:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSSDQLrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1619, GIR_EraseRootFromParent_Done, // Label 939: @32962 GIM_Try, /*On fail goto*//*Label 940*/ GIMT_Encode4(33016), // Rule ID 1621 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacssdqh), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14249:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSSDQHrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1621, GIR_EraseRootFromParent_Done, // Label 940: @33016 GIM_Try, /*On fail goto*//*Label 941*/ GIMT_Encode4(33070), // Rule ID 1623 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacssdd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14248:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSSDDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1623, GIR_EraseRootFromParent_Done, // Label 941: @33070 GIM_Try, /*On fail goto*//*Label 942*/ GIMT_Encode4(33124), // Rule ID 1625 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacsdql), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14247:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSDQLrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1625, GIR_EraseRootFromParent_Done, // Label 942: @33124 GIM_Try, /*On fail goto*//*Label 943*/ GIMT_Encode4(33178), // Rule ID 1627 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacsdqh), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v2i64] } 14246:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSDQHrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1627, GIR_EraseRootFromParent_Done, // Label 943: @33178 GIM_Try, /*On fail goto*//*Label 944*/ GIMT_Encode4(33232), // Rule ID 1629 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasXOP), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_xop_vpmacsdd), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14245:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VPMACSDDrr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 1629, GIR_EraseRootFromParent_Done, // Label 944: @33232 GIM_Try, /*On fail goto*//*Label 945*/ GIMT_Encode4(33298), // Rule ID 3281 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_sha256rnds2), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 13960:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, XMM0:{ *:[v4i32] }) => (SHA256RNDS2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY), GIR_AddRegister, /*InsnID*/1, GIMT_Encode2(X86::XMM0), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define), GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/4, // XMM0 GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SHA256RNDS2rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3281, GIR_EraseRootFromParent_Done, // Label 945: @33298 GIM_Try, /*On fail goto*//*Label 946*/ GIMT_Encode4(33352), // Rule ID 3509 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSHA512), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsha512rnds2), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s64, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR256RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i64] } 14197:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VSHA512RNDS2rr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSHA512RNDS2rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3509, GIR_EraseRootFromParent_Done, // Label 946: @33352 GIM_Try, /*On fail goto*//*Label 947*/ GIMT_Encode4(33406), // Rule ID 3510 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM3), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm3msg1), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14198:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VSM3MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM3MSG1rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3510, GIR_EraseRootFromParent_Done, // Label 947: @33406 GIM_Try, /*On fail goto*//*Label 948*/ GIMT_Encode4(33460), // Rule ID 3512 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM3), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm3msg2), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // (intrinsic_wo_chain:{ *:[v4i32] } 14199:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VSM3MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM3MSG2rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3512, GIR_EraseRootFromParent_Done, // Label 948: @33460 GIM_Reject, // Label 920: @33461 GIM_Try, /*On fail goto*//*Label 949*/ GIMT_Encode4(33523), // Rule ID 3514 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSM3), GIM_CheckNumOperands, /*MI*/0, /*Expected*/6, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::x86_vsm3rnds2), GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32, GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32, GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(X86::VR128RegClassID), GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(X86::VR128RegClassID), // MIs[0] src4 GIM_CheckIsImm, /*MI*/0, /*Op*/5, // (intrinsic_wo_chain:{ *:[v4i32] } 14200:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3, (timm:{ *:[i32] }):$src4) => (VSM3RNDS2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3, (timm:{ *:[i32] }):$src4) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::VSM3RNDS2rr), GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] GIR_RootToRootCopy, /*OpIdx*/2, // src1 GIR_RootToRootCopy, /*OpIdx*/3, // src2 GIR_RootToRootCopy, /*OpIdx*/4, // src3 GIR_RootToRootCopy, /*OpIdx*/5, // src4 GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 3514, GIR_EraseRootFromParent_Done, // Label 949: @33523 GIM_Reject, // Label 11: @33524 GIM_Try, /*On fail goto*//*Label 950*/ GIMT_Encode4(34077), GIM_CheckNumOperands, /*MI*/0, /*Expected*/1, GIM_Try, /*On fail goto*//*Label 951*/ GIMT_Encode4(33554), // Rule ID 149 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSERIALIZE), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_serialize), // (intrinsic_void 13952:{ *:[iPTR] }) => (SERIALIZE) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::SERIALIZE), GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 149, GIR_EraseRootFromParent_Done, // Label 951: @33554 GIM_Try, /*On fail goto*//*Label 952*/ GIMT_Encode4(33576), // Rule ID 150 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTSXLDTRK), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_xsusldtrk), // (intrinsic_void 14280:{ *:[iPTR] }) => (XSUSLDTRK) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XSUSLDTRK), GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 150, GIR_EraseRootFromParent_Done, // Label 952: @33576 GIM_Try, /*On fail goto*//*Label 953*/ GIMT_Encode4(33598), // Rule ID 151 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasTSXLDTRK), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_xresldtrk), // (intrinsic_void 14266:{ *:[iPTR] }) => (XRESLDTRK) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::XRESLDTRK), GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 151, GIR_EraseRootFromParent_Done, // Label 953: @33598 GIM_Try, /*On fail goto*//*Label 954*/ GIMT_Encode4(33620), // Rule ID 152 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasUINTR_In64BitMode), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_clui), // (intrinsic_void 13815:{ *:[iPTR] }) => (CLUI) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::CLUI), GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 152, GIR_EraseRootFromParent_Done, // Label 954: @33620 GIM_Try, /*On fail goto*//*Label 955*/ GIMT_Encode4(33642), // Rule ID 153 // GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasUINTR_In64BitMode), GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::x86_stui), // (intrinsic_void 14134:{ *:[iPTR] }) => (STUI) GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(X86::STUI), GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0, GIR_RootConstrainSelectedInstOperands, // GIR_Coverage, 153,<TRUNCATED>#undef GIMT_Encode2#undef GIMT_Encode4#undef GIMT_Encode8#endif // ifdef GET_GLOBALISEL_IMPL#ifdef GET_GLOBALISEL_PREDICATES_DECL#endif // ifdef GET_GLOBALISEL_PREDICATES_DECL#ifdef GET_GLOBALISEL_PREDICATES_INIT#endif // ifdef GET_GLOBALISEL_PREDICATES_INIT
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