//===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This defines functionality used to emit comments about X86 instructions to // an output stream for -fverbose-asm. // //===----------------------------------------------------------------------===// #include "X86InstComments.h" #include "X86ATTInstPrinter.h" #include "X86BaseInfo.h" #include "X86MCTargetDesc.h" #include "X86ShuffleDecode.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCInstrInfo.h" #include "llvm/Support/raw_ostream.h" #include <string_view> usingnamespacellvm; #define CASE_SSE_INS_COMMON(Inst, src) … #define CASE_AVX_INS_COMMON(Inst, Suffix, src) … #define CASE_MASK_INS_COMMON(Inst, Suffix, src) … #define CASE_MASKZ_INS_COMMON(Inst, Suffix, src) … #define CASE_AVX512_INS_COMMON(Inst, Suffix, src) … #define CASE_PTERNLOG(Inst, src) … #define CASE_MOVDUP(Inst, src) … #define CASE_MASK_MOVDUP(Inst, src) … #define CASE_MASKZ_MOVDUP(Inst, src) … #define CASE_PMOVZX(Inst, src) … #define CASE_UNPCK(Inst, src) … #define CASE_MASK_UNPCK(Inst, src) … #define CASE_MASKZ_UNPCK(Inst, src) … #define CASE_SHUF(Inst, suf) … #define CASE_MASK_SHUF(Inst, src) … #define CASE_MASKZ_SHUF(Inst, src) … #define CASE_VPERMILPI(Inst, src) … #define CASE_MASK_VPERMILPI(Inst, src) … #define CASE_MASKZ_VPERMILPI(Inst, src) … #define CASE_VPERM(Inst, src) … #define CASE_MASK_VPERM(Inst, src) … #define CASE_MASKZ_VPERM(Inst, src) … #define CASE_VSHUF(Inst, src) … #define CASE_MASK_VSHUF(Inst, src) … #define CASE_MASKZ_VSHUF(Inst, src) … #define CASE_AVX512_FMA(Inst, suf) … #define CASE_FMA(Inst, suf) … #define CASE_FMA_PACKED_REG(Inst) … #define CASE_FMA_PACKED_MEM(Inst) … #define CASE_FMA_SCALAR_REG(Inst) … #define CASE_FMA_SCALAR_MEM(Inst) … #define CASE_FMA4(Inst, suf) … #define CASE_FMA4_PACKED_RR(Inst) … #define CASE_FMA4_PACKED_RM(Inst) … #define CASE_FMA4_PACKED_MR(Inst) … #define CASE_FMA4_SCALAR_RR(Inst) … #define CASE_FMA4_SCALAR_RM(Inst) … #define CASE_FMA4_SCALAR_MR(Inst) … static unsigned getVectorRegSize(MCRegister Reg) { … } static unsigned getRegOperandNumElts(const MCInst *MI, unsigned ScalarSize, unsigned OperandIndex) { … } static const char *getRegName(MCRegister Reg) { … } /// Wraps the destination register name with AVX512 mask/maskz filtering. static void printMasking(raw_ostream &OS, const MCInst *MI, const MCInstrInfo &MCII) { … } static bool printFMAComments(const MCInst *MI, raw_ostream &OS, const MCInstrInfo &MCII) { … } // This table is indexed by the imm8 binary function specified in a // vpternlog{d,q} instruction. The symbols {a,b,c} correspond to the three // inputs to the binary function. This table was taken from // https://gist.github.com/dougallj/81a80cd381988466c4e1c4889ecac95b#file-2-x86-base-txt // with slight massaging. constexpr StringLiteral TernlogFunctions[] = …; static bool printPTERNLOGComments(const MCInst *MI, raw_ostream &OS, const MCInstrInfo &MCII) { … } //===----------------------------------------------------------------------===// // Top Level Entrypoint //===----------------------------------------------------------------------===// /// EmitAnyX86InstComments - This function decodes x86 instructions and prints /// newline terminated strings to the specified string if desired. This /// information is shown in disassembly dumps when verbose assembly is enabled. bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, const MCInstrInfo &MCII) { … }
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