llvm/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp

//===-- X86EncodingOptimization.cpp - X86 Encoding optimization -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the implementation of the X86 encoding optimization
//
//===----------------------------------------------------------------------===//

#include "X86EncodingOptimization.h"
#include "X86BaseInfo.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Support/Casting.h"

usingnamespacellvm;

bool X86::optimizeInstFromVEX3ToVEX2(MCInst &MI, const MCInstrDesc &Desc) { … }

// NOTE: We may write this as an InstAlias if it's only used by AsmParser. See
// validateTargetOperandClass.
bool X86::optimizeShiftRotateWithImmediateOne(MCInst &MI) { … }

bool X86::optimizeVPCMPWithImmediateOneOrSix(MCInst &MI) { … }

bool X86::optimizeMOVSX(MCInst &MI) { … }

bool X86::optimizeINCDEC(MCInst &MI, bool In64BitMode) { … }

static bool isARegister(MCRegister Reg) { … }

/// Simplify things like MOV32rm to MOV32o32a.
bool X86::optimizeMOV(MCInst &MI, bool In64BitMode) { … }

/// Simplify FOO $imm, %{al,ax,eax,rax} to FOO $imm, for instruction with
/// a short fixed-register form.
static bool optimizeToFixedRegisterForm(MCInst &MI) { … }

unsigned X86::getOpcodeForShortImmediateForm(unsigned Opcode) { … }

unsigned X86::getOpcodeForLongImmediateForm(unsigned Opcode) { … }

static bool optimizeToShortImmediateForm(MCInst &MI) { … }

bool X86::optimizeToFixedRegisterOrShortImmediateForm(MCInst &MI) { … }