llvm/lld/ELF/Arch/LoongArch.cpp

//===- LoongArch.cpp ------------------------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#include "InputFiles.h"
#include "OutputSections.h"
#include "Symbols.h"
#include "SyntheticSections.h"
#include "Target.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/Support/LEB128.h"

usingnamespacellvm;
usingnamespacellvm::object;
usingnamespacellvm::support::endian;
usingnamespacellvm::ELF;
usingnamespacelld;
usingnamespacelld::elf;

namespace {
class LoongArch final : public TargetInfo { … };
} // end anonymous namespace

namespace {
enum Op { … };

enum Reg { … };
} // namespace

// Mask out the input's lowest 12 bits for use with `pcalau12i`, in sequences
// like `pcalau12i + addi.[wd]` or `pcalau12i + {ld,st}.*` where the `pcalau12i`
// produces a PC-relative intermediate value with the lowest 12 bits zeroed (the
// "page") for the next instruction to add in the "page offset". (`pcalau12i`
// stands for something like "PC ALigned Add Upper that starts from the 12th
// bit, Immediate".)
//
// Here a "page" is in fact just another way to refer to the 12-bit range
// allowed by the immediate field of the addi/ld/st instructions, and not
// related to the system or the kernel's actual page size. The semantics happen
// to match the AArch64 `adrp`, so the concept of "page" is borrowed here.
static uint64_t getLoongArchPage(uint64_t p) { … }

static uint32_t lo12(uint32_t val) { … }

// Calculate the adjusted page delta between dest and PC.
uint64_t elf::getLoongArchPageDelta(uint64_t dest, uint64_t pc, RelType type) { … }

static uint32_t hi20(uint32_t val) { … }

static uint32_t insn(uint32_t op, uint32_t d, uint32_t j, uint32_t k) { … }

// Extract bits v[begin:end], where range is inclusive.
static uint32_t extractBits(uint64_t v, uint32_t begin, uint32_t end) { … }

static uint32_t setD5k16(uint32_t insn, uint32_t imm) { … }

static uint32_t setD10k16(uint32_t insn, uint32_t imm) { … }

static uint32_t setJ20(uint32_t insn, uint32_t imm) { … }

static uint32_t setK12(uint32_t insn, uint32_t imm) { … }

static uint32_t setK16(uint32_t insn, uint32_t imm) { … }

static bool isJirl(uint32_t insn) { … }

static void handleUleb128(uint8_t *loc, uint64_t val) { … }

LoongArch::LoongArch(Ctx &ctx) : … { … }

static uint32_t getEFlags(const InputFile *f) { … }

static bool inputFileHasCode(const InputFile *f) { … }

uint32_t LoongArch::calcEFlags() const { … }

int64_t LoongArch::getImplicitAddend(const uint8_t *buf, RelType type) const { … }

void LoongArch::writeGotPlt(uint8_t *buf, const Symbol &s) const { … }

void LoongArch::writeIgotPlt(uint8_t *buf, const Symbol &s) const { … }

void LoongArch::writePltHeader(uint8_t *buf) const { … }

void LoongArch::writePlt(uint8_t *buf, const Symbol &sym,
                     uint64_t pltEntryAddr) const { … }

RelType LoongArch::getDynRel(RelType type) const { … }

RelExpr LoongArch::getRelExpr(const RelType type, const Symbol &s,
                              const uint8_t *loc) const { … }

bool LoongArch::usesOnlyLowPageBits(RelType type) const { … }

void LoongArch::relocate(uint8_t *loc, const Relocation &rel,
                         uint64_t val) const { … }

static bool relax(InputSection &sec) { … }

// When relaxing just R_LARCH_ALIGN, relocDeltas is usually changed only once in
// the absence of a linker script. For call and load/store R_LARCH_RELAX, code
// shrinkage may reduce displacement and make more relocations eligible for
// relaxation. Code shrinkage may increase displacement to a call/load/store
// target at a higher fixed address, invalidating an earlier relaxation. Any
// change in section sizes can have cascading effect and require another
// relaxation pass.
bool LoongArch::relaxOnce(int pass) const { … }

void LoongArch::finalizeRelax(int passes) const { … }

TargetInfo *elf::getLoongArchTargetInfo(Ctx &ctx) { … }