llvm/lld/ELF/Arch/X86.cpp

//===- X86.cpp ------------------------------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#include "OutputSections.h"
#include "Symbols.h"
#include "SyntheticSections.h"
#include "Target.h"
#include "lld/Common/ErrorHandler.h"
#include "llvm/Support/Endian.h"

usingnamespacellvm;
usingnamespacellvm::support::endian;
usingnamespacellvm::ELF;
usingnamespacelld;
usingnamespacelld::elf;

namespace {
class X86 : public TargetInfo { … };
} // namespace

X86::X86(Ctx &ctx) : … { … }

int X86::getTlsGdRelaxSkip(RelType type) const { … }

RelExpr X86::getRelExpr(RelType type, const Symbol &s,
                        const uint8_t *loc) const { … }

RelExpr X86::adjustTlsExpr(RelType type, RelExpr expr) const { … }

void X86::writeGotPltHeader(uint8_t *buf) const { … }

void X86::writeGotPlt(uint8_t *buf, const Symbol &s) const { … }

void X86::writeIgotPlt(uint8_t *buf, const Symbol &s) const { … }

RelType X86::getDynRel(RelType type) const { … }

void X86::writePltHeader(uint8_t *buf) const { … }

void X86::writePlt(uint8_t *buf, const Symbol &sym,
                   uint64_t pltEntryAddr) const { … }

int64_t X86::getImplicitAddend(const uint8_t *buf, RelType type) const { … }

void X86::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const { … }

static void relaxTlsGdToLe(uint8_t *loc, const Relocation &rel, uint64_t val) { … }

static void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel, uint64_t val) { … }

// In some conditions, relocations can be optimized to avoid using GOT.
// This function does that for Initial Exec to Local Exec case.
static void relaxTlsIeToLe(uint8_t *loc, const Relocation &rel, uint64_t val) { … }

static void relaxTlsLdToLe(uint8_t *loc, const Relocation &rel, uint64_t val) { … }

void X86::relocateAlloc(InputSectionBase &sec, uint8_t *buf) const { … }

// If Intel Indirect Branch Tracking is enabled, we have to emit special PLT
// entries containing endbr32 instructions. A PLT entry will be split into two
// parts, one in .plt.sec (writePlt), and the other in .plt (writeIBTPlt).
namespace {
class IntelIBT : public X86 { … };
} // namespace

void IntelIBT::writeGotPlt(uint8_t *buf, const Symbol &s) const { … }

void IntelIBT::writePlt(uint8_t *buf, const Symbol &sym,
                        uint64_t /*pltEntryAddr*/) const { … }

void IntelIBT::writeIBTPlt(uint8_t *buf, size_t numEntries) const { … }

namespace {
class RetpolinePic : public X86 { … };

class RetpolineNoPic : public X86 { … };
} // namespace

RetpolinePic::RetpolinePic(Ctx &ctx) : … { … }

void RetpolinePic::writeGotPlt(uint8_t *buf, const Symbol &s) const { … }

void RetpolinePic::writePltHeader(uint8_t *buf) const { … }

void RetpolinePic::writePlt(uint8_t *buf, const Symbol &sym,
                            uint64_t pltEntryAddr) const { … }

RetpolineNoPic::RetpolineNoPic(Ctx &ctx) : … { … }

void RetpolineNoPic::writeGotPlt(uint8_t *buf, const Symbol &s) const { … }

void RetpolineNoPic::writePltHeader(uint8_t *buf) const { … }

void RetpolineNoPic::writePlt(uint8_t *buf, const Symbol &sym,
                              uint64_t pltEntryAddr) const { … }

TargetInfo *elf::getX86TargetInfo(Ctx &ctx) { … }