ArmSMEOps.h.inc | Explore in Territory

/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Op Declarations                                                            *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|* From: ArmSMEOps.td                                                         *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

namespace mlir {
namespace arm_sme {
class CopyTileOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class ExtractTileSliceOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class FMopa2WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class FMops2WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class GetTileOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class InsertTileSliceOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class LoadTileSliceOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class OuterProductOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class SMopa2WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class SMopa4WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class SMops2WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class SMops4WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class StoreTileSliceOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class StreamingVLOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class SuMopa4WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class SuMops4WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class TileLoadOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class TileStoreOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class UMopa2WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class UMopa4WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class UMops2WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class UMops4WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class UsMopa4WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class UsMops4WayOp;
} // namespace arm_sme
} // namespace mlir
namespace mlir {
namespace arm_sme {
class ZeroOp;
} // namespace arm_sme
} // namespace mlir
#ifdef GET_OP_CLASSES
#undef GET_OP_CLASSES

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::CopyTileOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class CopyTileOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class CopyTileOpGenericAdaptor : public detail::CopyTileOpGenericAdaptorBase { … };
class CopyTileOpAdaptor : public CopyTileOpGenericAdaptor<::mlir::ValueRange> { … };
class CopyTileOp : public ::mlir::Op<CopyTileOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<VectorType>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::OneOperand, ::mlir::OpTrait::OpInvariants, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait, ::mlir::InferTypeOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::CopyTileOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::ExtractTileSliceOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class ExtractTileSliceOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class ExtractTileSliceOpGenericAdaptor : public detail::ExtractTileSliceOpGenericAdaptorBase { … };
class ExtractTileSliceOpAdaptor : public ExtractTileSliceOpGenericAdaptor<::mlir::ValueRange> { … };
class ExtractTileSliceOp : public ::mlir::Op<ExtractTileSliceOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::VectorType>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::NOperands<2>::Impl, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ArmSMETileOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ::mlir::InferTypeOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::ExtractTileSliceOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::FMopa2WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class FMopa2WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class FMopa2WayOpGenericAdaptor : public detail::FMopa2WayOpGenericAdaptorBase { … };
class FMopa2WayOpAdaptor : public FMopa2WayOpGenericAdaptor<::mlir::ValueRange> { … };
class FMopa2WayOp : public ::mlir::Op<FMopa2WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::FMopa2WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::FMops2WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class FMops2WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class FMops2WayOpGenericAdaptor : public detail::FMops2WayOpGenericAdaptorBase { … };
class FMops2WayOpAdaptor : public FMops2WayOpGenericAdaptor<::mlir::ValueRange> { … };
class FMops2WayOp : public ::mlir::Op<FMops2WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::FMops2WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::GetTileOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class GetTileOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class GetTileOpGenericAdaptor : public detail::GetTileOpGenericAdaptorBase { … };
class GetTileOpAdaptor : public GetTileOpGenericAdaptor<::mlir::ValueRange> { … };
class GetTileOp : public ::mlir::Op<GetTileOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<VectorType>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::ZeroOperands, ::mlir::OpTrait::OpInvariants, ArmSMETileOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::GetTileOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::InsertTileSliceOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class InsertTileSliceOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class InsertTileSliceOpGenericAdaptor : public detail::InsertTileSliceOpGenericAdaptorBase { … };
class InsertTileSliceOpAdaptor : public InsertTileSliceOpGenericAdaptor<::mlir::ValueRange> { … };
class InsertTileSliceOp : public ::mlir::Op<InsertTileSliceOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<VectorType>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::NOperands<3>::Impl, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ArmSMETileOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ::mlir::InferTypeOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::InsertTileSliceOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::LoadTileSliceOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class LoadTileSliceOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class LoadTileSliceOpGenericAdaptor : public detail::LoadTileSliceOpGenericAdaptorBase { … };
class LoadTileSliceOpAdaptor : public LoadTileSliceOpGenericAdaptor<::mlir::ValueRange> { … };
class LoadTileSliceOp : public ::mlir::Op<LoadTileSliceOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<VectorType>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<4>::Impl, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ArmSMETileOpInterface::Trait, ::mlir::InferTypeOpInterface::Trait, ::mlir::MemoryEffectOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::LoadTileSliceOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::OuterProductOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class OuterProductOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class OuterProductOpGenericAdaptor : public detail::OuterProductOpGenericAdaptorBase { … };
class OuterProductOpAdaptor : public OuterProductOpGenericAdaptor<::mlir::ValueRange> { … };
class OuterProductOp : public ::mlir::Op<OuterProductOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<VectorType>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait, ::mlir::InferTypeOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::OuterProductOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::SMopa2WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class SMopa2WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class SMopa2WayOpGenericAdaptor : public detail::SMopa2WayOpGenericAdaptorBase { … };
class SMopa2WayOpAdaptor : public SMopa2WayOpGenericAdaptor<::mlir::ValueRange> { … };
class SMopa2WayOp : public ::mlir::Op<SMopa2WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::SMopa2WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::SMopa4WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class SMopa4WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class SMopa4WayOpGenericAdaptor : public detail::SMopa4WayOpGenericAdaptorBase { … };
class SMopa4WayOpAdaptor : public SMopa4WayOpGenericAdaptor<::mlir::ValueRange> { … };
class SMopa4WayOp : public ::mlir::Op<SMopa4WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::SMopa4WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::SMops2WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class SMops2WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class SMops2WayOpGenericAdaptor : public detail::SMops2WayOpGenericAdaptorBase { … };
class SMops2WayOpAdaptor : public SMops2WayOpGenericAdaptor<::mlir::ValueRange> { … };
class SMops2WayOp : public ::mlir::Op<SMops2WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::SMops2WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::SMops4WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class SMops4WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class SMops4WayOpGenericAdaptor : public detail::SMops4WayOpGenericAdaptorBase { … };
class SMops4WayOpAdaptor : public SMops4WayOpGenericAdaptor<::mlir::ValueRange> { … };
class SMops4WayOp : public ::mlir::Op<SMops4WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::SMops4WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::StoreTileSliceOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class StoreTileSliceOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class StoreTileSliceOpGenericAdaptor : public detail::StoreTileSliceOpGenericAdaptorBase { … };
class StoreTileSliceOpAdaptor : public StoreTileSliceOpGenericAdaptor<::mlir::ValueRange> { … };
class StoreTileSliceOp : public ::mlir::Op<StoreTileSliceOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::ZeroResults, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<4>::Impl, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ArmSMETileOpInterface::Trait, ::mlir::MemoryEffectOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::StoreTileSliceOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::StreamingVLOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class StreamingVLOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class StreamingVLOpGenericAdaptor : public detail::StreamingVLOpGenericAdaptorBase { … };
class StreamingVLOpAdaptor : public StreamingVLOpGenericAdaptor<::mlir::ValueRange> { … };
class StreamingVLOp : public ::mlir::Op<StreamingVLOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::IndexType>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::ZeroOperands, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ::mlir::InferTypeOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::StreamingVLOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::SuMopa4WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class SuMopa4WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class SuMopa4WayOpGenericAdaptor : public detail::SuMopa4WayOpGenericAdaptorBase { … };
class SuMopa4WayOpAdaptor : public SuMopa4WayOpGenericAdaptor<::mlir::ValueRange> { … };
class SuMopa4WayOp : public ::mlir::Op<SuMopa4WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::SuMopa4WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::SuMops4WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class SuMops4WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class SuMops4WayOpGenericAdaptor : public detail::SuMops4WayOpGenericAdaptorBase { … };
class SuMops4WayOpAdaptor : public SuMops4WayOpGenericAdaptor<::mlir::ValueRange> { … };
class SuMops4WayOp : public ::mlir::Op<SuMops4WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::SuMops4WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::TileLoadOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class TileLoadOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class TileLoadOpGenericAdaptor : public detail::TileLoadOpGenericAdaptorBase { … };
class TileLoadOpAdaptor : public TileLoadOpGenericAdaptor<::mlir::ValueRange> { … };
class TileLoadOp : public ::mlir::Op<TileLoadOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<VectorType>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<1>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ArmSMETileOpInterface::Trait, ::mlir::MemoryEffectOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::TileLoadOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::TileStoreOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class TileStoreOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class TileStoreOpGenericAdaptor : public detail::TileStoreOpGenericAdaptorBase { … };
class TileStoreOpAdaptor : public TileStoreOpGenericAdaptor<::mlir::ValueRange> { … };
class TileStoreOp : public ::mlir::Op<TileStoreOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::ZeroResults, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ArmSMETileOpInterface::Trait, ::mlir::MemoryEffectOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::TileStoreOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::UMopa2WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class UMopa2WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class UMopa2WayOpGenericAdaptor : public detail::UMopa2WayOpGenericAdaptorBase { … };
class UMopa2WayOpAdaptor : public UMopa2WayOpGenericAdaptor<::mlir::ValueRange> { … };
class UMopa2WayOp : public ::mlir::Op<UMopa2WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::UMopa2WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::UMopa4WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class UMopa4WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class UMopa4WayOpGenericAdaptor : public detail::UMopa4WayOpGenericAdaptorBase { … };
class UMopa4WayOpAdaptor : public UMopa4WayOpGenericAdaptor<::mlir::ValueRange> { … };
class UMopa4WayOp : public ::mlir::Op<UMopa4WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::UMopa4WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::UMops2WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class UMops2WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class UMops2WayOpGenericAdaptor : public detail::UMops2WayOpGenericAdaptorBase { … };
class UMops2WayOpAdaptor : public UMops2WayOpGenericAdaptor<::mlir::ValueRange> { … };
class UMops2WayOp : public ::mlir::Op<UMops2WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::UMops2WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::UMops4WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class UMops4WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class UMops4WayOpGenericAdaptor : public detail::UMops4WayOpGenericAdaptorBase { … };
class UMops4WayOpAdaptor : public UMops4WayOpGenericAdaptor<::mlir::ValueRange> { … };
class UMops4WayOp : public ::mlir::Op<UMops4WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::UMops4WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::UsMopa4WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class UsMopa4WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class UsMopa4WayOpGenericAdaptor : public detail::UsMopa4WayOpGenericAdaptorBase { … };
class UsMopa4WayOpAdaptor : public UsMopa4WayOpGenericAdaptor<::mlir::ValueRange> { … };
class UsMopa4WayOp : public ::mlir::Op<UsMopa4WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::UsMopa4WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::UsMops4WayOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class UsMops4WayOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class UsMops4WayOpGenericAdaptor : public detail::UsMops4WayOpGenericAdaptorBase { … };
class UsMops4WayOpAdaptor : public UsMops4WayOpGenericAdaptor<::mlir::ValueRange> { … };
class UsMops4WayOp : public ::mlir::Op<UsMops4WayOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<::mlir::Type>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::AtLeastNOperands<2>::Impl, ::mlir::OpTrait::AttrSizedOperandSegments, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait, ArmSMETileOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::UsMops4WayOp)

namespace mlir {
namespace arm_sme {

//===----------------------------------------------------------------------===//
// ::mlir::arm_sme::ZeroOp declarations
//===----------------------------------------------------------------------===//

namespace detail {
class ZeroOpGenericAdaptorBase { … };
} // namespace detail
template <typename RangeT>
class ZeroOpGenericAdaptor : public detail::ZeroOpGenericAdaptorBase { … };
class ZeroOpAdaptor : public ZeroOpGenericAdaptor<::mlir::ValueRange> { … };
class ZeroOp : public ::mlir::Op<ZeroOp, ::mlir::OpTrait::ZeroRegions, ::mlir::OpTrait::OneResult, ::mlir::OpTrait::OneTypedResult<VectorType>::Impl, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::ZeroOperands, ::mlir::OpTrait::OpInvariants, ArmSMETileOpInterface::Trait, ::mlir::ConditionallySpeculatable::Trait, ::mlir::OpTrait::AlwaysSpeculatableImplTrait, ::mlir::MemoryEffectOpInterface::Trait> { … };
} // namespace arm_sme
} // namespace mlir
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::arm_sme::ZeroOp)


#endif  // GET_OP_CLASSES
llvm/tools/mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.h.inc
