llvm/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp

//===-- AVRISelDAGToDAG.cpp - A dag to dag inst selector for AVR ----------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines an instruction selector for the AVR target.
//
//===----------------------------------------------------------------------===//

#include "AVR.h"
#include "AVRTargetMachine.h"
#include "MCTargetDesc/AVRMCTargetDesc.h"

#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"

#define DEBUG_TYPE …
#define PASS_NAME …

usingnamespacellvm;

namespace {

/// Lowers LLVM IR (in DAG form) to AVR MC instructions (in DAG form).
class AVRDAGToDAGISel : public SelectionDAGISel { … };

class AVRDAGToDAGISelLegacy : public SelectionDAGISelLegacy { … };

} // namespace

char AVRDAGToDAGISelLegacy::ID = …;

INITIALIZE_PASS(…)

bool AVRDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) { … }

bool AVRDAGToDAGISel::SelectAddr(SDNode *Op, SDValue N, SDValue &Base,
                                 SDValue &Disp) { … }

bool AVRDAGToDAGISel::selectIndexedLoad(SDNode *N) { … }

unsigned AVRDAGToDAGISel::selectIndexedProgMemLoad(const LoadSDNode *LD, MVT VT,
                                                   int Bank) { … }

bool AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(
    const SDValue &Op, InlineAsm::ConstraintCode ConstraintCode,
    std::vector<SDValue> &OutOps) { … }

template <> bool AVRDAGToDAGISel::select<ISD::FrameIndex>(SDNode *N) { … }

template <> bool AVRDAGToDAGISel::select<ISD::STORE>(SDNode *N) { … }

template <> bool AVRDAGToDAGISel::select<ISD::LOAD>(SDNode *N) { … }

template <> bool AVRDAGToDAGISel::select<AVRISD::CALL>(SDNode *N) { … }

template <> bool AVRDAGToDAGISel::select<ISD::BRIND>(SDNode *N) { … }

bool AVRDAGToDAGISel::selectMultiplication(llvm::SDNode *N) { … }

void AVRDAGToDAGISel::Select(SDNode *N) { … }

bool AVRDAGToDAGISel::trySelect(SDNode *N) { … }

FunctionPass *llvm::createAVRISelDag(AVRTargetMachine &TM,
                                     CodeGenOptLevel OptLevel) { … }