/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Assembly Matcher Source Fragment *| |* *| |* Automatically generated file, do not edit! *| |* From: LoongArch.td *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_ASSEMBLER_HEADER #undef GET_ASSEMBLER_HEADER // This should be included into the middle of the declaration of // your subclasses implementation of MCTargetAsmParser. FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const; void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, const OperandVector &Operands); void convertToMapAndConstraints(unsigned Kind, const OperandVector &Operands) override; unsigned MatchInstructionImpl(const OperandVector &Operands, MCInst &Inst, uint64_t &ErrorInfo, FeatureBitset &MissingFeatures, bool matchingInlineAsm, unsigned VariantID = 0); unsigned MatchInstructionImpl(const OperandVector &Operands, MCInst &Inst, uint64_t &ErrorInfo, bool matchingInlineAsm, unsigned VariantID = 0) { FeatureBitset MissingFeatures; return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures, matchingInlineAsm, VariantID); } ParseStatus MatchOperandParserImpl( OperandVector &Operands, StringRef Mnemonic, bool ParseForAllFeatures = false); ParseStatus tryCustomParseOperand( OperandVector &Operands, unsigned MCK); #endif // GET_ASSEMBLER_HEADER #ifdef GET_OPERAND_DIAGNOSTIC_TYPES #undef GET_OPERAND_DIAGNOSTIC_TYPES Match_InvalidBareSymbol, Match_InvalidImm32, Match_InvalidImm64, Match_InvalidSImm10, Match_InvalidSImm10lsl2, Match_InvalidSImm11lsl1, Match_InvalidSImm12, Match_InvalidSImm12addlike, Match_InvalidSImm12lu52id, Match_InvalidSImm13, Match_InvalidSImm14lsl2, Match_InvalidSImm16, Match_InvalidSImm16lsl2, Match_InvalidSImm20, Match_InvalidSImm20lu12iw, Match_InvalidSImm20lu32id, Match_InvalidSImm20pcaddi, Match_InvalidSImm20pcaddu18i, Match_InvalidSImm20pcalau12i, Match_InvalidSImm21lsl2, Match_InvalidSImm26Operand, Match_InvalidSImm5, Match_InvalidSImm8, Match_InvalidSImm8lsl1, Match_InvalidSImm8lsl2, Match_InvalidSImm8lsl3, Match_InvalidSImm9lsl3, Match_InvalidTPRelAddSymbol, Match_InvalidUImm1, Match_InvalidUImm12, Match_InvalidUImm12ori, Match_InvalidUImm14, Match_InvalidUImm15, Match_InvalidUImm2, Match_InvalidUImm2plus1, Match_InvalidUImm3, Match_InvalidUImm4, Match_InvalidUImm5, Match_InvalidUImm6, Match_InvalidUImm7, Match_InvalidUImm8, END_OPERAND_DIAGNOSTIC_TYPES #endif // GET_OPERAND_DIAGNOSTIC_TYPES #ifdef GET_REGISTER_MATCHER #undef GET_REGISTER_MATCHER // Bits for subtarget features that participate in instruction matching. enum SubtargetFeatureBits : uint8_t { … }; static MCRegister MatchRegisterName(StringRef Name) { … } static MCRegister MatchRegisterAltName(StringRef Name) { … } #endif // GET_REGISTER_MATCHER #ifdef GET_SUBTARGET_FEATURE_NAME #undef GET_SUBTARGET_FEATURE_NAME // User-level names for subtarget features that participate in // instruction matching. static const char *getSubtargetFeatureName(uint64_t Val) { switch(Val) { case Feature_IsLA64Bit: return "LA64 Basic Integer and Privilege Instruction Set"; case Feature_IsLA32Bit: return "LA32 Basic Integer and Privilege Instruction Set"; case Feature_HasLaGlobalWithPcrelBit: return "Expand la.global as la.pcrel"; case Feature_HasLaGlobalWithAbsBit: return "Expand la.global as la.abs"; case Feature_HasLaLocalWithAbsBit: return "Expand la.local as la.abs"; default: return "(unknown)"; } } #endif // GET_SUBTARGET_FEATURE_NAME #ifdef GET_MATCHER_IMPLEMENTATION #undef GET_MATCHER_IMPLEMENTATION enum { Tie0_1_1, }; static const uint8_t TiedAsmOperandTable[][3] = { /* Tie0_1_1 */ { 0, 1, 1 }, }; namespace { enum OperatorConversionKind { CVT_Done, CVT_Reg, CVT_Tied, CVT_95_Reg, CVT_95_addImmOperands, CVT_95_addRegOperands, CVT_regR0, CVT_imm_95_0, CVT_regR1, CVT_NUM_CONVERTERS }; enum InstructionConversionKind { Convert__Reg1_0__Reg1_1__Reg1_2, Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, Convert__Reg1_0__Reg1_1__SImm51_2, Convert__Reg1_0__Reg1_1__SImm161_2, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, Convert__Reg1_0__Reg1_1__UImm121_2, Convert__Reg1_0__Reg1_1__UImm41_2, Convert__Reg1_0__UImm81_1, Convert__Reg1_0__UImm41_1, Convert__Reg1_0__UImm51_1__UImm41_2, Convert__Reg1_0__Reg1_1, Convert__SImm26OperandB1_0, Convert__Reg1_0__SImm21lsl21_1, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, Convert__Reg1_0__regR0__SImm16lsl21_1, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, Convert__regR0__Reg1_0__SImm16lsl21_1, Convert__SImm26OperandBL1_0, Convert__UImm151_0, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3, Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3, Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3, Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3, Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3, Convert__UImm51_0__Reg1_1__SImm121_2, Convert__BareSymbol1_0, Convert__Reg1_0__UImm141_1, Convert__Reg1_0__Tie0_1_1__UImm141_1, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2, Convert_NoOperands, Convert__Reg1_0__Reg1_1__SImm121_2, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Convert__Reg1_2__Reg1_1__UImm51_0, Convert__SImm21lsl21_0, Convert__regR0__Reg1_0__imm_95_0, Convert__Reg1_0__BareSymbol1_1, Convert__Reg1_0__imm_95_0__BareSymbol1_1, Convert__Reg1_0__Reg1_1__BareSymbol1_2, Convert__Reg1_0__Reg1_1__UImm81_2, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, Convert__Reg1_0__Imm641_1, Convert__Reg1_0__Imm321_1, Convert__Reg1_0__SImm20lu12iw1_1, Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1, Convert__Reg1_0__Reg1_1__SImm12lu52id1_2, Convert__Reg1_0__Reg1_1__regR0, Convert__Reg1_0__Tie0_1_1__Reg1_1, Convert__regR0__regR0__imm_95_0, Convert__Reg1_0__Reg1_1__UImm12ori1_2, Convert__Reg1_0__SImm20pcaddi1_1, Convert__Reg1_0__SImm201_1, Convert__Reg1_0__SImm20pcaddu18i1_1, Convert__Reg1_0__SImm20pcalau12i1_1, Convert__UImm51_0__Reg1_1__Reg1_2, Convert__Reg1_0__Reg1_1__UImm31_2, Convert__Reg1_0__Reg1_1__UImm61_2, Convert__Reg1_0__Reg1_1__UImm51_2, Convert__regR0__regR1__imm_95_0, Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm11_2, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2, Convert__Reg1_0__SImm131_1, Convert__Reg1_0__Reg1_1__SImm9lsl31_2, Convert__Reg1_0__Reg1_1__SImm11lsl11_2, Convert__Reg1_0__Reg1_1__SImm10lsl21_2, Convert__Reg1_0__Reg1_1__UImm11_2, Convert__Reg1_0__Reg1_1__UImm21_2, Convert__Reg1_0__SImm101_1, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, Convert__Reg1_0__Reg1_1__SImm81_2__UImm41_3, Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm11_3, Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm31_3, Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm21_3, Convert__Reg1_0, Convert__UImm31_0, Convert__Reg1_0__UImm31_1, Convert__Reg1_0__UImm61_1, Convert__Reg1_0__UImm51_1, Convert__Reg1_0__UImm51_1__UImm81_2, Convert__Reg1_0__Reg1_1__SImm81_2__UImm51_3, Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm21_3, Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm41_3, Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm31_3, CVT_NUM_SIGNATURES }; } // end anonymous namespace static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][11] = { // Convert__Reg1_0__Reg1_1__Reg1_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm12addlike1_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm51_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm161_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addRegOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__UImm121_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__UImm41_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__UImm81_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__UImm41_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__UImm51_1__UImm41_2 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done }, // Convert__SImm26OperandB1_0 { CVT_95_addImmOperands, 1, CVT_Done }, // Convert__Reg1_0__SImm21lsl21_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm16lsl21_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__regR0__SImm16lsl21_1 { CVT_95_Reg, 1, CVT_regR0, 0, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_1__Reg1_0__SImm16lsl21_2 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__regR0__Reg1_0__SImm16lsl21_1 { CVT_regR0, 0, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__SImm26OperandBL1_0 { CVT_95_addImmOperands, 1, CVT_Done }, // Convert__UImm151_0 { CVT_95_addImmOperands, 1, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__UImm51_0__Reg1_1__SImm121_2 { CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__BareSymbol1_0 { CVT_95_addImmOperands, 1, CVT_Done }, // Convert__Reg1_0__UImm141_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__UImm141_1 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert_NoOperands { CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm121_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done }, // Convert__Reg1_2__Reg1_1__UImm51_0 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, // Convert__SImm21lsl21_0 { CVT_95_addImmOperands, 1, CVT_Done }, // Convert__regR0__Reg1_0__imm_95_0 { CVT_regR0, 0, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done }, // Convert__Reg1_0__BareSymbol1_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__imm_95_0__BareSymbol1_1 { CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__Reg1_1__BareSymbol1_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__UImm81_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm14lsl21_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Imm641_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__Imm321_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__SImm20lu12iw1_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm12lu52id1_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__regR0 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_regR0, 0, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done }, // Convert__regR0__regR0__imm_95_0 { CVT_regR0, 0, CVT_regR0, 0, CVT_imm_95_0, 0, CVT_Done }, // Convert__Reg1_0__Reg1_1__UImm12ori1_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__SImm20pcaddi1_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__SImm201_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__SImm20pcaddu18i1_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__SImm20pcalau12i1_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__UImm51_0__Reg1_1__Reg1_2 { CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__UImm31_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__UImm61_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__UImm51_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__regR0__regR1__imm_95_0 { CVT_regR0, 0, CVT_regR1, 0, CVT_imm_95_0, 0, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm11_2 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__SImm131_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm9lsl31_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm11lsl11_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm10lsl21_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__UImm11_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__UImm21_2 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__SImm101_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm81_2__UImm41_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm11_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm31_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm21_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0 { CVT_95_Reg, 1, CVT_Done }, // Convert__UImm31_0 { CVT_95_addImmOperands, 1, CVT_Done }, // Convert__Reg1_0__UImm31_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__UImm61_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__UImm51_1 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, // Convert__Reg1_0__UImm51_1__UImm81_2 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm81_2__UImm51_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm21_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm41_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, // Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm31_3 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, }; void LoongArchAsmParser:: convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, const OperandVector &Operands) { assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); const uint8_t *Converter = ConversionTable[Kind]; Inst.setOpcode(Opcode); for (const uint8_t *p = Converter; *p; p += 2) { unsigned OpIdx = *(p + 1); switch (*p) { default: llvm_unreachable("invalid conversion entry!"); case CVT_Reg: static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); break; case CVT_Tied: { assert(*(p + 1) < (size_t)(std::end(TiedAsmOperandTable) - std::begin(TiedAsmOperandTable)) && "Tied operand not found"); unsigned TiedResOpnd = TiedAsmOperandTable[*(p + 1)][0]; if (TiedResOpnd != (uint8_t)-1) Inst.addOperand(Inst.getOperand(TiedResOpnd)); break; } case CVT_95_Reg: static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); break; case CVT_95_addImmOperands: static_cast<LoongArchOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1); break; case CVT_95_addRegOperands: static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); break; case CVT_regR0: Inst.addOperand(MCOperand::createReg(LoongArch::R0)); break; case CVT_imm_95_0: Inst.addOperand(MCOperand::createImm(0)); break; case CVT_regR1: Inst.addOperand(MCOperand::createReg(LoongArch::R1)); break; } } } void LoongArchAsmParser:: convertToMapAndConstraints(unsigned Kind, const OperandVector &Operands) { assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); unsigned NumMCOperands = 0; const uint8_t *Converter = ConversionTable[Kind]; for (const uint8_t *p = Converter; *p; p += 2) { switch (*p) { default: llvm_unreachable("invalid conversion entry!"); case CVT_Reg: Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); Operands[*(p + 1)]->setConstraint("r"); ++NumMCOperands; break; case CVT_Tied: ++NumMCOperands; break; case CVT_95_Reg: Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); Operands[*(p + 1)]->setConstraint("r"); NumMCOperands += 1; break; case CVT_95_addImmOperands: Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); Operands[*(p + 1)]->setConstraint("m"); NumMCOperands += 1; break; case CVT_95_addRegOperands: Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); Operands[*(p + 1)]->setConstraint("m"); NumMCOperands += 1; break; case CVT_regR0: Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); Operands[*(p + 1)]->setConstraint("m"); ++NumMCOperands; break; case CVT_imm_95_0: Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); Operands[*(p + 1)]->setConstraint(""); ++NumMCOperands; break; case CVT_regR1: Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); Operands[*(p + 1)]->setConstraint("m"); ++NumMCOperands; break; } } } namespace { /// MatchClassKind - The kinds of classes which participate in /// instruction matching. enum MatchClassKind { InvalidMatchClass = 0, OptionalMatchClass = 1, MCK_LAST_TOKEN = OptionalMatchClass, MCK_FCSR, // register class 'FCSR' MCK_SCR, // register class 'SCR' MCK_CFR, // register class 'CFR' MCK_GPRT, // register class 'GPRT' MCK_FPR32, // register class 'FPR32' MCK_FPR64, // register class 'FPR64' MCK_GPR, // register class 'GPR' MCK_LASX256, // register class 'LASX256' MCK_LSX128, // register class 'LSX128' MCK_LAST_REGISTER = MCK_LSX128, MCK_AtomicMemAsmOperand, // user defined class 'AtomicMemAsmOperand' MCK_BareSymbol, // user defined class 'BareSymbol' MCK_Imm, // user defined class 'ImmAsmOperand' MCK_SImm26OperandB, // user defined class 'SImm26OperandB' MCK_SImm26OperandBL, // user defined class 'SImm26OperandBL' MCK_TPRelAddSymbol, // user defined class 'TPRelAddSymbol' MCK_Imm32, // user defined class 'anonymous_8053' MCK_Imm64, // user defined class 'anonymous_8054' MCK_UImm1, // user defined class 'anonymous_8055' MCK_UImm2, // user defined class 'anonymous_8056' MCK_UImm2plus1, // user defined class 'anonymous_8057' MCK_UImm3, // user defined class 'anonymous_8058' MCK_UImm4, // user defined class 'anonymous_8059' MCK_UImm5, // user defined class 'anonymous_8060' MCK_UImm6, // user defined class 'anonymous_8061' MCK_UImm7, // user defined class 'anonymous_8062' MCK_UImm8, // user defined class 'anonymous_8063' MCK_UImm12, // user defined class 'anonymous_8064' MCK_UImm12ori, // user defined class 'anonymous_8065' MCK_UImm14, // user defined class 'anonymous_8066' MCK_UImm15, // user defined class 'anonymous_8067' MCK_SImm5, // user defined class 'anonymous_8068' MCK_SImm8, // user defined class 'anonymous_8069' MCK_SImm8lsl1, // user defined class 'anonymous_8070' MCK_SImm8lsl2, // user defined class 'anonymous_8071' MCK_SImm8lsl3, // user defined class 'anonymous_8072' MCK_SImm9lsl3, // user defined class 'anonymous_8073' MCK_SImm10, // user defined class 'anonymous_8074' MCK_SImm10lsl2, // user defined class 'anonymous_8075' MCK_SImm11lsl1, // user defined class 'anonymous_8076' MCK_SImm12, // user defined class 'anonymous_8077' MCK_SImm12addlike, // user defined class 'anonymous_8078' MCK_SImm12lu52id, // user defined class 'anonymous_8079' MCK_SImm13, // user defined class 'anonymous_8080' MCK_SImm14lsl2, // user defined class 'anonymous_8081' MCK_SImm16, // user defined class 'anonymous_8082' MCK_SImm16lsl2, // user defined class 'anonymous_8083' MCK_SImm20, // user defined class 'anonymous_8084' MCK_SImm20pcalau12i, // user defined class 'anonymous_8085' MCK_SImm20lu12iw, // user defined class 'anonymous_8086' MCK_SImm20lu32id, // user defined class 'anonymous_8087' MCK_SImm20pcaddu18i, // user defined class 'anonymous_8088' MCK_SImm20pcaddi, // user defined class 'anonymous_8089' MCK_SImm21lsl2, // user defined class 'anonymous_8090' NumMatchClassKinds }; } // end anonymous namespace static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) { return MCTargetAsmParser::Match_InvalidOperand; } static MatchClassKind matchTokenString(StringRef Name) { return InvalidMatchClass; } /// isSubclass - Compute whether \p A is a subclass of \p B. static bool isSubclass(MatchClassKind A, MatchClassKind B) { if (A == B) return true; switch (A) { default: return false; case MCK_GPRT: return B == MCK_GPR; } } static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { LoongArchOperand &Operand = (LoongArchOperand &)GOp; if (Kind == InvalidMatchClass) return MCTargetAsmParser::Match_InvalidOperand; if (Operand.isToken() && Kind <= MCK_LAST_TOKEN) return isSubclass(matchTokenString(Operand.getToken()), Kind) ? MCTargetAsmParser::Match_Success : MCTargetAsmParser::Match_InvalidOperand; switch (Kind) { default: break; // 'AtomicMemAsmOperand' class case MCK_AtomicMemAsmOperand: { DiagnosticPredicate DP(Operand.isGPR()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; break; } // 'BareSymbol' class case MCK_BareSymbol: { DiagnosticPredicate DP(Operand.isBareSymbol()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidBareSymbol; break; } // 'Imm' class case MCK_Imm: { DiagnosticPredicate DP(Operand.isImm()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; break; } // 'SImm26OperandB' class case MCK_SImm26OperandB: { DiagnosticPredicate DP(Operand.isSImm26Operand()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm26Operand; break; } // 'SImm26OperandBL' class case MCK_SImm26OperandBL: { DiagnosticPredicate DP(Operand.isSImm26Operand()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm26Operand; break; } // 'TPRelAddSymbol' class case MCK_TPRelAddSymbol: { DiagnosticPredicate DP(Operand.isTPRelAddSymbol()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidTPRelAddSymbol; break; } // 'Imm32' class case MCK_Imm32: { DiagnosticPredicate DP(Operand.isImm32()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidImm32; break; } // 'Imm64' class case MCK_Imm64: { DiagnosticPredicate DP(Operand.isImm64()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidImm64; break; } // 'UImm1' class case MCK_UImm1: { DiagnosticPredicate DP(Operand.isUImm1()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm1; break; } // 'UImm2' class case MCK_UImm2: { DiagnosticPredicate DP(Operand.isUImm2()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm2; break; } // 'UImm2plus1' class case MCK_UImm2plus1: { DiagnosticPredicate DP(Operand.isUImm2plus1()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm2plus1; break; } // 'UImm3' class case MCK_UImm3: { DiagnosticPredicate DP(Operand.isUImm3()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm3; break; } // 'UImm4' class case MCK_UImm4: { DiagnosticPredicate DP(Operand.isUImm4()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm4; break; } // 'UImm5' class case MCK_UImm5: { DiagnosticPredicate DP(Operand.isUImm5()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm5; break; } // 'UImm6' class case MCK_UImm6: { DiagnosticPredicate DP(Operand.isUImm6()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm6; break; } // 'UImm7' class case MCK_UImm7: { DiagnosticPredicate DP(Operand.isUImm7()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm7; break; } // 'UImm8' class case MCK_UImm8: { DiagnosticPredicate DP(Operand.isUImm8()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm8; break; } // 'UImm12' class case MCK_UImm12: { DiagnosticPredicate DP(Operand.isUImm12()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm12; break; } // 'UImm12ori' class case MCK_UImm12ori: { DiagnosticPredicate DP(Operand.isUImm12ori()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm12ori; break; } // 'UImm14' class case MCK_UImm14: { DiagnosticPredicate DP(Operand.isUImm14()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm14; break; } // 'UImm15' class case MCK_UImm15: { DiagnosticPredicate DP(Operand.isUImm15()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidUImm15; break; } // 'SImm5' class case MCK_SImm5: { DiagnosticPredicate DP(Operand.isSImm5()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm5; break; } // 'SImm8' class case MCK_SImm8: { DiagnosticPredicate DP(Operand.isSImm8()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm8; break; } // 'SImm8lsl1' class case MCK_SImm8lsl1: { DiagnosticPredicate DP(Operand.isSImm8lsl1()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm8lsl1; break; } // 'SImm8lsl2' class case MCK_SImm8lsl2: { DiagnosticPredicate DP(Operand.isSImm8lsl2()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm8lsl2; break; } // 'SImm8lsl3' class case MCK_SImm8lsl3: { DiagnosticPredicate DP(Operand.isSImm8lsl3()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm8lsl3; break; } // 'SImm9lsl3' class case MCK_SImm9lsl3: { DiagnosticPredicate DP(Operand.isSImm9lsl3()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm9lsl3; break; } // 'SImm10' class case MCK_SImm10: { DiagnosticPredicate DP(Operand.isSImm10()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm10; break; } // 'SImm10lsl2' class case MCK_SImm10lsl2: { DiagnosticPredicate DP(Operand.isSImm10lsl2()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm10lsl2; break; } // 'SImm11lsl1' class case MCK_SImm11lsl1: { DiagnosticPredicate DP(Operand.isSImm11lsl1()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm11lsl1; break; } // 'SImm12' class case MCK_SImm12: { DiagnosticPredicate DP(Operand.isSImm12()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm12; break; } // 'SImm12addlike' class case MCK_SImm12addlike: { DiagnosticPredicate DP(Operand.isSImm12addlike()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm12addlike; break; } // 'SImm12lu52id' class case MCK_SImm12lu52id: { DiagnosticPredicate DP(Operand.isSImm12lu52id()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm12lu52id; break; } // 'SImm13' class case MCK_SImm13: { DiagnosticPredicate DP(Operand.isSImm13()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm13; break; } // 'SImm14lsl2' class case MCK_SImm14lsl2: { DiagnosticPredicate DP(Operand.isSImm14lsl2()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm14lsl2; break; } // 'SImm16' class case MCK_SImm16: { DiagnosticPredicate DP(Operand.isSImm16()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm16; break; } // 'SImm16lsl2' class case MCK_SImm16lsl2: { DiagnosticPredicate DP(Operand.isSImm16lsl2()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm16lsl2; break; } // 'SImm20' class case MCK_SImm20: { DiagnosticPredicate DP(Operand.isSImm20()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm20; break; } // 'SImm20pcalau12i' class case MCK_SImm20pcalau12i: { DiagnosticPredicate DP(Operand.isSImm20pcalau12i()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm20pcalau12i; break; } // 'SImm20lu12iw' class case MCK_SImm20lu12iw: { DiagnosticPredicate DP(Operand.isSImm20lu12iw()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm20lu12iw; break; } // 'SImm20lu32id' class case MCK_SImm20lu32id: { DiagnosticPredicate DP(Operand.isSImm20lu32id()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm20lu32id; break; } // 'SImm20pcaddu18i' class case MCK_SImm20pcaddu18i: { DiagnosticPredicate DP(Operand.isSImm20pcaddu18i()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm20pcaddu18i; break; } // 'SImm20pcaddi' class case MCK_SImm20pcaddi: { DiagnosticPredicate DP(Operand.isSImm20pcaddi()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm20pcaddi; break; } // 'SImm21lsl2' class case MCK_SImm21lsl2: { DiagnosticPredicate DP(Operand.isSImm21lsl2()); if (DP.isMatch()) return MCTargetAsmParser::Match_Success; if (DP.isNearMatch()) return LoongArchAsmParser::Match_InvalidSImm21lsl2; break; } } // end switch (Kind) if (Operand.isReg()) { MatchClassKind OpKind; switch (Operand.getReg().id()) { default: OpKind = InvalidMatchClass; break; case LoongArch::R0: OpKind = MCK_GPR; break; case LoongArch::R1: OpKind = MCK_GPR; break; case LoongArch::R2: OpKind = MCK_GPR; break; case LoongArch::R3: OpKind = MCK_GPR; break; case LoongArch::R4: OpKind = MCK_GPRT; break; case LoongArch::R5: OpKind = MCK_GPRT; break; case LoongArch::R6: OpKind = MCK_GPRT; break; case LoongArch::R7: OpKind = MCK_GPRT; break; case LoongArch::R8: OpKind = MCK_GPRT; break; case LoongArch::R9: OpKind = MCK_GPRT; break; case LoongArch::R10: OpKind = MCK_GPRT; break; case LoongArch::R11: OpKind = MCK_GPRT; break; case LoongArch::R12: OpKind = MCK_GPRT; break; case LoongArch::R13: OpKind = MCK_GPRT; break; case LoongArch::R14: OpKind = MCK_GPRT; break; case LoongArch::R15: OpKind = MCK_GPRT; break; case LoongArch::R16: OpKind = MCK_GPRT; break; case LoongArch::R17: OpKind = MCK_GPRT; break; case LoongArch::R18: OpKind = MCK_GPRT; break; case LoongArch::R19: OpKind = MCK_GPRT; break; case LoongArch::R20: OpKind = MCK_GPRT; break; case LoongArch::R21: OpKind = MCK_GPR; break; case LoongArch::R22: OpKind = MCK_GPR; break; case LoongArch::R23: OpKind = MCK_GPR; break; case LoongArch::R24: OpKind = MCK_GPR; break; case LoongArch::R25: OpKind = MCK_GPR; break; case LoongArch::R26: OpKind = MCK_GPR; break; case LoongArch::R27: OpKind = MCK_GPR; break; case LoongArch::R28: OpKind = MCK_GPR; break; case LoongArch::R29: OpKind = MCK_GPR; break; case LoongArch::R30: OpKind = MCK_GPR; break; case LoongArch::R31: OpKind = MCK_GPR; break; case LoongArch::F0: OpKind = MCK_FPR32; break; case LoongArch::F1: OpKind = MCK_FPR32; break; case LoongArch::F2: OpKind = MCK_FPR32; break; case LoongArch::F3: OpKind = MCK_FPR32; break; case LoongArch::F4: OpKind = MCK_FPR32; break; case LoongArch::F5: OpKind = MCK_FPR32; break; case LoongArch::F6: OpKind = MCK_FPR32; break; case LoongArch::F7: OpKind = MCK_FPR32; break; case LoongArch::F8: OpKind = MCK_FPR32; break; case LoongArch::F9: OpKind = MCK_FPR32; break; case LoongArch::F10: OpKind = MCK_FPR32; break; case LoongArch::F11: OpKind = MCK_FPR32; break; case LoongArch::F12: OpKind = MCK_FPR32; break; case LoongArch::F13: OpKind = MCK_FPR32; break; case LoongArch::F14: OpKind = MCK_FPR32; break; case LoongArch::F15: OpKind = MCK_FPR32; break; case LoongArch::F16: OpKind = MCK_FPR32; break; case LoongArch::F17: OpKind = MCK_FPR32; break; case LoongArch::F18: OpKind = MCK_FPR32; break; case LoongArch::F19: OpKind = MCK_FPR32; break; case LoongArch::F20: OpKind = MCK_FPR32; break; case LoongArch::F21: OpKind = MCK_FPR32; break; case LoongArch::F22: OpKind = MCK_FPR32; break; case LoongArch::F23: OpKind = MCK_FPR32; break; case LoongArch::F24: OpKind = MCK_FPR32; break; case LoongArch::F25: OpKind = MCK_FPR32; break; case LoongArch::F26: OpKind = MCK_FPR32; break; case LoongArch::F27: OpKind = MCK_FPR32; break; case LoongArch::F28: OpKind = MCK_FPR32; break; case LoongArch::F29: OpKind = MCK_FPR32; break; case LoongArch::F30: OpKind = MCK_FPR32; break; case LoongArch::F31: OpKind = MCK_FPR32; break; case LoongArch::F0_64: OpKind = MCK_FPR64; break; case LoongArch::F1_64: OpKind = MCK_FPR64; break; case LoongArch::F2_64: OpKind = MCK_FPR64; break; case LoongArch::F3_64: OpKind = MCK_FPR64; break; case LoongArch::F4_64: OpKind = MCK_FPR64; break; case LoongArch::F5_64: OpKind = MCK_FPR64; break; case LoongArch::F6_64: OpKind = MCK_FPR64; break; case LoongArch::F7_64: OpKind = MCK_FPR64; break; case LoongArch::F8_64: OpKind = MCK_FPR64; break; case LoongArch::F9_64: OpKind = MCK_FPR64; break; case LoongArch::F10_64: OpKind = MCK_FPR64; break; case LoongArch::F11_64: OpKind = MCK_FPR64; break; case LoongArch::F12_64: OpKind = MCK_FPR64; break; case LoongArch::F13_64: OpKind = MCK_FPR64; break; case LoongArch::F14_64: OpKind = MCK_FPR64; break; case LoongArch::F15_64: OpKind = MCK_FPR64; break; case LoongArch::F16_64: OpKind = MCK_FPR64; break; case LoongArch::F17_64: OpKind = MCK_FPR64; break; case LoongArch::F18_64: OpKind = MCK_FPR64; break; case LoongArch::F19_64: OpKind = MCK_FPR64; break; case LoongArch::F20_64: OpKind = MCK_FPR64; break; case LoongArch::F21_64: OpKind = MCK_FPR64; break; case LoongArch::F22_64: OpKind = MCK_FPR64; break; case LoongArch::F23_64: OpKind = MCK_FPR64; break; case LoongArch::F24_64: OpKind = MCK_FPR64; break; case LoongArch::F25_64: OpKind = MCK_FPR64; break; case LoongArch::F26_64: OpKind = MCK_FPR64; break; case LoongArch::F27_64: OpKind = MCK_FPR64; break; case LoongArch::F28_64: OpKind = MCK_FPR64; break; case LoongArch::F29_64: OpKind = MCK_FPR64; break; case LoongArch::F30_64: OpKind = MCK_FPR64; break; case LoongArch::F31_64: OpKind = MCK_FPR64; break; case LoongArch::FCC0: OpKind = MCK_CFR; break; case LoongArch::FCC1: OpKind = MCK_CFR; break; case LoongArch::FCC2: OpKind = MCK_CFR; break; case LoongArch::FCC3: OpKind = MCK_CFR; break; case LoongArch::FCC4: OpKind = MCK_CFR; break; case LoongArch::FCC5: OpKind = MCK_CFR; break; case LoongArch::FCC6: OpKind = MCK_CFR; break; case LoongArch::FCC7: OpKind = MCK_CFR; break; case LoongArch::FCSR0: OpKind = MCK_FCSR; break; case LoongArch::FCSR1: OpKind = MCK_FCSR; break; case LoongArch::FCSR2: OpKind = MCK_FCSR; break; case LoongArch::FCSR3: OpKind = MCK_FCSR; break; case LoongArch::VR0: OpKind = MCK_LSX128; break; case LoongArch::VR1: OpKind = MCK_LSX128; break; case LoongArch::VR2: OpKind = MCK_LSX128; break; case LoongArch::VR3: OpKind = MCK_LSX128; break; case LoongArch::VR4: OpKind = MCK_LSX128; break; case LoongArch::VR5: OpKind = MCK_LSX128; break; case LoongArch::VR6: OpKind = MCK_LSX128; break; case LoongArch::VR7: OpKind = MCK_LSX128; break; case LoongArch::VR8: OpKind = MCK_LSX128; break; case LoongArch::VR9: OpKind = MCK_LSX128; break; case LoongArch::VR10: OpKind = MCK_LSX128; break; case LoongArch::VR11: OpKind = MCK_LSX128; break; case LoongArch::VR12: OpKind = MCK_LSX128; break; case LoongArch::VR13: OpKind = MCK_LSX128; break; case LoongArch::VR14: OpKind = MCK_LSX128; break; case LoongArch::VR15: OpKind = MCK_LSX128; break; case LoongArch::VR16: OpKind = MCK_LSX128; break; case LoongArch::VR17: OpKind = MCK_LSX128; break; case LoongArch::VR18: OpKind = MCK_LSX128; break; case LoongArch::VR19: OpKind = MCK_LSX128; break; case LoongArch::VR20: OpKind = MCK_LSX128; break; case LoongArch::VR21: OpKind = MCK_LSX128; break; case LoongArch::VR22: OpKind = MCK_LSX128; break; case LoongArch::VR23: OpKind = MCK_LSX128; break; case LoongArch::VR24: OpKind = MCK_LSX128; break; case LoongArch::VR25: OpKind = MCK_LSX128; break; case LoongArch::VR26: OpKind = MCK_LSX128; break; case LoongArch::VR27: OpKind = MCK_LSX128; break; case LoongArch::VR28: OpKind = MCK_LSX128; break; case LoongArch::VR29: OpKind = MCK_LSX128; break; case LoongArch::VR30: OpKind = MCK_LSX128; break; case LoongArch::VR31: OpKind = MCK_LSX128; break; case LoongArch::XR0: OpKind = MCK_LASX256; break; case LoongArch::XR1: OpKind = MCK_LASX256; break; case LoongArch::XR2: OpKind = MCK_LASX256; break; case LoongArch::XR3: OpKind = MCK_LASX256; break; case LoongArch::XR4: OpKind = MCK_LASX256; break; case LoongArch::XR5: OpKind = MCK_LASX256; break; case LoongArch::XR6: OpKind = MCK_LASX256; break; case LoongArch::XR7: OpKind = MCK_LASX256; break; case LoongArch::XR8: OpKind = MCK_LASX256; break; case LoongArch::XR9: OpKind = MCK_LASX256; break; case LoongArch::XR10: OpKind = MCK_LASX256; break; case LoongArch::XR11: OpKind = MCK_LASX256; break; case LoongArch::XR12: OpKind = MCK_LASX256; break; case LoongArch::XR13: OpKind = MCK_LASX256; break; case LoongArch::XR14: OpKind = MCK_LASX256; break; case LoongArch::XR15: OpKind = MCK_LASX256; break; case LoongArch::XR16: OpKind = MCK_LASX256; break; case LoongArch::XR17: OpKind = MCK_LASX256; break; case LoongArch::XR18: OpKind = MCK_LASX256; break; case LoongArch::XR19: OpKind = MCK_LASX256; break; case LoongArch::XR20: OpKind = MCK_LASX256; break; case LoongArch::XR21: OpKind = MCK_LASX256; break; case LoongArch::XR22: OpKind = MCK_LASX256; break; case LoongArch::XR23: OpKind = MCK_LASX256; break; case LoongArch::XR24: OpKind = MCK_LASX256; break; case LoongArch::XR25: OpKind = MCK_LASX256; break; case LoongArch::XR26: OpKind = MCK_LASX256; break; case LoongArch::XR27: OpKind = MCK_LASX256; break; case LoongArch::XR28: OpKind = MCK_LASX256; break; case LoongArch::XR29: OpKind = MCK_LASX256; break; case LoongArch::XR30: OpKind = MCK_LASX256; break; case LoongArch::XR31: OpKind = MCK_LASX256; break; case LoongArch::SCR0: OpKind = MCK_SCR; break; case LoongArch::SCR1: OpKind = MCK_SCR; break; case LoongArch::SCR2: OpKind = MCK_SCR; break; case LoongArch::SCR3: OpKind = MCK_SCR; break; } return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success : getDiagKindFromRegisterClass(Kind); } if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER) return getDiagKindFromRegisterClass(Kind); return MCTargetAsmParser::Match_InvalidOperand; } #ifndef NDEBUG const char *getMatchClassName(MatchClassKind Kind) { switch (Kind) { case InvalidMatchClass: return "InvalidMatchClass"; case OptionalMatchClass: return "OptionalMatchClass"; case MCK_FCSR: return "MCK_FCSR"; case MCK_SCR: return "MCK_SCR"; case MCK_CFR: return "MCK_CFR"; case MCK_GPRT: return "MCK_GPRT"; case MCK_FPR32: return "MCK_FPR32"; case MCK_FPR64: return "MCK_FPR64"; case MCK_GPR: return "MCK_GPR"; case MCK_LASX256: return "MCK_LASX256"; case MCK_LSX128: return "MCK_LSX128"; case MCK_AtomicMemAsmOperand: return "MCK_AtomicMemAsmOperand"; case MCK_BareSymbol: return "MCK_BareSymbol"; case MCK_Imm: return "MCK_Imm"; case MCK_SImm26OperandB: return "MCK_SImm26OperandB"; case MCK_SImm26OperandBL: return "MCK_SImm26OperandBL"; case MCK_TPRelAddSymbol: return "MCK_TPRelAddSymbol"; case MCK_Imm32: return "MCK_Imm32"; case MCK_Imm64: return "MCK_Imm64"; case MCK_UImm1: return "MCK_UImm1"; case MCK_UImm2: return "MCK_UImm2"; case MCK_UImm2plus1: return "MCK_UImm2plus1"; case MCK_UImm3: return "MCK_UImm3"; case MCK_UImm4: return "MCK_UImm4"; case MCK_UImm5: return "MCK_UImm5"; case MCK_UImm6: return "MCK_UImm6"; case MCK_UImm7: return "MCK_UImm7"; case MCK_UImm8: return "MCK_UImm8"; case MCK_UImm12: return "MCK_UImm12"; case MCK_UImm12ori: return "MCK_UImm12ori"; case MCK_UImm14: return "MCK_UImm14"; case MCK_UImm15: return "MCK_UImm15"; case MCK_SImm5: return "MCK_SImm5"; case MCK_SImm8: return "MCK_SImm8"; case MCK_SImm8lsl1: return "MCK_SImm8lsl1"; case MCK_SImm8lsl2: return "MCK_SImm8lsl2"; case MCK_SImm8lsl3: return "MCK_SImm8lsl3"; case MCK_SImm9lsl3: return "MCK_SImm9lsl3"; case MCK_SImm10: return "MCK_SImm10"; case MCK_SImm10lsl2: return "MCK_SImm10lsl2"; case MCK_SImm11lsl1: return "MCK_SImm11lsl1"; case MCK_SImm12: return "MCK_SImm12"; case MCK_SImm12addlike: return "MCK_SImm12addlike"; case MCK_SImm12lu52id: return "MCK_SImm12lu52id"; case MCK_SImm13: return "MCK_SImm13"; case MCK_SImm14lsl2: return "MCK_SImm14lsl2"; case MCK_SImm16: return "MCK_SImm16"; case MCK_SImm16lsl2: return "MCK_SImm16lsl2"; case MCK_SImm20: return "MCK_SImm20"; case MCK_SImm20pcalau12i: return "MCK_SImm20pcalau12i"; case MCK_SImm20lu12iw: return "MCK_SImm20lu12iw"; case MCK_SImm20lu32id: return "MCK_SImm20lu32id"; case MCK_SImm20pcaddu18i: return "MCK_SImm20pcaddu18i"; case MCK_SImm20pcaddi: return "MCK_SImm20pcaddi"; case MCK_SImm21lsl2: return "MCK_SImm21lsl2"; case NumMatchClassKinds: return "NumMatchClassKinds"; } llvm_unreachable("unhandled MatchClassKind!"); } #endif // NDEBUG FeatureBitset LoongArchAsmParser:: ComputeAvailableFeatures(const FeatureBitset &FB) const { FeatureBitset Features; if (FB[LoongArch::Feature64Bit]) Features.set(Feature_IsLA64Bit); if (!FB[LoongArch::Feature64Bit]) Features.set(Feature_IsLA32Bit); if (FB[LoongArch::LaGlobalWithPcrel]) Features.set(Feature_HasLaGlobalWithPcrelBit); if (FB[LoongArch::LaGlobalWithAbs]) Features.set(Feature_HasLaGlobalWithAbsBit); if (FB[LoongArch::LaLocalWithAbs]) Features.set(Feature_HasLaLocalWithAbsBit); return Features; } static bool checkAsmTiedOperandConstraints(const LoongArchAsmParser&AsmParser, unsigned Kind, const OperandVector &Operands, uint64_t &ErrorInfo) { assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); const uint8_t *Converter = ConversionTable[Kind]; for (const uint8_t *p = Converter; *p; p += 2) { switch (*p) { case CVT_Tied: { unsigned OpIdx = *(p + 1); assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - std::begin(TiedAsmOperandTable)) && "Tied operand not found"); unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1]; unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2]; if (OpndNum1 != OpndNum2) { auto &SrcOp1 = Operands[OpndNum1]; auto &SrcOp2 = Operands[OpndNum2]; if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) { ErrorInfo = OpndNum2; return false; } } break; } default: break; } } return true; } static const char MnemonicTable[] = "\005adc.b\005adc.d\005adc.h\005adc.w\005add.d\005add.w\006addi.d\006add" "i.w\taddu12i.d\taddu12i.w\taddu16i.d\006alsl.d\006alsl.w\007alsl.wu\007" "amadd.b\007amadd.d\007amadd.h\007amadd.w\namadd_db.b\namadd_db.d\namadd" "_db.h\namadd_db.w\007amand.d\007amand.w\namand_db.d\namand_db.w\007amca" "s.b\007amcas.d\007amcas.h\007amcas.w\namcas_db.b\namcas_db.d\namcas_db." "h\namcas_db.w\007ammax.d\010ammax.du\007ammax.w\010ammax.wu\nammax_db.d" "\013ammax_db.du\nammax_db.w\013ammax_db.wu\007ammin.d\010ammin.du\007am" "min.w\010ammin.wu\nammin_db.d\013ammin_db.du\nammin_db.w\013ammin_db.wu" "\006amor.d\006amor.w\tamor_db.d\tamor_db.w\010amswap.b\010amswap.d\010a" "mswap.h\010amswap.w\013amswap_db.b\013amswap_db.d\013amswap_db.h\013ams" "wap_db.w\007amxor.d\007amxor.w\namxor_db.d\namxor_db.w\003and\004andi\004" "andn\010armadc.w\010armadd.w\010armand.w\tarmmfflag\010armmov.d\010armm" "ov.w\007armmove\tarmmtflag\010armnot.w\007armor.w\tarmrotr.w\narmrotri." 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"w\010xvsrli.b\010xvsrli.d\010xvsrli.h\010xvsrli.w\nxvsrln.b.h\nxvsrln.h" ".w\nxvsrln.w.d\013xvsrlni.b.h\013xvsrlni.d.q\013xvsrlni.h.w\013xvsrlni." "w.d\010xvsrlr.b\010xvsrlr.d\010xvsrlr.h\010xvsrlr.w\txvsrlri.b\txvsrlri" ".d\txvsrlri.h\txvsrlri.w\013xvsrlrn.b.h\013xvsrlrn.h.w\013xvsrlrn.w.d\014" "xvsrlrni.b.h\014xvsrlrni.d.q\014xvsrlrni.h.w\014xvsrlrni.w.d\013xvssran" ".b.h\014xvssran.bu.h\013xvssran.h.w\014xvssran.hu.w\013xvssran.w.d\014x" "vssran.wu.d\014xvssrani.b.h\015xvssrani.bu.h\014xvssrani.d.q\015xvssran" "i.du.q\014xvssrani.h.w\015xvssrani.hu.w\014xvssrani.w.d\015xvssrani.wu." "d\014xvssrarn.b.h\015xvssrarn.bu.h\014xvssrarn.h.w\015xvssrarn.hu.w\014" "xvssrarn.w.d\015xvssrarn.wu.d\015xvssrarni.b.h\016xvssrarni.bu.h\015xvs" "srarni.d.q\016xvssrarni.du.q\015xvssrarni.h.w\016xvssrarni.hu.w\015xvss" "rarni.w.d\016xvssrarni.wu.d\013xvssrln.b.h\014xvssrln.bu.h\013xvssrln.h" ".w\014xvssrln.hu.w\013xvssrln.w.d\014xvssrln.wu.d\014xvssrlni.b.h\015xv" "ssrlni.bu.h\014xvssrlni.d.q\015xvssrlni.du.q\014xvssrlni.h.w\015xvssrln" "i.hu.w\014xvssrlni.w.d\015xvssrlni.wu.d\014xvssrlrn.b.h\015xvssrlrn.bu." "h\014xvssrlrn.h.w\015xvssrlrn.hu.w\014xvssrlrn.w.d\015xvssrlrn.wu.d\015" "xvssrlrni.b.h\016xvssrlrni.bu.h\015xvssrlrni.d.q\016xvssrlrni.du.q\015x" "vssrlrni.h.w\016xvssrlrni.hu.w\015xvssrlrni.w.d\016xvssrlrni.wu.d\010xv" "ssub.b\txvssub.bu\010xvssub.d\txvssub.du\010xvssub.h\txvssub.hu\010xvss" "ub.w\txvssub.wu\004xvst\txvstelm.b\txvstelm.d\txvstelm.h\txvstelm.w\005" "xvstx\007xvsub.b\007xvsub.d\007xvsub.h\007xvsub.q\007xvsub.w\txvsubi.bu" "\txvsubi.du\txvsubi.hu\txvsubi.wu\014xvsubwev.d.w\015xvsubwev.d.wu\014x" "vsubwev.h.b\015xvsubwev.h.bu\014xvsubwev.q.d\015xvsubwev.q.du\014xvsubw" "ev.w.h\015xvsubwev.w.hu\014xvsubwod.d.w\015xvsubwod.d.wu\014xvsubwod.h." "b\015xvsubwod.h.bu\014xvsubwod.q.d\015xvsubwod.q.du\014xvsubwod.w.h\015" "xvsubwod.w.hu\007xvxor.v\010xvxori.b"; // Feature bitsets. enum : uint8_t { AMFBS_None, AMFBS_HasLaGlobalWithAbs, AMFBS_HasLaGlobalWithPcrel, AMFBS_HasLaLocalWithAbs, AMFBS_IsLA32, AMFBS_IsLA64, AMFBS_IsLA32_HasLaGlobalWithAbs, AMFBS_IsLA64_HasLaGlobalWithAbs, }; static constexpr FeatureBitset FeatureBitsets[] = { {}, // AMFBS_None {Feature_HasLaGlobalWithAbsBit, }, {Feature_HasLaGlobalWithPcrelBit, }, {Feature_HasLaLocalWithAbsBit, }, {Feature_IsLA32Bit, }, {Feature_IsLA64Bit, }, {Feature_IsLA32Bit, Feature_HasLaGlobalWithAbsBit, }, {Feature_IsLA64Bit, Feature_HasLaGlobalWithAbsBit, }, }; namespace { struct MatchEntry { uint16_t Mnemonic; uint16_t Opcode; uint8_t ConvertFn; uint8_t RequiredFeaturesIdx; uint8_t Classes[4]; StringRef getMnemonic() const { return StringRef(MnemonicTable + Mnemonic + 1, MnemonicTable[Mnemonic]); } }; // Predicate for searching for an opcode. struct LessOpcode { bool operator()(const MatchEntry &LHS, StringRef RHS) { return LHS.getMnemonic() < RHS; } bool operator()(StringRef LHS, const MatchEntry &RHS) { return LHS < RHS.getMnemonic(); } bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { return LHS.getMnemonic() < RHS.getMnemonic(); } }; } // end anonymous namespace static const MatchEntry MatchTable0[] = { { 0 /* adc.b */, LoongArch::ADC_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 6 /* adc.d */, LoongArch::ADC_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 12 /* adc.h */, LoongArch::ADC_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 18 /* adc.w */, LoongArch::ADC_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 24 /* add.d */, LoongArch::ADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 24 /* add.d */, LoongArch::PseudoAddTPRel_D, Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_TPRelAddSymbol }, }, { 30 /* add.w */, LoongArch::ADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 30 /* add.w */, LoongArch::PseudoAddTPRel_W, Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3, AMFBS_IsLA32, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_TPRelAddSymbol }, }, { 36 /* addi.d */, LoongArch::ADDI_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 43 /* addi.w */, LoongArch::ADDI_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 50 /* addu12i.d */, LoongArch::ADDU12I_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm5 }, }, { 60 /* addu12i.w */, LoongArch::ADDU12I_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm5 }, }, { 70 /* addu16i.d */, LoongArch::ADDU16I_D, Convert__Reg1_0__Reg1_1__SImm161_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm16 }, }, { 80 /* alsl.d */, LoongArch::ALSL_D, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, }, { 87 /* alsl.w */, LoongArch::ALSL_W, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, }, { 94 /* alsl.wu */, LoongArch::ALSL_WU, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, }, { 102 /* amadd.b */, LoongArch::AMADD_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 110 /* amadd.d */, LoongArch::AMADD_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 118 /* amadd.h */, LoongArch::AMADD_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 126 /* amadd.w */, LoongArch::AMADD_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 134 /* amadd_db.b */, LoongArch::AMADD__DB_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 145 /* amadd_db.d */, LoongArch::AMADD__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 156 /* amadd_db.h */, LoongArch::AMADD__DB_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 167 /* amadd_db.w */, LoongArch::AMADD__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 178 /* amand.d */, LoongArch::AMAND_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 186 /* amand.w */, LoongArch::AMAND_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 194 /* amand_db.d */, LoongArch::AMAND__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 205 /* amand_db.w */, LoongArch::AMAND__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 216 /* amcas.b */, LoongArch::AMCAS_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 224 /* amcas.d */, LoongArch::AMCAS_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 232 /* amcas.h */, LoongArch::AMCAS_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 240 /* amcas.w */, LoongArch::AMCAS_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 248 /* amcas_db.b */, LoongArch::AMCAS__DB_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 259 /* amcas_db.d */, LoongArch::AMCAS__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 270 /* amcas_db.h */, LoongArch::AMCAS__DB_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 281 /* amcas_db.w */, LoongArch::AMCAS__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 292 /* ammax.d */, LoongArch::AMMAX_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 300 /* ammax.du */, LoongArch::AMMAX_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 309 /* ammax.w */, LoongArch::AMMAX_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 317 /* ammax.wu */, LoongArch::AMMAX_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 326 /* ammax_db.d */, LoongArch::AMMAX__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 337 /* ammax_db.du */, LoongArch::AMMAX__DB_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 349 /* ammax_db.w */, LoongArch::AMMAX__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 360 /* ammax_db.wu */, LoongArch::AMMAX__DB_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 372 /* ammin.d */, LoongArch::AMMIN_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 380 /* ammin.du */, LoongArch::AMMIN_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 389 /* ammin.w */, LoongArch::AMMIN_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 397 /* ammin.wu */, LoongArch::AMMIN_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 406 /* ammin_db.d */, LoongArch::AMMIN__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 417 /* ammin_db.du */, LoongArch::AMMIN__DB_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 429 /* ammin_db.w */, LoongArch::AMMIN__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 440 /* ammin_db.wu */, LoongArch::AMMIN__DB_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 452 /* amor.d */, LoongArch::AMOR_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 459 /* amor.w */, LoongArch::AMOR_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 466 /* amor_db.d */, LoongArch::AMOR__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 476 /* amor_db.w */, LoongArch::AMOR__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 486 /* amswap.b */, LoongArch::AMSWAP_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 495 /* amswap.d */, LoongArch::AMSWAP_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 504 /* amswap.h */, LoongArch::AMSWAP_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 513 /* amswap.w */, LoongArch::AMSWAP_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 522 /* amswap_db.b */, LoongArch::AMSWAP__DB_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 534 /* amswap_db.d */, LoongArch::AMSWAP__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 546 /* amswap_db.h */, LoongArch::AMSWAP__DB_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 558 /* amswap_db.w */, LoongArch::AMSWAP__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 570 /* amxor.d */, LoongArch::AMXOR_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 578 /* amxor.w */, LoongArch::AMXOR_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 586 /* amxor_db.d */, LoongArch::AMXOR__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 597 /* amxor_db.w */, LoongArch::AMXOR__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, { 608 /* and */, LoongArch::AND, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 612 /* andi */, LoongArch::ANDI, Convert__Reg1_0__Reg1_1__UImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12 }, }, { 617 /* andn */, LoongArch::ANDN, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 622 /* armadc.w */, LoongArch::ARMADC_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 631 /* armadd.w */, LoongArch::ARMADD_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 640 /* armand.w */, LoongArch::ARMAND_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 649 /* armmfflag */, LoongArch::ARMMFFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, }, { 659 /* armmov.d */, LoongArch::ARMMOV_D, Convert__Reg1_0__UImm41_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm4 }, }, { 668 /* armmov.w */, LoongArch::ARMMOV_W, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 677 /* armmove */, LoongArch::ARMMOVE, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 685 /* armmtflag */, LoongArch::ARMMTFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, }, { 695 /* armnot.w */, LoongArch::ARMNOT_W, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 704 /* armor.w */, LoongArch::ARMOR_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 712 /* armrotr.w */, LoongArch::ARMROTR_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 722 /* armrotri.w */, LoongArch::ARMROTRI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, }, { 733 /* armrrx.w */, LoongArch::ARMRRX_W, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 742 /* armsbc.w */, LoongArch::ARMSBC_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 751 /* armsll.w */, LoongArch::ARMSLL_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 760 /* armslli.w */, LoongArch::ARMSLLI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, }, { 770 /* armsra.w */, LoongArch::ARMSRA_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 779 /* armsrai.w */, LoongArch::ARMSRAI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, }, { 789 /* armsrl.w */, LoongArch::ARMSRL_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 798 /* armsrli.w */, LoongArch::ARMSRLI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, }, { 808 /* armsub.w */, LoongArch::ARMSUB_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 817 /* armxor.w */, LoongArch::ARMXOR_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 826 /* asrtgt.d */, LoongArch::ASRTGT_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 835 /* asrtle.d */, LoongArch::ASRTLE_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 844 /* b */, LoongArch::B, Convert__SImm26OperandB1_0, AMFBS_None, { MCK_SImm26OperandB }, }, { 846 /* bceqz */, LoongArch::BCEQZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_CFR, MCK_SImm21lsl2 }, }, { 852 /* bcnez */, LoongArch::BCNEZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_CFR, MCK_SImm21lsl2 }, }, { 858 /* beq */, LoongArch::BEQ, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, { 862 /* beqz */, LoongArch::BEQZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm21lsl2 }, }, { 867 /* bge */, LoongArch::BGE, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, { 871 /* bgeu */, LoongArch::BGEU, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, { 876 /* bgez */, LoongArch::BGE, Convert__Reg1_0__regR0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, }, { 881 /* bgt */, LoongArch::BLT, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, { 885 /* bgtu */, LoongArch::BLTU, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, { 890 /* bgtz */, LoongArch::BLT, Convert__regR0__Reg1_0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, }, { 895 /* bitrev.4b */, LoongArch::BITREV_4B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 905 /* bitrev.8b */, LoongArch::BITREV_8B, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 915 /* bitrev.d */, LoongArch::BITREV_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 924 /* bitrev.w */, LoongArch::BITREV_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 933 /* bl */, LoongArch::BL, Convert__SImm26OperandBL1_0, AMFBS_None, { MCK_SImm26OperandBL }, }, { 936 /* ble */, LoongArch::BGE, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, { 940 /* bleu */, LoongArch::BGEU, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, { 945 /* blez */, LoongArch::BGE, Convert__regR0__Reg1_0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, }, { 950 /* blt */, LoongArch::BLT, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, { 954 /* bltu */, LoongArch::BLTU, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, { 959 /* bltz */, LoongArch::BLT, Convert__Reg1_0__regR0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, }, { 964 /* bne */, LoongArch::BNE, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, { 968 /* bnez */, LoongArch::BNEZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm21lsl2 }, }, { 973 /* break */, LoongArch::BREAK, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, { 979 /* bstrins.d */, LoongArch::BSTRINS_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6, MCK_UImm6 }, }, { 989 /* bstrins.w */, LoongArch::BSTRINS_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5, MCK_UImm5 }, }, { 999 /* bstrpick.d */, LoongArch::BSTRPICK_D, Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6, MCK_UImm6 }, }, { 1010 /* bstrpick.w */, LoongArch::BSTRPICK_W, Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5, MCK_UImm5 }, }, { 1021 /* bytepick.d */, LoongArch::BYTEPICK_D, Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm3 }, }, { 1032 /* bytepick.w */, LoongArch::BYTEPICK_W, Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2 }, }, { 1043 /* cacop */, LoongArch::CACOP, Convert__UImm51_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_SImm12 }, }, { 1049 /* call36 */, LoongArch::PseudoCALL36, Convert__BareSymbol1_0, AMFBS_IsLA64, { MCK_BareSymbol }, }, { 1056 /* clo.d */, LoongArch::CLO_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 1062 /* clo.w */, LoongArch::CLO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 1068 /* clz.d */, LoongArch::CLZ_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 1074 /* clz.w */, LoongArch::CLZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 1080 /* cpucfg */, LoongArch::CPUCFG, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 1087 /* crc.w.b.w */, LoongArch::CRC_W_B_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1097 /* crc.w.d.w */, LoongArch::CRC_W_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1107 /* crc.w.h.w */, LoongArch::CRC_W_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1117 /* crc.w.w.w */, LoongArch::CRC_W_W_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1127 /* crcc.w.b.w */, LoongArch::CRCC_W_B_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1138 /* crcc.w.d.w */, LoongArch::CRCC_W_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1149 /* crcc.w.h.w */, LoongArch::CRCC_W_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1160 /* crcc.w.w.w */, LoongArch::CRCC_W_W_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1171 /* csrrd */, LoongArch::CSRRD, Convert__Reg1_0__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, }, { 1177 /* csrwr */, LoongArch::CSRWR, Convert__Reg1_0__Tie0_1_1__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, }, { 1183 /* csrxchg */, LoongArch::CSRXCHG, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm14 }, }, { 1191 /* cto.d */, LoongArch::CTO_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 1197 /* cto.w */, LoongArch::CTO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 1203 /* ctz.d */, LoongArch::CTZ_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 1209 /* ctz.w */, LoongArch::CTZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 1215 /* dbar */, LoongArch::DBAR, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, { 1220 /* dbcl */, LoongArch::DBCL, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, { 1225 /* div.d */, LoongArch::DIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1231 /* div.du */, LoongArch::DIV_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1238 /* div.w */, LoongArch::DIV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1244 /* div.wu */, LoongArch::DIV_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 1251 /* ertn */, LoongArch::ERTN, Convert_NoOperands, AMFBS_None, { }, }, { 1256 /* ext.w.b */, LoongArch::EXT_W_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 1264 /* ext.w.h */, LoongArch::EXT_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 1272 /* fabs.d */, LoongArch::FABS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 1279 /* fabs.s */, LoongArch::FABS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 1286 /* fadd.d */, LoongArch::FADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 1293 /* fadd.s */, LoongArch::FADD_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 1300 /* fclass.d */, LoongArch::FCLASS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 1309 /* fclass.s */, LoongArch::FCLASS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 1318 /* fcmp.caf.d */, LoongArch::FCMP_CAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1329 /* fcmp.caf.s */, LoongArch::FCMP_CAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1340 /* fcmp.ceq.d */, LoongArch::FCMP_CEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1351 /* fcmp.ceq.s */, LoongArch::FCMP_CEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1362 /* fcmp.cle.d */, LoongArch::FCMP_CLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1373 /* fcmp.cle.s */, LoongArch::FCMP_CLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1384 /* fcmp.clt.d */, LoongArch::FCMP_CLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1395 /* fcmp.clt.s */, LoongArch::FCMP_CLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1406 /* fcmp.cne.d */, LoongArch::FCMP_CNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1417 /* fcmp.cne.s */, LoongArch::FCMP_CNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1428 /* fcmp.cor.d */, LoongArch::FCMP_COR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1439 /* fcmp.cor.s */, LoongArch::FCMP_COR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1450 /* fcmp.cueq.d */, LoongArch::FCMP_CUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1462 /* fcmp.cueq.s */, LoongArch::FCMP_CUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1474 /* fcmp.cule.d */, LoongArch::FCMP_CULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1486 /* fcmp.cule.s */, LoongArch::FCMP_CULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1498 /* fcmp.cult.d */, LoongArch::FCMP_CULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1510 /* fcmp.cult.s */, LoongArch::FCMP_CULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1522 /* fcmp.cun.d */, LoongArch::FCMP_CUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1533 /* fcmp.cun.s */, LoongArch::FCMP_CUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1544 /* fcmp.cune.d */, LoongArch::FCMP_CUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1556 /* fcmp.cune.s */, LoongArch::FCMP_CUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1568 /* fcmp.saf.d */, LoongArch::FCMP_SAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1579 /* fcmp.saf.s */, LoongArch::FCMP_SAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1590 /* fcmp.seq.d */, LoongArch::FCMP_SEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1601 /* fcmp.seq.s */, LoongArch::FCMP_SEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1612 /* fcmp.sle.d */, LoongArch::FCMP_SLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1623 /* fcmp.sle.s */, LoongArch::FCMP_SLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1634 /* fcmp.slt.d */, LoongArch::FCMP_SLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1645 /* fcmp.slt.s */, LoongArch::FCMP_SLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1656 /* fcmp.sne.d */, LoongArch::FCMP_SNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1667 /* fcmp.sne.s */, LoongArch::FCMP_SNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1678 /* fcmp.sor.d */, LoongArch::FCMP_SOR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1689 /* fcmp.sor.s */, LoongArch::FCMP_SOR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1700 /* fcmp.sueq.d */, LoongArch::FCMP_SUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1712 /* fcmp.sueq.s */, LoongArch::FCMP_SUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1724 /* fcmp.sule.d */, LoongArch::FCMP_SULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1736 /* fcmp.sule.s */, LoongArch::FCMP_SULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1748 /* fcmp.sult.d */, LoongArch::FCMP_SULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1760 /* fcmp.sult.s */, LoongArch::FCMP_SULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1772 /* fcmp.sun.d */, LoongArch::FCMP_SUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1783 /* fcmp.sun.s */, LoongArch::FCMP_SUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1794 /* fcmp.sune.d */, LoongArch::FCMP_SUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, { 1806 /* fcmp.sune.s */, LoongArch::FCMP_SUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, { 1818 /* fcopysign.d */, LoongArch::FCOPYSIGN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 1830 /* fcopysign.s */, LoongArch::FCOPYSIGN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 1842 /* fcvt.d.ld */, LoongArch::FCVT_D_LD, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 1852 /* fcvt.d.s */, LoongArch::FCVT_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, }, { 1861 /* fcvt.ld.d */, LoongArch::FCVT_LD_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 1871 /* fcvt.s.d */, LoongArch::FCVT_S_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, }, { 1880 /* fcvt.ud.d */, LoongArch::FCVT_UD_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 1890 /* fdiv.d */, LoongArch::FDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 1897 /* fdiv.s */, LoongArch::FDIV_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 1904 /* ffint.d.l */, LoongArch::FFINT_D_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 1914 /* ffint.d.w */, LoongArch::FFINT_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, }, { 1924 /* ffint.s.l */, LoongArch::FFINT_S_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, }, { 1934 /* ffint.s.w */, LoongArch::FFINT_S_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 1944 /* fld.d */, LoongArch::FLD_D, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_SImm12 }, }, { 1950 /* fld.s */, LoongArch::FLD_S, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_SImm12 }, }, { 1956 /* fldgt.d */, LoongArch::FLDGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, { 1964 /* fldgt.s */, LoongArch::FLDGT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, { 1972 /* fldle.d */, LoongArch::FLDLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, { 1980 /* fldle.s */, LoongArch::FLDLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, { 1988 /* fldx.d */, LoongArch::FLDX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, { 1995 /* fldx.s */, LoongArch::FLDX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, { 2002 /* flogb.d */, LoongArch::FLOGB_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2010 /* flogb.s */, LoongArch::FLOGB_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2018 /* fmadd.d */, LoongArch::FMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 2026 /* fmadd.s */, LoongArch::FMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 2034 /* fmax.d */, LoongArch::FMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 2041 /* fmax.s */, LoongArch::FMAX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 2048 /* fmaxa.d */, LoongArch::FMAXA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 2056 /* fmaxa.s */, LoongArch::FMAXA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 2064 /* fmin.d */, LoongArch::FMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 2071 /* fmin.s */, LoongArch::FMIN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 2078 /* fmina.d */, LoongArch::FMINA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 2086 /* fmina.s */, LoongArch::FMINA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 2094 /* fmov.d */, LoongArch::FMOV_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2101 /* fmov.s */, LoongArch::FMOV_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2108 /* fmsub.d */, LoongArch::FMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 2116 /* fmsub.s */, LoongArch::FMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 2124 /* fmul.d */, LoongArch::FMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 2131 /* fmul.s */, LoongArch::FMUL_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 2138 /* fneg.d */, LoongArch::FNEG_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2145 /* fneg.s */, LoongArch::FNEG_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2152 /* fnmadd.d */, LoongArch::FNMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 2161 /* fnmadd.s */, LoongArch::FNMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 2170 /* fnmsub.d */, LoongArch::FNMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 2179 /* fnmsub.s */, LoongArch::FNMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 2188 /* frecip.d */, LoongArch::FRECIP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2197 /* frecip.s */, LoongArch::FRECIP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2206 /* frecipe.d */, LoongArch::FRECIPE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2216 /* frecipe.s */, LoongArch::FRECIPE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2226 /* frint.d */, LoongArch::FRINT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2234 /* frint.s */, LoongArch::FRINT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2242 /* frsqrt.d */, LoongArch::FRSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2251 /* frsqrt.s */, LoongArch::FRSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2260 /* frsqrte.d */, LoongArch::FRSQRTE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2270 /* frsqrte.s */, LoongArch::FRSQRTE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2280 /* fscaleb.d */, LoongArch::FSCALEB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 2290 /* fscaleb.s */, LoongArch::FSCALEB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 2300 /* fsel */, LoongArch::FSEL_xS, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_CFR }, }, { 2305 /* fsqrt.d */, LoongArch::FSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2313 /* fsqrt.s */, LoongArch::FSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2321 /* fst.d */, LoongArch::FST_D, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_SImm12 }, }, { 2327 /* fst.s */, LoongArch::FST_S, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_SImm12 }, }, { 2333 /* fstgt.d */, LoongArch::FSTGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, { 2341 /* fstgt.s */, LoongArch::FSTGT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, { 2349 /* fstle.d */, LoongArch::FSTLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, { 2357 /* fstle.s */, LoongArch::FSTLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, { 2365 /* fstx.d */, LoongArch::FSTX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, { 2372 /* fstx.s */, LoongArch::FSTX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, { 2379 /* fsub.d */, LoongArch::FSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, { 2386 /* fsub.s */, LoongArch::FSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, { 2393 /* ftint.l.d */, LoongArch::FTINT_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2403 /* ftint.l.s */, LoongArch::FTINT_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, }, { 2413 /* ftint.w.d */, LoongArch::FTINT_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, }, { 2423 /* ftint.w.s */, LoongArch::FTINT_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2433 /* ftintrm.l.d */, LoongArch::FTINTRM_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2445 /* ftintrm.l.s */, LoongArch::FTINTRM_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, }, { 2457 /* ftintrm.w.d */, LoongArch::FTINTRM_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, }, { 2469 /* ftintrm.w.s */, LoongArch::FTINTRM_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2481 /* ftintrne.l.d */, LoongArch::FTINTRNE_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2494 /* ftintrne.l.s */, LoongArch::FTINTRNE_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, }, { 2507 /* ftintrne.w.d */, LoongArch::FTINTRNE_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, }, { 2520 /* ftintrne.w.s */, LoongArch::FTINTRNE_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2533 /* ftintrp.l.d */, LoongArch::FTINTRP_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2545 /* ftintrp.l.s */, LoongArch::FTINTRP_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, }, { 2557 /* ftintrp.w.d */, LoongArch::FTINTRP_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, }, { 2569 /* ftintrp.w.s */, LoongArch::FTINTRP_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2581 /* ftintrz.l.d */, LoongArch::FTINTRZ_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, }, { 2593 /* ftintrz.l.s */, LoongArch::FTINTRZ_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, }, { 2605 /* ftintrz.w.d */, LoongArch::FTINTRZ_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, }, { 2617 /* ftintrz.w.s */, LoongArch::FTINTRZ_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, }, { 2629 /* gcsrrd */, LoongArch::GCSRRD, Convert__Reg1_0__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, }, { 2636 /* gcsrwr */, LoongArch::GCSRWR, Convert__Reg1_0__Tie0_1_1__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, }, { 2643 /* gcsrxchg */, LoongArch::GCSRXCHG, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm14 }, }, { 2652 /* gtlbflush */, LoongArch::GTLBFLUSH, Convert_NoOperands, AMFBS_None, { }, }, { 2662 /* hvcl */, LoongArch::HVCL, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, { 2667 /* ibar */, LoongArch::IBAR, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, { 2672 /* idle */, LoongArch::IDLE, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, { 2677 /* invtlb */, LoongArch::INVTLB, Convert__Reg1_2__Reg1_1__UImm51_0, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_GPR }, }, { 2684 /* iocsrrd.b */, LoongArch::IOCSRRD_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 2694 /* iocsrrd.d */, LoongArch::IOCSRRD_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 2704 /* iocsrrd.h */, LoongArch::IOCSRRD_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 2714 /* iocsrrd.w */, LoongArch::IOCSRRD_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 2724 /* iocsrwr.b */, LoongArch::IOCSRWR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 2734 /* iocsrwr.d */, LoongArch::IOCSRWR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 2744 /* iocsrwr.h */, LoongArch::IOCSRWR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 2754 /* iocsrwr.w */, LoongArch::IOCSRWR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 2764 /* jirl */, LoongArch::JIRL, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, { 2769 /* jiscr0 */, LoongArch::JISCR0, Convert__SImm21lsl21_0, AMFBS_None, { MCK_SImm21lsl2 }, }, { 2776 /* jiscr1 */, LoongArch::JISCR1, Convert__SImm21lsl21_0, AMFBS_None, { MCK_SImm21lsl2 }, }, { 2783 /* jr */, LoongArch::JIRL, Convert__regR0__Reg1_0__imm_95_0, AMFBS_None, { MCK_GPR }, }, { 2786 /* la */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_BareSymbol }, }, { 2786 /* la */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, }, { 2786 /* la */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2789 /* la.abs */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2789 /* la.abs */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__imm_95_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2796 /* la.global */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_BareSymbol }, }, { 2796 /* la.global */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, }, { 2796 /* la.global */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2796 /* la.global */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, { 2796 /* la.global */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, { 2796 /* la.global */, LoongArch::PseudoLA_GOT_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, { 2806 /* la.got */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2806 /* la.got */, LoongArch::PseudoLA_GOT_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, { 2813 /* la.local */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaLocalWithAbs, { MCK_GPR, MCK_BareSymbol }, }, { 2813 /* la.local */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2813 /* la.local */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaLocalWithAbs, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, { 2813 /* la.local */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, { 2822 /* la.pcrel */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2822 /* la.pcrel */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, { 2831 /* la.tls.desc */, LoongArch::PseudoLA_TLS_DESC_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_IsLA32_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, }, { 2831 /* la.tls.desc */, LoongArch::PseudoLA_TLS_DESC_ABS_LARGE, Convert__Reg1_0__imm_95_0__BareSymbol1_1, AMFBS_IsLA64_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, }, { 2831 /* la.tls.desc */, LoongArch::PseudoLA_TLS_DESC_PC, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2831 /* la.tls.desc */, LoongArch::PseudoLA_TLS_DESC_PC_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, { 2843 /* la.tls.gd */, LoongArch::PseudoLA_TLS_GD, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2843 /* la.tls.gd */, LoongArch::PseudoLA_TLS_GD_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, { 2853 /* la.tls.ie */, LoongArch::PseudoLA_TLS_IE, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2853 /* la.tls.ie */, LoongArch::PseudoLA_TLS_IE_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, { 2863 /* la.tls.ld */, LoongArch::PseudoLA_TLS_LD, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2863 /* la.tls.ld */, LoongArch::PseudoLA_TLS_LD_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, { 2873 /* la.tls.le */, LoongArch::PseudoLA_TLS_LE, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, { 2883 /* ld.b */, LoongArch::LD_B, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 2888 /* ld.bu */, LoongArch::LD_BU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 2894 /* ld.d */, LoongArch::LD_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 2899 /* ld.h */, LoongArch::LD_H, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 2904 /* ld.hu */, LoongArch::LD_HU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 2910 /* ld.w */, LoongArch::LD_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 2915 /* ld.wu */, LoongArch::LD_WU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 2921 /* lddir */, LoongArch::LDDIR, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm8 }, }, { 2927 /* ldgt.b */, LoongArch::LDGT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 2934 /* ldgt.d */, LoongArch::LDGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 2941 /* ldgt.h */, LoongArch::LDGT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 2948 /* ldgt.w */, LoongArch::LDGT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 2955 /* ldl.d */, LoongArch::LDL_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 2961 /* ldl.w */, LoongArch::LDL_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 2967 /* ldle.b */, LoongArch::LDLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 2974 /* ldle.d */, LoongArch::LDLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 2981 /* ldle.h */, LoongArch::LDLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 2988 /* ldle.w */, LoongArch::LDLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 2995 /* ldpte */, LoongArch::LDPTE, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, }, { 3001 /* ldptr.d */, LoongArch::LDPTR_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, { 3009 /* ldptr.w */, LoongArch::LDPTR_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, { 3017 /* ldr.d */, LoongArch::LDR_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 3023 /* ldr.w */, LoongArch::LDR_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 3029 /* ldx.b */, LoongArch::LDX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3035 /* ldx.bu */, LoongArch::LDX_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3042 /* ldx.d */, LoongArch::LDX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3048 /* ldx.h */, LoongArch::LDX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3054 /* ldx.hu */, LoongArch::LDX_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3061 /* ldx.w */, LoongArch::LDX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3067 /* ldx.wu */, LoongArch::LDX_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3074 /* li.d */, LoongArch::PseudoLI_D, Convert__Reg1_0__Imm641_1, AMFBS_IsLA64, { MCK_GPR, MCK_Imm64 }, }, { 3079 /* li.w */, LoongArch::PseudoLI_W, Convert__Reg1_0__Imm321_1, AMFBS_None, { MCK_GPR, MCK_Imm32 }, }, { 3084 /* ll.d */, LoongArch::LL_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, { 3089 /* ll.w */, LoongArch::LL_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, { 3094 /* llacq.d */, LoongArch::LLACQ_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 3102 /* llacq.w */, LoongArch::LLACQ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 3110 /* lu12i.w */, LoongArch::LU12I_W, Convert__Reg1_0__SImm20lu12iw1_1, AMFBS_None, { MCK_GPR, MCK_SImm20lu12iw }, }, { 3118 /* lu32i.d */, LoongArch::LU32I_D, Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1, AMFBS_IsLA64, { MCK_GPR, MCK_SImm20lu32id }, }, { 3126 /* lu52i.d */, LoongArch::LU52I_D, Convert__Reg1_0__Reg1_1__SImm12lu52id1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12lu52id }, }, { 3134 /* maskeqz */, LoongArch::MASKEQZ, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3142 /* masknez */, LoongArch::MASKNEZ, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3150 /* mod.d */, LoongArch::MOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3156 /* mod.du */, LoongArch::MOD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3163 /* mod.w */, LoongArch::MOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3169 /* mod.wu */, LoongArch::MOD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3176 /* movcf2fr */, LoongArch::MOVCF2FR_xS, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_CFR }, }, { 3185 /* movcf2gr */, LoongArch::MOVCF2GR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_CFR }, }, { 3194 /* move */, LoongArch::OR, Convert__Reg1_0__Reg1_1__regR0, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 3199 /* movfcsr2gr */, LoongArch::MOVFCSR2GR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_FCSR }, }, { 3210 /* movfr2cf */, LoongArch::MOVFR2CF_xS, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_FPR32 }, }, { 3219 /* movfr2gr.d */, LoongArch::MOVFR2GR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_FPR64 }, }, { 3230 /* movfr2gr.s */, LoongArch::MOVFR2GR_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_FPR32 }, }, { 3241 /* movfrh2gr.s */, LoongArch::MOVFRH2GR_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_FPR64 }, }, { 3253 /* movgr2cf */, LoongArch::MOVGR2CF, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_GPR }, }, { 3262 /* movgr2fcsr */, LoongArch::MOVGR2FCSR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FCSR, MCK_GPR }, }, { 3273 /* movgr2fr.d */, LoongArch::MOVGR2FR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_FPR64, MCK_GPR }, }, { 3284 /* movgr2fr.w */, LoongArch::MOVGR2FR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_GPR }, }, { 3295 /* movgr2frh.w */, LoongArch::MOVGR2FRH_W, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_GPR }, }, { 3307 /* movgr2scr */, LoongArch::MOVGR2SCR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SCR, MCK_GPR }, }, { 3317 /* movscr2gr */, LoongArch::MOVSCR2GR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_SCR }, }, { 3327 /* mul.d */, LoongArch::MUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3333 /* mul.w */, LoongArch::MUL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3339 /* mulh.d */, LoongArch::MULH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3346 /* mulh.du */, LoongArch::MULH_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3354 /* mulh.w */, LoongArch::MULH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3361 /* mulh.wu */, LoongArch::MULH_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3369 /* mulw.d.w */, LoongArch::MULW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3378 /* mulw.d.wu */, LoongArch::MULW_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3388 /* nop */, LoongArch::ANDI, Convert__regR0__regR0__imm_95_0, AMFBS_None, { }, }, { 3392 /* nor */, LoongArch::NOR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3396 /* or */, LoongArch::OR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3399 /* ori */, LoongArch::ORI, Convert__Reg1_0__Reg1_1__UImm12ori1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12ori }, }, { 3403 /* orn */, LoongArch::ORN, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3407 /* pcaddi */, LoongArch::PCADDI, Convert__Reg1_0__SImm20pcaddi1_1, AMFBS_None, { MCK_GPR, MCK_SImm20pcaddi }, }, { 3414 /* pcaddu12i */, LoongArch::PCADDU12I, Convert__Reg1_0__SImm201_1, AMFBS_None, { MCK_GPR, MCK_SImm20 }, }, { 3424 /* pcaddu18i */, LoongArch::PCADDU18I, Convert__Reg1_0__SImm20pcaddu18i1_1, AMFBS_IsLA64, { MCK_GPR, MCK_SImm20pcaddu18i }, }, { 3434 /* pcalau12i */, LoongArch::PCALAU12I, Convert__Reg1_0__SImm20pcalau12i1_1, AMFBS_None, { MCK_GPR, MCK_SImm20pcalau12i }, }, { 3444 /* preld */, LoongArch::PRELD, Convert__UImm51_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_SImm12 }, }, { 3450 /* preldx */, LoongArch::PRELDX, Convert__UImm51_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_UImm5, MCK_GPR, MCK_GPR }, }, { 3457 /* rcr.b */, LoongArch::RCR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3463 /* rcr.d */, LoongArch::RCR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3469 /* rcr.h */, LoongArch::RCR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3475 /* rcr.w */, LoongArch::RCR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3481 /* rcri.b */, LoongArch::RCRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm3 }, }, { 3488 /* rcri.d */, LoongArch::RCRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, }, { 3495 /* rcri.h */, LoongArch::RCRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 3502 /* rcri.w */, LoongArch::RCRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, }, { 3509 /* rdtime.d */, LoongArch::RDTIME_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 3518 /* rdtimeh.w */, LoongArch::RDTIMEH_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 3528 /* rdtimel.w */, LoongArch::RDTIMEL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 3538 /* ret */, LoongArch::JIRL, Convert__regR0__regR1__imm_95_0, AMFBS_None, { }, }, { 3542 /* revb.2h */, LoongArch::REVB_2H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 3550 /* revb.2w */, LoongArch::REVB_2W, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 3558 /* revb.4h */, LoongArch::REVB_4H, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 3566 /* revb.d */, LoongArch::REVB_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 3573 /* revh.2w */, LoongArch::REVH_2W, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 3581 /* revh.d */, LoongArch::REVH_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 3588 /* rotr.b */, LoongArch::ROTR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3595 /* rotr.d */, LoongArch::ROTR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3602 /* rotr.h */, LoongArch::ROTR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3609 /* rotr.w */, LoongArch::ROTR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3616 /* rotri.b */, LoongArch::ROTRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm3 }, }, { 3624 /* rotri.d */, LoongArch::ROTRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, }, { 3632 /* rotri.h */, LoongArch::ROTRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, }, { 3640 /* rotri.w */, LoongArch::ROTRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, }, { 3648 /* sbc.b */, LoongArch::SBC_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3654 /* sbc.d */, LoongArch::SBC_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3660 /* sbc.h */, LoongArch::SBC_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3666 /* sbc.w */, LoongArch::SBC_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3672 /* sc.d */, LoongArch::SC_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, { 3677 /* sc.q */, LoongArch::SC_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3682 /* sc.w */, LoongArch::SC_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, { 3687 /* screl.d */, LoongArch::SCREL_D, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 3695 /* screl.w */, LoongArch::SCREL_W, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 3703 /* setarmj */, LoongArch::SETARMJ, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 3711 /* setx86j */, LoongArch::SETX86J, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 3719 /* setx86loope */, LoongArch::SETX86LOOPE, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 3731 /* setx86loopne */, LoongArch::SETX86LOOPNE, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 3744 /* sll.d */, LoongArch::SLL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3750 /* sll.w */, LoongArch::SLL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3756 /* slli.d */, LoongArch::SLLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, }, { 3763 /* slli.w */, LoongArch::SLLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, }, { 3770 /* slt */, LoongArch::SLT, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3774 /* slti */, LoongArch::SLTI, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12 }, }, { 3779 /* sltu */, LoongArch::SLTU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3784 /* sltui */, LoongArch::SLTUI, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12 }, }, { 3790 /* sra.d */, LoongArch::SRA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3796 /* sra.w */, LoongArch::SRA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3802 /* srai.d */, LoongArch::SRAI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, }, { 3809 /* srai.w */, LoongArch::SRAI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, }, { 3816 /* srl.d */, LoongArch::SRL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3822 /* srl.w */, LoongArch::SRL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3828 /* srli.d */, LoongArch::SRLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, }, { 3835 /* srli.w */, LoongArch::SRLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, }, { 3842 /* st.b */, LoongArch::ST_B, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 3847 /* st.d */, LoongArch::ST_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 3852 /* st.h */, LoongArch::ST_H, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 3857 /* st.w */, LoongArch::ST_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 3862 /* stgt.b */, LoongArch::STGT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3869 /* stgt.d */, LoongArch::STGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3876 /* stgt.h */, LoongArch::STGT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3883 /* stgt.w */, LoongArch::STGT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3890 /* stl.d */, LoongArch::STL_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 3896 /* stl.w */, LoongArch::STL_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 3902 /* stle.b */, LoongArch::STLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3909 /* stle.d */, LoongArch::STLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3916 /* stle.h */, LoongArch::STLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3923 /* stle.w */, LoongArch::STLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3930 /* stptr.d */, LoongArch::STPTR_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, { 3938 /* stptr.w */, LoongArch::STPTR_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, { 3946 /* str.d */, LoongArch::STR_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 3952 /* str.w */, LoongArch::STR_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, { 3958 /* stx.b */, LoongArch::STX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3964 /* stx.d */, LoongArch::STX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3970 /* stx.h */, LoongArch::STX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3976 /* stx.w */, LoongArch::STX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3982 /* sub.d */, LoongArch::SUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3988 /* sub.w */, LoongArch::SUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 3994 /* syscall */, LoongArch::SYSCALL, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, { 4002 /* tail36 */, LoongArch::PseudoTAIL36, Convert__Reg1_0__BareSymbol1_1, AMFBS_IsLA64, { MCK_GPR, MCK_BareSymbol }, }, { 4009 /* tlbclr */, LoongArch::TLBCLR, Convert_NoOperands, AMFBS_None, { }, }, { 4016 /* tlbfill */, LoongArch::TLBFILL, Convert_NoOperands, AMFBS_None, { }, }, { 4024 /* tlbflush */, LoongArch::TLBFLUSH, Convert_NoOperands, AMFBS_None, { }, }, { 4033 /* tlbrd */, LoongArch::TLBRD, Convert_NoOperands, AMFBS_None, { }, }, { 4039 /* tlbsrch */, LoongArch::TLBSRCH, Convert_NoOperands, AMFBS_None, { }, }, { 4047 /* tlbwr */, LoongArch::TLBWR, Convert_NoOperands, AMFBS_None, { }, }, { 4053 /* vabsd.b */, LoongArch::VABSD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4061 /* vabsd.bu */, LoongArch::VABSD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4070 /* vabsd.d */, LoongArch::VABSD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4078 /* vabsd.du */, LoongArch::VABSD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4087 /* vabsd.h */, LoongArch::VABSD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4095 /* vabsd.hu */, LoongArch::VABSD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4104 /* vabsd.w */, LoongArch::VABSD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4112 /* vabsd.wu */, LoongArch::VABSD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4121 /* vadd.b */, LoongArch::VADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4128 /* vadd.d */, LoongArch::VADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4135 /* vadd.h */, LoongArch::VADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4142 /* vadd.q */, LoongArch::VADD_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4149 /* vadd.w */, LoongArch::VADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4156 /* vadda.b */, LoongArch::VADDA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4164 /* vadda.d */, LoongArch::VADDA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4172 /* vadda.h */, LoongArch::VADDA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4180 /* vadda.w */, LoongArch::VADDA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4188 /* vaddi.bu */, LoongArch::VADDI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 4197 /* vaddi.du */, LoongArch::VADDI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 4206 /* vaddi.hu */, LoongArch::VADDI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 4215 /* vaddi.wu */, LoongArch::VADDI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 4224 /* vaddwev.d.w */, LoongArch::VADDWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4236 /* vaddwev.d.wu */, LoongArch::VADDWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4249 /* vaddwev.d.wu.w */, LoongArch::VADDWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4264 /* vaddwev.h.b */, LoongArch::VADDWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4276 /* vaddwev.h.bu */, LoongArch::VADDWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4289 /* vaddwev.h.bu.b */, LoongArch::VADDWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4304 /* vaddwev.q.d */, LoongArch::VADDWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4316 /* vaddwev.q.du */, LoongArch::VADDWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4329 /* vaddwev.q.du.d */, LoongArch::VADDWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4344 /* vaddwev.w.h */, LoongArch::VADDWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4356 /* vaddwev.w.hu */, LoongArch::VADDWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4369 /* vaddwev.w.hu.h */, LoongArch::VADDWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4384 /* vaddwod.d.w */, LoongArch::VADDWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4396 /* vaddwod.d.wu */, LoongArch::VADDWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4409 /* vaddwod.d.wu.w */, LoongArch::VADDWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4424 /* vaddwod.h.b */, LoongArch::VADDWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4436 /* vaddwod.h.bu */, LoongArch::VADDWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4449 /* vaddwod.h.bu.b */, LoongArch::VADDWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4464 /* vaddwod.q.d */, LoongArch::VADDWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4476 /* vaddwod.q.du */, LoongArch::VADDWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4489 /* vaddwod.q.du.d */, LoongArch::VADDWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4504 /* vaddwod.w.h */, LoongArch::VADDWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4516 /* vaddwod.w.hu */, LoongArch::VADDWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4529 /* vaddwod.w.hu.h */, LoongArch::VADDWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4544 /* vand.v */, LoongArch::VAND_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4551 /* vandi.b */, LoongArch::VANDI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 4559 /* vandn.v */, LoongArch::VANDN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4567 /* vavg.b */, LoongArch::VAVG_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4574 /* vavg.bu */, LoongArch::VAVG_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4582 /* vavg.d */, LoongArch::VAVG_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4589 /* vavg.du */, LoongArch::VAVG_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4597 /* vavg.h */, LoongArch::VAVG_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4604 /* vavg.hu */, LoongArch::VAVG_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4612 /* vavg.w */, LoongArch::VAVG_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4619 /* vavg.wu */, LoongArch::VAVG_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4627 /* vavgr.b */, LoongArch::VAVGR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4635 /* vavgr.bu */, LoongArch::VAVGR_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4644 /* vavgr.d */, LoongArch::VAVGR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4652 /* vavgr.du */, LoongArch::VAVGR_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4661 /* vavgr.h */, LoongArch::VAVGR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4669 /* vavgr.hu */, LoongArch::VAVGR_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4678 /* vavgr.w */, LoongArch::VAVGR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4686 /* vavgr.wu */, LoongArch::VAVGR_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4695 /* vbitclr.b */, LoongArch::VBITCLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4705 /* vbitclr.d */, LoongArch::VBITCLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4715 /* vbitclr.h */, LoongArch::VBITCLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4725 /* vbitclr.w */, LoongArch::VBITCLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4735 /* vbitclri.b */, LoongArch::VBITCLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 4746 /* vbitclri.d */, LoongArch::VBITCLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 4757 /* vbitclri.h */, LoongArch::VBITCLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 4768 /* vbitclri.w */, LoongArch::VBITCLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 4779 /* vbitrev.b */, LoongArch::VBITREV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4789 /* vbitrev.d */, LoongArch::VBITREV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4799 /* vbitrev.h */, LoongArch::VBITREV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4809 /* vbitrev.w */, LoongArch::VBITREV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4819 /* vbitrevi.b */, LoongArch::VBITREVI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 4830 /* vbitrevi.d */, LoongArch::VBITREVI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 4841 /* vbitrevi.h */, LoongArch::VBITREVI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 4852 /* vbitrevi.w */, LoongArch::VBITREVI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 4863 /* vbitsel.v */, LoongArch::VBITSEL_V, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4873 /* vbitseli.b */, LoongArch::VBITSELI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 4884 /* vbitset.b */, LoongArch::VBITSET_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4894 /* vbitset.d */, LoongArch::VBITSET_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4904 /* vbitset.h */, LoongArch::VBITSET_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4914 /* vbitset.w */, LoongArch::VBITSET_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 4924 /* vbitseti.b */, LoongArch::VBITSETI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 4935 /* vbitseti.d */, LoongArch::VBITSETI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 4946 /* vbitseti.h */, LoongArch::VBITSETI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 4957 /* vbitseti.w */, LoongArch::VBITSETI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 4968 /* vbsll.v */, LoongArch::VBSLL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 4976 /* vbsrl.v */, LoongArch::VBSRL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 4984 /* vclo.b */, LoongArch::VCLO_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 4991 /* vclo.d */, LoongArch::VCLO_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 4998 /* vclo.h */, LoongArch::VCLO_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5005 /* vclo.w */, LoongArch::VCLO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5012 /* vclz.b */, LoongArch::VCLZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5019 /* vclz.d */, LoongArch::VCLZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5026 /* vclz.h */, LoongArch::VCLZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5033 /* vclz.w */, LoongArch::VCLZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5040 /* vdiv.b */, LoongArch::VDIV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5047 /* vdiv.bu */, LoongArch::VDIV_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5055 /* vdiv.d */, LoongArch::VDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5062 /* vdiv.du */, LoongArch::VDIV_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5070 /* vdiv.h */, LoongArch::VDIV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5077 /* vdiv.hu */, LoongArch::VDIV_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5085 /* vdiv.w */, LoongArch::VDIV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5092 /* vdiv.wu */, LoongArch::VDIV_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5100 /* vext2xv.d.b */, LoongArch::VEXT2XV_D_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5112 /* vext2xv.d.h */, LoongArch::VEXT2XV_D_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5124 /* vext2xv.d.w */, LoongArch::VEXT2XV_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5136 /* vext2xv.du.bu */, LoongArch::VEXT2XV_DU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5150 /* vext2xv.du.hu */, LoongArch::VEXT2XV_DU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5164 /* vext2xv.du.wu */, LoongArch::VEXT2XV_DU_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5178 /* vext2xv.h.b */, LoongArch::VEXT2XV_H_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5190 /* vext2xv.hu.bu */, LoongArch::VEXT2XV_HU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5204 /* vext2xv.w.b */, LoongArch::VEXT2XV_W_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5216 /* vext2xv.w.h */, LoongArch::VEXT2XV_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5228 /* vext2xv.wu.bu */, LoongArch::VEXT2XV_WU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5242 /* vext2xv.wu.hu */, LoongArch::VEXT2XV_WU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 5256 /* vexth.d.w */, LoongArch::VEXTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5266 /* vexth.du.wu */, LoongArch::VEXTH_DU_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5278 /* vexth.h.b */, LoongArch::VEXTH_H_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5288 /* vexth.hu.bu */, LoongArch::VEXTH_HU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5300 /* vexth.q.d */, LoongArch::VEXTH_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5310 /* vexth.qu.du */, LoongArch::VEXTH_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5322 /* vexth.w.h */, LoongArch::VEXTH_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5332 /* vexth.wu.hu */, LoongArch::VEXTH_WU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5344 /* vextl.q.d */, LoongArch::VEXTL_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5354 /* vextl.qu.du */, LoongArch::VEXTL_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5366 /* vextrins.b */, LoongArch::VEXTRINS_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 5377 /* vextrins.d */, LoongArch::VEXTRINS_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 5388 /* vextrins.h */, LoongArch::VEXTRINS_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 5399 /* vextrins.w */, LoongArch::VEXTRINS_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 5410 /* vfadd.d */, LoongArch::VFADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5418 /* vfadd.s */, LoongArch::VFADD_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5426 /* vfclass.d */, LoongArch::VFCLASS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5436 /* vfclass.s */, LoongArch::VFCLASS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 5446 /* vfcmp.caf.d */, LoongArch::VFCMP_CAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5458 /* vfcmp.caf.s */, LoongArch::VFCMP_CAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5470 /* vfcmp.ceq.d */, LoongArch::VFCMP_CEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5482 /* vfcmp.ceq.s */, LoongArch::VFCMP_CEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5494 /* vfcmp.cle.d */, LoongArch::VFCMP_CLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5506 /* vfcmp.cle.s */, LoongArch::VFCMP_CLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5518 /* vfcmp.clt.d */, LoongArch::VFCMP_CLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5530 /* vfcmp.clt.s */, LoongArch::VFCMP_CLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5542 /* vfcmp.cne.d */, LoongArch::VFCMP_CNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5554 /* vfcmp.cne.s */, LoongArch::VFCMP_CNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5566 /* vfcmp.cor.d */, LoongArch::VFCMP_COR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5578 /* vfcmp.cor.s */, LoongArch::VFCMP_COR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5590 /* vfcmp.cueq.d */, LoongArch::VFCMP_CUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5603 /* vfcmp.cueq.s */, LoongArch::VFCMP_CUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5616 /* vfcmp.cule.d */, LoongArch::VFCMP_CULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5629 /* vfcmp.cule.s */, LoongArch::VFCMP_CULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5642 /* vfcmp.cult.d */, LoongArch::VFCMP_CULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5655 /* vfcmp.cult.s */, LoongArch::VFCMP_CULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5668 /* vfcmp.cun.d */, LoongArch::VFCMP_CUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5680 /* vfcmp.cun.s */, LoongArch::VFCMP_CUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5692 /* vfcmp.cune.d */, LoongArch::VFCMP_CUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5705 /* vfcmp.cune.s */, LoongArch::VFCMP_CUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5718 /* vfcmp.saf.d */, LoongArch::VFCMP_SAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5730 /* vfcmp.saf.s */, LoongArch::VFCMP_SAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5742 /* vfcmp.seq.d */, LoongArch::VFCMP_SEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5754 /* vfcmp.seq.s */, LoongArch::VFCMP_SEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5766 /* vfcmp.sle.d */, LoongArch::VFCMP_SLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5778 /* vfcmp.sle.s */, LoongArch::VFCMP_SLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5790 /* vfcmp.slt.d */, LoongArch::VFCMP_SLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5802 /* vfcmp.slt.s */, LoongArch::VFCMP_SLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5814 /* vfcmp.sne.d */, LoongArch::VFCMP_SNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5826 /* vfcmp.sne.s */, LoongArch::VFCMP_SNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5838 /* vfcmp.sor.d */, LoongArch::VFCMP_SOR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5850 /* vfcmp.sor.s */, LoongArch::VFCMP_SOR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5862 /* vfcmp.sueq.d */, LoongArch::VFCMP_SUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5875 /* vfcmp.sueq.s */, LoongArch::VFCMP_SUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5888 /* vfcmp.sule.d */, LoongArch::VFCMP_SULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5901 /* vfcmp.sule.s */, LoongArch::VFCMP_SULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5914 /* vfcmp.sult.d */, LoongArch::VFCMP_SULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5927 /* vfcmp.sult.s */, LoongArch::VFCMP_SULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5940 /* vfcmp.sun.d */, LoongArch::VFCMP_SUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5952 /* vfcmp.sun.s */, LoongArch::VFCMP_SUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5964 /* vfcmp.sune.d */, LoongArch::VFCMP_SUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5977 /* vfcmp.sune.s */, LoongArch::VFCMP_SUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 5990 /* vfcvt.h.s */, LoongArch::VFCVT_H_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6000 /* vfcvt.s.d */, LoongArch::VFCVT_S_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6010 /* vfcvth.d.s */, LoongArch::VFCVTH_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6021 /* vfcvth.s.h */, LoongArch::VFCVTH_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6032 /* vfcvtl.d.s */, LoongArch::VFCVTL_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6043 /* vfcvtl.s.h */, LoongArch::VFCVTL_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6054 /* vfdiv.d */, LoongArch::VFDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6062 /* vfdiv.s */, LoongArch::VFDIV_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6070 /* vffint.d.l */, LoongArch::VFFINT_D_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6081 /* vffint.d.lu */, LoongArch::VFFINT_D_LU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6093 /* vffint.s.l */, LoongArch::VFFINT_S_L, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6104 /* vffint.s.w */, LoongArch::VFFINT_S_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6115 /* vffint.s.wu */, LoongArch::VFFINT_S_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6127 /* vffinth.d.w */, LoongArch::VFFINTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6139 /* vffintl.d.w */, LoongArch::VFFINTL_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6151 /* vflogb.d */, LoongArch::VFLOGB_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6160 /* vflogb.s */, LoongArch::VFLOGB_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6169 /* vfmadd.d */, LoongArch::VFMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6178 /* vfmadd.s */, LoongArch::VFMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6187 /* vfmax.d */, LoongArch::VFMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6195 /* vfmax.s */, LoongArch::VFMAX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6203 /* vfmaxa.d */, LoongArch::VFMAXA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6212 /* vfmaxa.s */, LoongArch::VFMAXA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6221 /* vfmin.d */, LoongArch::VFMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6229 /* vfmin.s */, LoongArch::VFMIN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6237 /* vfmina.d */, LoongArch::VFMINA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6246 /* vfmina.s */, LoongArch::VFMINA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6255 /* vfmsub.d */, LoongArch::VFMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6264 /* vfmsub.s */, LoongArch::VFMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6273 /* vfmul.d */, LoongArch::VFMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6281 /* vfmul.s */, LoongArch::VFMUL_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6289 /* vfnmadd.d */, LoongArch::VFNMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6299 /* vfnmadd.s */, LoongArch::VFNMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6309 /* vfnmsub.d */, LoongArch::VFNMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6319 /* vfnmsub.s */, LoongArch::VFNMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6329 /* vfrecip.d */, LoongArch::VFRECIP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6339 /* vfrecip.s */, LoongArch::VFRECIP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6349 /* vfrecipe.d */, LoongArch::VFRECIPE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6360 /* vfrecipe.s */, LoongArch::VFRECIPE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6371 /* vfrint.d */, LoongArch::VFRINT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6380 /* vfrint.s */, LoongArch::VFRINT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6389 /* vfrintrm.d */, LoongArch::VFRINTRM_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6400 /* vfrintrm.s */, LoongArch::VFRINTRM_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6411 /* vfrintrne.d */, LoongArch::VFRINTRNE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6423 /* vfrintrne.s */, LoongArch::VFRINTRNE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6435 /* vfrintrp.d */, LoongArch::VFRINTRP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6446 /* vfrintrp.s */, LoongArch::VFRINTRP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6457 /* vfrintrz.d */, LoongArch::VFRINTRZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6468 /* vfrintrz.s */, LoongArch::VFRINTRZ_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6479 /* vfrsqrt.d */, LoongArch::VFRSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6489 /* vfrsqrt.s */, LoongArch::VFRSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6499 /* vfrsqrte.d */, LoongArch::VFRSQRTE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6510 /* vfrsqrte.s */, LoongArch::VFRSQRTE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6521 /* vfrstp.b */, LoongArch::VFRSTP_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6530 /* vfrstp.h */, LoongArch::VFRSTP_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6539 /* vfrstpi.b */, LoongArch::VFRSTPI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 6549 /* vfrstpi.h */, LoongArch::VFRSTPI_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 6559 /* vfsqrt.d */, LoongArch::VFSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6568 /* vfsqrt.s */, LoongArch::VFSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6577 /* vfsub.d */, LoongArch::VFSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6585 /* vfsub.s */, LoongArch::VFSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6593 /* vftint.l.d */, LoongArch::VFTINT_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6604 /* vftint.lu.d */, LoongArch::VFTINT_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6616 /* vftint.w.d */, LoongArch::VFTINT_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6627 /* vftint.w.s */, LoongArch::VFTINT_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6638 /* vftint.wu.s */, LoongArch::VFTINT_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6650 /* vftinth.l.s */, LoongArch::VFTINTH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6662 /* vftintl.l.s */, LoongArch::VFTINTL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6674 /* vftintrm.l.d */, LoongArch::VFTINTRM_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6687 /* vftintrm.w.d */, LoongArch::VFTINTRM_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6700 /* vftintrm.w.s */, LoongArch::VFTINTRM_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6713 /* vftintrmh.l.s */, LoongArch::VFTINTRMH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6727 /* vftintrml.l.s */, LoongArch::VFTINTRML_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6741 /* vftintrne.l.d */, LoongArch::VFTINTRNE_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6755 /* vftintrne.w.d */, LoongArch::VFTINTRNE_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6769 /* vftintrne.w.s */, LoongArch::VFTINTRNE_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6783 /* vftintrneh.l.s */, LoongArch::VFTINTRNEH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6798 /* vftintrnel.l.s */, LoongArch::VFTINTRNEL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6813 /* vftintrp.l.d */, LoongArch::VFTINTRP_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6826 /* vftintrp.w.d */, LoongArch::VFTINTRP_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6839 /* vftintrp.w.s */, LoongArch::VFTINTRP_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6852 /* vftintrph.l.s */, LoongArch::VFTINTRPH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6866 /* vftintrpl.l.s */, LoongArch::VFTINTRPL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6880 /* vftintrz.l.d */, LoongArch::VFTINTRZ_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6893 /* vftintrz.lu.d */, LoongArch::VFTINTRZ_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6907 /* vftintrz.w.d */, LoongArch::VFTINTRZ_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6920 /* vftintrz.w.s */, LoongArch::VFTINTRZ_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6933 /* vftintrz.wu.s */, LoongArch::VFTINTRZ_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6947 /* vftintrzh.l.s */, LoongArch::VFTINTRZH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6961 /* vftintrzl.l.s */, LoongArch::VFTINTRZL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 6975 /* vhaddw.d.w */, LoongArch::VHADDW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6986 /* vhaddw.du.wu */, LoongArch::VHADDW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 6999 /* vhaddw.h.b */, LoongArch::VHADDW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7010 /* vhaddw.hu.bu */, LoongArch::VHADDW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7023 /* vhaddw.q.d */, LoongArch::VHADDW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7034 /* vhaddw.qu.du */, LoongArch::VHADDW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7047 /* vhaddw.w.h */, LoongArch::VHADDW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7058 /* vhaddw.wu.hu */, LoongArch::VHADDW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7071 /* vhsubw.d.w */, LoongArch::VHSUBW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7082 /* vhsubw.du.wu */, LoongArch::VHSUBW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7095 /* vhsubw.h.b */, LoongArch::VHSUBW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7106 /* vhsubw.hu.bu */, LoongArch::VHSUBW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7119 /* vhsubw.q.d */, LoongArch::VHSUBW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7130 /* vhsubw.qu.du */, LoongArch::VHSUBW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7143 /* vhsubw.w.h */, LoongArch::VHSUBW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7154 /* vhsubw.wu.hu */, LoongArch::VHSUBW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7167 /* vilvh.b */, LoongArch::VILVH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7175 /* vilvh.d */, LoongArch::VILVH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7183 /* vilvh.h */, LoongArch::VILVH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7191 /* vilvh.w */, LoongArch::VILVH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7199 /* vilvl.b */, LoongArch::VILVL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7207 /* vilvl.d */, LoongArch::VILVL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7215 /* vilvl.h */, LoongArch::VILVL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7223 /* vilvl.w */, LoongArch::VILVL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7231 /* vinsgr2vr.b */, LoongArch::VINSGR2VR_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm4 }, }, { 7243 /* vinsgr2vr.d */, LoongArch::VINSGR2VR_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm11_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm1 }, }, { 7255 /* vinsgr2vr.h */, LoongArch::VINSGR2VR_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm3 }, }, { 7267 /* vinsgr2vr.w */, LoongArch::VINSGR2VR_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm2 }, }, { 7279 /* vld */, LoongArch::VLD, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm12 }, }, { 7283 /* vldi */, LoongArch::VLDI, Convert__Reg1_0__SImm131_1, AMFBS_None, { MCK_LSX128, MCK_SImm13 }, }, { 7288 /* vldrepl.b */, LoongArch::VLDREPL_B, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm12 }, }, { 7298 /* vldrepl.d */, LoongArch::VLDREPL_D, Convert__Reg1_0__Reg1_1__SImm9lsl31_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm9lsl3 }, }, { 7308 /* vldrepl.h */, LoongArch::VLDREPL_H, Convert__Reg1_0__Reg1_1__SImm11lsl11_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm11lsl1 }, }, { 7318 /* vldrepl.w */, LoongArch::VLDREPL_W, Convert__Reg1_0__Reg1_1__SImm10lsl21_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm10lsl2 }, }, { 7328 /* vldx */, LoongArch::VLDX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_GPR }, }, { 7333 /* vmadd.b */, LoongArch::VMADD_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7341 /* vmadd.d */, LoongArch::VMADD_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7349 /* vmadd.h */, LoongArch::VMADD_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7357 /* vmadd.w */, LoongArch::VMADD_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7365 /* vmaddwev.d.w */, LoongArch::VMADDWEV_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7378 /* vmaddwev.d.wu */, LoongArch::VMADDWEV_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7392 /* vmaddwev.d.wu.w */, LoongArch::VMADDWEV_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7408 /* vmaddwev.h.b */, LoongArch::VMADDWEV_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7421 /* vmaddwev.h.bu */, LoongArch::VMADDWEV_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7435 /* vmaddwev.h.bu.b */, LoongArch::VMADDWEV_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7451 /* vmaddwev.q.d */, LoongArch::VMADDWEV_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7464 /* vmaddwev.q.du */, LoongArch::VMADDWEV_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7478 /* vmaddwev.q.du.d */, LoongArch::VMADDWEV_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7494 /* vmaddwev.w.h */, LoongArch::VMADDWEV_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7507 /* vmaddwev.w.hu */, LoongArch::VMADDWEV_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7521 /* vmaddwev.w.hu.h */, LoongArch::VMADDWEV_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7537 /* vmaddwod.d.w */, LoongArch::VMADDWOD_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7550 /* vmaddwod.d.wu */, LoongArch::VMADDWOD_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7564 /* vmaddwod.d.wu.w */, LoongArch::VMADDWOD_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7580 /* vmaddwod.h.b */, LoongArch::VMADDWOD_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7593 /* vmaddwod.h.bu */, LoongArch::VMADDWOD_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7607 /* vmaddwod.h.bu.b */, LoongArch::VMADDWOD_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7623 /* vmaddwod.q.d */, LoongArch::VMADDWOD_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7636 /* vmaddwod.q.du */, LoongArch::VMADDWOD_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7650 /* vmaddwod.q.du.d */, LoongArch::VMADDWOD_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7666 /* vmaddwod.w.h */, LoongArch::VMADDWOD_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7679 /* vmaddwod.w.hu */, LoongArch::VMADDWOD_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7693 /* vmaddwod.w.hu.h */, LoongArch::VMADDWOD_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7709 /* vmax.b */, LoongArch::VMAX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7716 /* vmax.bu */, LoongArch::VMAX_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7724 /* vmax.d */, LoongArch::VMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7731 /* vmax.du */, LoongArch::VMAX_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7739 /* vmax.h */, LoongArch::VMAX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7746 /* vmax.hu */, LoongArch::VMAX_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7754 /* vmax.w */, LoongArch::VMAX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7761 /* vmax.wu */, LoongArch::VMAX_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7769 /* vmaxi.b */, LoongArch::VMAXI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 7777 /* vmaxi.bu */, LoongArch::VMAXI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 7786 /* vmaxi.d */, LoongArch::VMAXI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 7794 /* vmaxi.du */, LoongArch::VMAXI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 7803 /* vmaxi.h */, LoongArch::VMAXI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 7811 /* vmaxi.hu */, LoongArch::VMAXI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 7820 /* vmaxi.w */, LoongArch::VMAXI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 7828 /* vmaxi.wu */, LoongArch::VMAXI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 7837 /* vmin.b */, LoongArch::VMIN_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7844 /* vmin.bu */, LoongArch::VMIN_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7852 /* vmin.d */, LoongArch::VMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7859 /* vmin.du */, LoongArch::VMIN_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7867 /* vmin.h */, LoongArch::VMIN_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7874 /* vmin.hu */, LoongArch::VMIN_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7882 /* vmin.w */, LoongArch::VMIN_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7889 /* vmin.wu */, LoongArch::VMIN_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7897 /* vmini.b */, LoongArch::VMINI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 7905 /* vmini.bu */, LoongArch::VMINI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 7914 /* vmini.d */, LoongArch::VMINI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 7922 /* vmini.du */, LoongArch::VMINI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 7931 /* vmini.h */, LoongArch::VMINI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 7939 /* vmini.hu */, LoongArch::VMINI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 7948 /* vmini.w */, LoongArch::VMINI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 7956 /* vmini.wu */, LoongArch::VMINI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 7965 /* vmod.b */, LoongArch::VMOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7972 /* vmod.bu */, LoongArch::VMOD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7980 /* vmod.d */, LoongArch::VMOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7987 /* vmod.du */, LoongArch::VMOD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 7995 /* vmod.h */, LoongArch::VMOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8002 /* vmod.hu */, LoongArch::VMOD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8010 /* vmod.w */, LoongArch::VMOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8017 /* vmod.wu */, LoongArch::VMOD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8025 /* vmskgez.b */, LoongArch::VMSKGEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8035 /* vmskltz.b */, LoongArch::VMSKLTZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8045 /* vmskltz.d */, LoongArch::VMSKLTZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8055 /* vmskltz.h */, LoongArch::VMSKLTZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8065 /* vmskltz.w */, LoongArch::VMSKLTZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8075 /* vmsknz.b */, LoongArch::VMSKNZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8084 /* vmsub.b */, LoongArch::VMSUB_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8092 /* vmsub.d */, LoongArch::VMSUB_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8100 /* vmsub.h */, LoongArch::VMSUB_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8108 /* vmsub.w */, LoongArch::VMSUB_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8116 /* vmuh.b */, LoongArch::VMUH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8123 /* vmuh.bu */, LoongArch::VMUH_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8131 /* vmuh.d */, LoongArch::VMUH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8138 /* vmuh.du */, LoongArch::VMUH_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8146 /* vmuh.h */, LoongArch::VMUH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8153 /* vmuh.hu */, LoongArch::VMUH_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8161 /* vmuh.w */, LoongArch::VMUH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8168 /* vmuh.wu */, LoongArch::VMUH_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8176 /* vmul.b */, LoongArch::VMUL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8183 /* vmul.d */, LoongArch::VMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8190 /* vmul.h */, LoongArch::VMUL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8197 /* vmul.w */, LoongArch::VMUL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8204 /* vmulwev.d.w */, LoongArch::VMULWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8216 /* vmulwev.d.wu */, LoongArch::VMULWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8229 /* vmulwev.d.wu.w */, LoongArch::VMULWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8244 /* vmulwev.h.b */, LoongArch::VMULWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8256 /* vmulwev.h.bu */, LoongArch::VMULWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8269 /* vmulwev.h.bu.b */, LoongArch::VMULWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8284 /* vmulwev.q.d */, LoongArch::VMULWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8296 /* vmulwev.q.du */, LoongArch::VMULWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8309 /* vmulwev.q.du.d */, LoongArch::VMULWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8324 /* vmulwev.w.h */, LoongArch::VMULWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8336 /* vmulwev.w.hu */, LoongArch::VMULWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8349 /* vmulwev.w.hu.h */, LoongArch::VMULWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8364 /* vmulwod.d.w */, LoongArch::VMULWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8376 /* vmulwod.d.wu */, LoongArch::VMULWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8389 /* vmulwod.d.wu.w */, LoongArch::VMULWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8404 /* vmulwod.h.b */, LoongArch::VMULWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8416 /* vmulwod.h.bu */, LoongArch::VMULWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8429 /* vmulwod.h.bu.b */, LoongArch::VMULWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8444 /* vmulwod.q.d */, LoongArch::VMULWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8456 /* vmulwod.q.du */, LoongArch::VMULWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8469 /* vmulwod.q.du.d */, LoongArch::VMULWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8484 /* vmulwod.w.h */, LoongArch::VMULWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8496 /* vmulwod.w.hu */, LoongArch::VMULWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8509 /* vmulwod.w.hu.h */, LoongArch::VMULWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8524 /* vneg.b */, LoongArch::VNEG_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8531 /* vneg.d */, LoongArch::VNEG_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8538 /* vneg.h */, LoongArch::VNEG_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8545 /* vneg.w */, LoongArch::VNEG_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8552 /* vnor.v */, LoongArch::VNOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8559 /* vnori.b */, LoongArch::VNORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 8567 /* vor.v */, LoongArch::VOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8573 /* vori.b */, LoongArch::VORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 8580 /* vorn.v */, LoongArch::VORN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8587 /* vpackev.b */, LoongArch::VPACKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8597 /* vpackev.d */, LoongArch::VPACKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8607 /* vpackev.h */, LoongArch::VPACKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8617 /* vpackev.w */, LoongArch::VPACKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8627 /* vpackod.b */, LoongArch::VPACKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8637 /* vpackod.d */, LoongArch::VPACKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8647 /* vpackod.h */, LoongArch::VPACKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8657 /* vpackod.w */, LoongArch::VPACKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8667 /* vpcnt.b */, LoongArch::VPCNT_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8675 /* vpcnt.d */, LoongArch::VPCNT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8683 /* vpcnt.h */, LoongArch::VPCNT_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8691 /* vpcnt.w */, LoongArch::VPCNT_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, }, { 8699 /* vpermi.w */, LoongArch::VPERMI_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 8708 /* vpickev.b */, LoongArch::VPICKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8718 /* vpickev.d */, LoongArch::VPICKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8728 /* vpickev.h */, LoongArch::VPICKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8738 /* vpickev.w */, LoongArch::VPICKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8748 /* vpickod.b */, LoongArch::VPICKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8758 /* vpickod.d */, LoongArch::VPICKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8768 /* vpickod.h */, LoongArch::VPICKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8778 /* vpickod.w */, LoongArch::VPICKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 8788 /* vpickve2gr.b */, LoongArch::VPICKVE2GR_B, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm4 }, }, { 8801 /* vpickve2gr.bu */, LoongArch::VPICKVE2GR_BU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm4 }, }, { 8815 /* vpickve2gr.d */, LoongArch::VPICKVE2GR_D, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm1 }, }, { 8828 /* vpickve2gr.du */, LoongArch::VPICKVE2GR_DU, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm1 }, }, { 8842 /* vpickve2gr.h */, LoongArch::VPICKVE2GR_H, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm3 }, }, { 8855 /* vpickve2gr.hu */, LoongArch::VPICKVE2GR_HU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm3 }, }, { 8869 /* vpickve2gr.w */, LoongArch::VPICKVE2GR_W, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm2 }, }, { 8882 /* vpickve2gr.wu */, LoongArch::VPICKVE2GR_WU, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm2 }, }, { 8896 /* vreplgr2vr.b */, LoongArch::VREPLGR2VR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, }, { 8909 /* vreplgr2vr.d */, LoongArch::VREPLGR2VR_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, }, { 8922 /* vreplgr2vr.h */, LoongArch::VREPLGR2VR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, }, { 8935 /* vreplgr2vr.w */, LoongArch::VREPLGR2VR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, }, { 8948 /* vrepli.b */, LoongArch::PseudoVREPLI_B, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, }, { 8957 /* vrepli.d */, LoongArch::PseudoVREPLI_D, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, }, { 8966 /* vrepli.h */, LoongArch::PseudoVREPLI_H, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, }, { 8975 /* vrepli.w */, LoongArch::PseudoVREPLI_W, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, }, { 8984 /* vreplve.b */, LoongArch::VREPLVE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, }, { 8994 /* vreplve.d */, LoongArch::VREPLVE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, }, { 9004 /* vreplve.h */, LoongArch::VREPLVE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, }, { 9014 /* vreplve.w */, LoongArch::VREPLVE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, }, { 9024 /* vreplvei.b */, LoongArch::VREPLVEI_B, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 9035 /* vreplvei.d */, LoongArch::VREPLVEI_D, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm1 }, }, { 9046 /* vreplvei.h */, LoongArch::VREPLVEI_H, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 9057 /* vreplvei.w */, LoongArch::VREPLVEI_W, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm2 }, }, { 9068 /* vrotr.b */, LoongArch::VROTR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9076 /* vrotr.d */, LoongArch::VROTR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9084 /* vrotr.h */, LoongArch::VROTR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9092 /* vrotr.w */, LoongArch::VROTR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9100 /* vrotri.b */, LoongArch::VROTRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 9109 /* vrotri.d */, LoongArch::VROTRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 9118 /* vrotri.h */, LoongArch::VROTRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 9127 /* vrotri.w */, LoongArch::VROTRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9136 /* vsadd.b */, LoongArch::VSADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9144 /* vsadd.bu */, LoongArch::VSADD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9153 /* vsadd.d */, LoongArch::VSADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9161 /* vsadd.du */, LoongArch::VSADD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9170 /* vsadd.h */, LoongArch::VSADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9178 /* vsadd.hu */, LoongArch::VSADD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9187 /* vsadd.w */, LoongArch::VSADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9195 /* vsadd.wu */, LoongArch::VSADD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9204 /* vsat.b */, LoongArch::VSAT_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 9211 /* vsat.bu */, LoongArch::VSAT_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 9219 /* vsat.d */, LoongArch::VSAT_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 9226 /* vsat.du */, LoongArch::VSAT_DU, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 9234 /* vsat.h */, LoongArch::VSAT_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 9241 /* vsat.hu */, LoongArch::VSAT_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 9249 /* vsat.w */, LoongArch::VSAT_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9256 /* vsat.wu */, LoongArch::VSAT_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9264 /* vseq.b */, LoongArch::VSEQ_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9271 /* vseq.d */, LoongArch::VSEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9278 /* vseq.h */, LoongArch::VSEQ_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9285 /* vseq.w */, LoongArch::VSEQ_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9292 /* vseqi.b */, LoongArch::VSEQI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9300 /* vseqi.d */, LoongArch::VSEQI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9308 /* vseqi.h */, LoongArch::VSEQI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9316 /* vseqi.w */, LoongArch::VSEQI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9324 /* vsetallnez.b */, LoongArch::VSETALLNEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, }, { 9337 /* vsetallnez.d */, LoongArch::VSETALLNEZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, }, { 9350 /* vsetallnez.h */, LoongArch::VSETALLNEZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, }, { 9363 /* vsetallnez.w */, LoongArch::VSETALLNEZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, }, { 9376 /* vsetanyeqz.b */, LoongArch::VSETANYEQZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, }, { 9389 /* vsetanyeqz.d */, LoongArch::VSETANYEQZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, }, { 9402 /* vsetanyeqz.h */, LoongArch::VSETANYEQZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, }, { 9415 /* vsetanyeqz.w */, LoongArch::VSETANYEQZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, }, { 9428 /* vseteqz.v */, LoongArch::VSETEQZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, }, { 9438 /* vsetnez.v */, LoongArch::VSETNEZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, }, { 9448 /* vshuf.b */, LoongArch::VSHUF_B, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9456 /* vshuf.d */, LoongArch::VSHUF_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9464 /* vshuf.h */, LoongArch::VSHUF_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9472 /* vshuf.w */, LoongArch::VSHUF_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9480 /* vshuf4i.b */, LoongArch::VSHUF4I_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 9490 /* vshuf4i.d */, LoongArch::VSHUF4I_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 9500 /* vshuf4i.h */, LoongArch::VSHUF4I_H, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 9510 /* vshuf4i.w */, LoongArch::VSHUF4I_W, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 9520 /* vsigncov.b */, LoongArch::VSIGNCOV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9531 /* vsigncov.d */, LoongArch::VSIGNCOV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9542 /* vsigncov.h */, LoongArch::VSIGNCOV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9553 /* vsigncov.w */, LoongArch::VSIGNCOV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9564 /* vsle.b */, LoongArch::VSLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9571 /* vsle.bu */, LoongArch::VSLE_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9579 /* vsle.d */, LoongArch::VSLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9586 /* vsle.du */, LoongArch::VSLE_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9594 /* vsle.h */, LoongArch::VSLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9601 /* vsle.hu */, LoongArch::VSLE_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9609 /* vsle.w */, LoongArch::VSLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9616 /* vsle.wu */, LoongArch::VSLE_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9624 /* vslei.b */, LoongArch::VSLEI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9632 /* vslei.bu */, LoongArch::VSLEI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9641 /* vslei.d */, LoongArch::VSLEI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9649 /* vslei.du */, LoongArch::VSLEI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9658 /* vslei.h */, LoongArch::VSLEI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9666 /* vslei.hu */, LoongArch::VSLEI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9675 /* vslei.w */, LoongArch::VSLEI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9683 /* vslei.wu */, LoongArch::VSLEI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9692 /* vsll.b */, LoongArch::VSLL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9699 /* vsll.d */, LoongArch::VSLL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9706 /* vsll.h */, LoongArch::VSLL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9713 /* vsll.w */, LoongArch::VSLL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9720 /* vslli.b */, LoongArch::VSLLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 9728 /* vslli.d */, LoongArch::VSLLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 9736 /* vslli.h */, LoongArch::VSLLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 9744 /* vslli.w */, LoongArch::VSLLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9752 /* vsllwil.d.w */, LoongArch::VSLLWIL_D_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9764 /* vsllwil.du.wu */, LoongArch::VSLLWIL_DU_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9778 /* vsllwil.h.b */, LoongArch::VSLLWIL_H_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 9790 /* vsllwil.hu.bu */, LoongArch::VSLLWIL_HU_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 9804 /* vsllwil.w.h */, LoongArch::VSLLWIL_W_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 9816 /* vsllwil.wu.hu */, LoongArch::VSLLWIL_WU_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 9830 /* vslt.b */, LoongArch::VSLT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9837 /* vslt.bu */, LoongArch::VSLT_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9845 /* vslt.d */, LoongArch::VSLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9852 /* vslt.du */, LoongArch::VSLT_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9860 /* vslt.h */, LoongArch::VSLT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9867 /* vslt.hu */, LoongArch::VSLT_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9875 /* vslt.w */, LoongArch::VSLT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9882 /* vslt.wu */, LoongArch::VSLT_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9890 /* vslti.b */, LoongArch::VSLTI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9898 /* vslti.bu */, LoongArch::VSLTI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9907 /* vslti.d */, LoongArch::VSLTI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9915 /* vslti.du */, LoongArch::VSLTI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9924 /* vslti.h */, LoongArch::VSLTI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9932 /* vslti.hu */, LoongArch::VSLTI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9941 /* vslti.w */, LoongArch::VSLTI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, }, { 9949 /* vslti.wu */, LoongArch::VSLTI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 9958 /* vsra.b */, LoongArch::VSRA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9965 /* vsra.d */, LoongArch::VSRA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9972 /* vsra.h */, LoongArch::VSRA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9979 /* vsra.w */, LoongArch::VSRA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 9986 /* vsrai.b */, LoongArch::VSRAI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 9994 /* vsrai.d */, LoongArch::VSRAI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10002 /* vsrai.h */, LoongArch::VSRAI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10010 /* vsrai.w */, LoongArch::VSRAI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10018 /* vsran.b.h */, LoongArch::VSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10028 /* vsran.h.w */, LoongArch::VSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10038 /* vsran.w.d */, LoongArch::VSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10048 /* vsrani.b.h */, LoongArch::VSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10059 /* vsrani.d.q */, LoongArch::VSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 10070 /* vsrani.h.w */, LoongArch::VSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10081 /* vsrani.w.d */, LoongArch::VSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10092 /* vsrar.b */, LoongArch::VSRAR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10100 /* vsrar.d */, LoongArch::VSRAR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10108 /* vsrar.h */, LoongArch::VSRAR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10116 /* vsrar.w */, LoongArch::VSRAR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10124 /* vsrari.b */, LoongArch::VSRARI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 10133 /* vsrari.d */, LoongArch::VSRARI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10142 /* vsrari.h */, LoongArch::VSRARI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10151 /* vsrari.w */, LoongArch::VSRARI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10160 /* vsrarn.b.h */, LoongArch::VSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10171 /* vsrarn.h.w */, LoongArch::VSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10182 /* vsrarn.w.d */, LoongArch::VSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10193 /* vsrarni.b.h */, LoongArch::VSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10205 /* vsrarni.d.q */, LoongArch::VSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 10217 /* vsrarni.h.w */, LoongArch::VSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10229 /* vsrarni.w.d */, LoongArch::VSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10241 /* vsrl.b */, LoongArch::VSRL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10248 /* vsrl.d */, LoongArch::VSRL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10255 /* vsrl.h */, LoongArch::VSRL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10262 /* vsrl.w */, LoongArch::VSRL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10269 /* vsrli.b */, LoongArch::VSRLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 10277 /* vsrli.d */, LoongArch::VSRLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10285 /* vsrli.h */, LoongArch::VSRLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10293 /* vsrli.w */, LoongArch::VSRLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10301 /* vsrln.b.h */, LoongArch::VSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10311 /* vsrln.h.w */, LoongArch::VSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10321 /* vsrln.w.d */, LoongArch::VSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10331 /* vsrlni.b.h */, LoongArch::VSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10342 /* vsrlni.d.q */, LoongArch::VSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 10353 /* vsrlni.h.w */, LoongArch::VSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10364 /* vsrlni.w.d */, LoongArch::VSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10375 /* vsrlr.b */, LoongArch::VSRLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10383 /* vsrlr.d */, LoongArch::VSRLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10391 /* vsrlr.h */, LoongArch::VSRLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10399 /* vsrlr.w */, LoongArch::VSRLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10407 /* vsrlri.b */, LoongArch::VSRLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, }, { 10416 /* vsrlri.d */, LoongArch::VSRLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10425 /* vsrlri.h */, LoongArch::VSRLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10434 /* vsrlri.w */, LoongArch::VSRLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10443 /* vsrlrn.b.h */, LoongArch::VSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10454 /* vsrlrn.h.w */, LoongArch::VSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10465 /* vsrlrn.w.d */, LoongArch::VSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10476 /* vsrlrni.b.h */, LoongArch::VSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10488 /* vsrlrni.d.q */, LoongArch::VSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 10500 /* vsrlrni.h.w */, LoongArch::VSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10512 /* vsrlrni.w.d */, LoongArch::VSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10524 /* vssran.b.h */, LoongArch::VSSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10535 /* vssran.bu.h */, LoongArch::VSSRAN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10547 /* vssran.h.w */, LoongArch::VSSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10558 /* vssran.hu.w */, LoongArch::VSSRAN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10570 /* vssran.w.d */, LoongArch::VSSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10581 /* vssran.wu.d */, LoongArch::VSSRAN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10593 /* vssrani.b.h */, LoongArch::VSSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10605 /* vssrani.bu.h */, LoongArch::VSSRANI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10618 /* vssrani.d.q */, LoongArch::VSSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 10630 /* vssrani.du.q */, LoongArch::VSSRANI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 10643 /* vssrani.h.w */, LoongArch::VSSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10655 /* vssrani.hu.w */, LoongArch::VSSRANI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10668 /* vssrani.w.d */, LoongArch::VSSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10680 /* vssrani.wu.d */, LoongArch::VSSRANI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10693 /* vssrarn.b.h */, LoongArch::VSSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10705 /* vssrarn.bu.h */, LoongArch::VSSRARN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10718 /* vssrarn.h.w */, LoongArch::VSSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10730 /* vssrarn.hu.w */, LoongArch::VSSRARN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10743 /* vssrarn.w.d */, LoongArch::VSSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10755 /* vssrarn.wu.d */, LoongArch::VSSRARN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10768 /* vssrarni.b.h */, LoongArch::VSSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10781 /* vssrarni.bu.h */, LoongArch::VSSRARNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10795 /* vssrarni.d.q */, LoongArch::VSSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 10808 /* vssrarni.du.q */, LoongArch::VSSRARNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 10822 /* vssrarni.h.w */, LoongArch::VSSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10835 /* vssrarni.hu.w */, LoongArch::VSSRARNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 10849 /* vssrarni.w.d */, LoongArch::VSSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10862 /* vssrarni.wu.d */, LoongArch::VSSRARNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 10876 /* vssrln.b.h */, LoongArch::VSSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10887 /* vssrln.bu.h */, LoongArch::VSSRLN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10899 /* vssrln.h.w */, LoongArch::VSSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10910 /* vssrln.hu.w */, LoongArch::VSSRLN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10922 /* vssrln.w.d */, LoongArch::VSSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10933 /* vssrln.wu.d */, LoongArch::VSSRLN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 10945 /* vssrlni.b.h */, LoongArch::VSSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10957 /* vssrlni.bu.h */, LoongArch::VSSRLNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 10970 /* vssrlni.d.q */, LoongArch::VSSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 10982 /* vssrlni.du.q */, LoongArch::VSSRLNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 10995 /* vssrlni.h.w */, LoongArch::VSSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 11007 /* vssrlni.hu.w */, LoongArch::VSSRLNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 11020 /* vssrlni.w.d */, LoongArch::VSSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 11032 /* vssrlni.wu.d */, LoongArch::VSSRLNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 11045 /* vssrlrn.b.h */, LoongArch::VSSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11057 /* vssrlrn.bu.h */, LoongArch::VSSRLRN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11070 /* vssrlrn.h.w */, LoongArch::VSSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11082 /* vssrlrn.hu.w */, LoongArch::VSSRLRN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11095 /* vssrlrn.w.d */, LoongArch::VSSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11107 /* vssrlrn.wu.d */, LoongArch::VSSRLRN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11120 /* vssrlrni.b.h */, LoongArch::VSSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 11133 /* vssrlrni.bu.h */, LoongArch::VSSRLRNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, }, { 11147 /* vssrlrni.d.q */, LoongArch::VSSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 11160 /* vssrlrni.du.q */, LoongArch::VSSRLRNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, }, { 11174 /* vssrlrni.h.w */, LoongArch::VSSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 11187 /* vssrlrni.hu.w */, LoongArch::VSSRLRNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 11201 /* vssrlrni.w.d */, LoongArch::VSSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 11214 /* vssrlrni.wu.d */, LoongArch::VSSRLRNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, }, { 11228 /* vssub.b */, LoongArch::VSSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11236 /* vssub.bu */, LoongArch::VSSUB_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11245 /* vssub.d */, LoongArch::VSSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11253 /* vssub.du */, LoongArch::VSSUB_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11262 /* vssub.h */, LoongArch::VSSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11270 /* vssub.hu */, LoongArch::VSSUB_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11279 /* vssub.w */, LoongArch::VSSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11287 /* vssub.wu */, LoongArch::VSSUB_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11296 /* vst */, LoongArch::VST, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm12 }, }, { 11300 /* vstelm.b */, LoongArch::VSTELM_B, Convert__Reg1_0__Reg1_1__SImm81_2__UImm41_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8, MCK_UImm4 }, }, { 11309 /* vstelm.d */, LoongArch::VSTELM_D, Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm11_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8lsl3, MCK_UImm1 }, }, { 11318 /* vstelm.h */, LoongArch::VSTELM_H, Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm31_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8lsl1, MCK_UImm3 }, }, { 11327 /* vstelm.w */, LoongArch::VSTELM_W, Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm21_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8lsl2, MCK_UImm2 }, }, { 11336 /* vstx */, LoongArch::VSTX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_GPR }, }, { 11341 /* vsub.b */, LoongArch::VSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11348 /* vsub.d */, LoongArch::VSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11355 /* vsub.h */, LoongArch::VSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11362 /* vsub.q */, LoongArch::VSUB_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11369 /* vsub.w */, LoongArch::VSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11376 /* vsubi.bu */, LoongArch::VSUBI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 11385 /* vsubi.du */, LoongArch::VSUBI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 11394 /* vsubi.hu */, LoongArch::VSUBI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 11403 /* vsubi.wu */, LoongArch::VSUBI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, }, { 11412 /* vsubwev.d.w */, LoongArch::VSUBWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11424 /* vsubwev.d.wu */, LoongArch::VSUBWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11437 /* vsubwev.h.b */, LoongArch::VSUBWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11449 /* vsubwev.h.bu */, LoongArch::VSUBWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11462 /* vsubwev.q.d */, LoongArch::VSUBWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11474 /* vsubwev.q.du */, LoongArch::VSUBWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11487 /* vsubwev.w.h */, LoongArch::VSUBWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11499 /* vsubwev.w.hu */, LoongArch::VSUBWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11512 /* vsubwod.d.w */, LoongArch::VSUBWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11524 /* vsubwod.d.wu */, LoongArch::VSUBWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11537 /* vsubwod.h.b */, LoongArch::VSUBWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11549 /* vsubwod.h.bu */, LoongArch::VSUBWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11562 /* vsubwod.q.d */, LoongArch::VSUBWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11574 /* vsubwod.q.du */, LoongArch::VSUBWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11587 /* vsubwod.w.h */, LoongArch::VSUBWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11599 /* vsubwod.w.hu */, LoongArch::VSUBWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11612 /* vxor.v */, LoongArch::VXOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, }, { 11619 /* vxori.b */, LoongArch::VXORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, }, { 11627 /* x86adc.b */, LoongArch::X86ADC_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11636 /* x86adc.d */, LoongArch::X86ADC_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 11645 /* x86adc.h */, LoongArch::X86ADC_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11654 /* x86adc.w */, LoongArch::X86ADC_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11663 /* x86add.b */, LoongArch::X86ADD_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11672 /* x86add.d */, LoongArch::X86ADD_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 11681 /* x86add.du */, LoongArch::X86ADD_DU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 11691 /* x86add.h */, LoongArch::X86ADD_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11700 /* x86add.w */, LoongArch::X86ADD_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11709 /* x86add.wu */, LoongArch::X86ADD_WU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 11719 /* x86and.b */, LoongArch::X86AND_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11728 /* x86and.d */, LoongArch::X86AND_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 11737 /* x86and.h */, LoongArch::X86AND_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11746 /* x86and.w */, LoongArch::X86AND_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11755 /* x86clrtm */, LoongArch::X86CLRTM, Convert_NoOperands, AMFBS_None, { }, }, { 11764 /* x86dec.b */, LoongArch::X86DEC_B, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, }, { 11773 /* x86dec.d */, LoongArch::X86DEC_D, Convert__Reg1_0, AMFBS_IsLA64, { MCK_GPR }, }, { 11782 /* x86dec.h */, LoongArch::X86DEC_H, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, }, { 11791 /* x86dec.w */, LoongArch::X86DEC_W, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, }, { 11800 /* x86dectop */, LoongArch::X86DECTOP, Convert_NoOperands, AMFBS_None, { }, }, { 11810 /* x86inc.b */, LoongArch::X86INC_B, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, }, { 11819 /* x86inc.d */, LoongArch::X86INC_D, Convert__Reg1_0, AMFBS_IsLA64, { MCK_GPR }, }, { 11828 /* x86inc.h */, LoongArch::X86INC_H, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, }, { 11837 /* x86inc.w */, LoongArch::X86INC_W, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, }, { 11846 /* x86inctop */, LoongArch::X86INCTOP, Convert_NoOperands, AMFBS_None, { }, }, { 11856 /* x86mfflag */, LoongArch::X86MFFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, }, { 11866 /* x86mftop */, LoongArch::X86MFTOP, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, }, { 11875 /* x86mtflag */, LoongArch::X86MTFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, }, { 11885 /* x86mttop */, LoongArch::X86MTTOP, Convert__UImm31_0, AMFBS_None, { MCK_UImm3 }, }, { 11894 /* x86mul.b */, LoongArch::X86MUL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11903 /* x86mul.bu */, LoongArch::X86MUL_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11913 /* x86mul.d */, LoongArch::X86MUL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 11922 /* x86mul.du */, LoongArch::X86MUL_DU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 11932 /* x86mul.h */, LoongArch::X86MUL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11941 /* x86mul.hu */, LoongArch::X86MUL_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11951 /* x86mul.w */, LoongArch::X86MUL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11960 /* x86mul.wu */, LoongArch::X86MUL_WU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 11970 /* x86or.b */, LoongArch::X86OR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11978 /* x86or.d */, LoongArch::X86OR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 11986 /* x86or.h */, LoongArch::X86OR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 11994 /* x86or.w */, LoongArch::X86OR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12002 /* x86rcl.b */, LoongArch::X86RCL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12011 /* x86rcl.d */, LoongArch::X86RCL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12020 /* x86rcl.h */, LoongArch::X86RCL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12029 /* x86rcl.w */, LoongArch::X86RCL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12038 /* x86rcli.b */, LoongArch::X86RCLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, }, { 12048 /* x86rcli.d */, LoongArch::X86RCLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, }, { 12058 /* x86rcli.h */, LoongArch::X86RCLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 12068 /* x86rcli.w */, LoongArch::X86RCLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, }, { 12078 /* x86rcr.b */, LoongArch::X86RCR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12087 /* x86rcr.d */, LoongArch::X86RCR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12096 /* x86rcr.h */, LoongArch::X86RCR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12105 /* x86rcr.w */, LoongArch::X86RCR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12114 /* x86rcri.b */, LoongArch::X86RCRI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, }, { 12124 /* x86rcri.d */, LoongArch::X86RCRI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, }, { 12134 /* x86rcri.h */, LoongArch::X86RCRI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 12144 /* x86rcri.w */, LoongArch::X86RCRI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, }, { 12154 /* x86rotl.b */, LoongArch::X86ROTL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12164 /* x86rotl.d */, LoongArch::X86ROTL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12174 /* x86rotl.h */, LoongArch::X86ROTL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12184 /* x86rotl.w */, LoongArch::X86ROTL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12194 /* x86rotli.b */, LoongArch::X86ROTLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, }, { 12205 /* x86rotli.d */, LoongArch::X86ROTLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, }, { 12216 /* x86rotli.h */, LoongArch::X86ROTLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 12227 /* x86rotli.w */, LoongArch::X86ROTLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, }, { 12238 /* x86rotr.b */, LoongArch::X86ROTR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12248 /* x86rotr.d */, LoongArch::X86ROTR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12258 /* x86rotr.h */, LoongArch::X86ROTR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12268 /* x86rotr.w */, LoongArch::X86ROTR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12278 /* x86rotri.b */, LoongArch::X86ROTRI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, }, { 12289 /* x86rotri.d */, LoongArch::X86ROTRI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, }, { 12300 /* x86rotri.h */, LoongArch::X86ROTRI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 12311 /* x86rotri.w */, LoongArch::X86ROTRI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, }, { 12322 /* x86sbc.b */, LoongArch::X86SBC_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12331 /* x86sbc.d */, LoongArch::X86SBC_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12340 /* x86sbc.h */, LoongArch::X86SBC_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12349 /* x86sbc.w */, LoongArch::X86SBC_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12358 /* x86settag */, LoongArch::X86SETTAG, Convert__Reg1_0__UImm51_1__UImm81_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm8 }, }, { 12368 /* x86settm */, LoongArch::X86SETTM, Convert_NoOperands, AMFBS_None, { }, }, { 12377 /* x86sll.b */, LoongArch::X86SLL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12386 /* x86sll.d */, LoongArch::X86SLL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12395 /* x86sll.h */, LoongArch::X86SLL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12404 /* x86sll.w */, LoongArch::X86SLL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12413 /* x86slli.b */, LoongArch::X86SLLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, }, { 12423 /* x86slli.d */, LoongArch::X86SLLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, }, { 12433 /* x86slli.h */, LoongArch::X86SLLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 12443 /* x86slli.w */, LoongArch::X86SLLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, }, { 12453 /* x86sra.b */, LoongArch::X86SRA_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12462 /* x86sra.d */, LoongArch::X86SRA_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12471 /* x86sra.h */, LoongArch::X86SRA_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12480 /* x86sra.w */, LoongArch::X86SRA_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12489 /* x86srai.b */, LoongArch::X86SRAI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, }, { 12499 /* x86srai.d */, LoongArch::X86SRAI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, }, { 12509 /* x86srai.h */, LoongArch::X86SRAI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 12519 /* x86srai.w */, LoongArch::X86SRAI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, }, { 12529 /* x86srl.b */, LoongArch::X86SRL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12538 /* x86srl.d */, LoongArch::X86SRL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12547 /* x86srl.h */, LoongArch::X86SRL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12556 /* x86srl.w */, LoongArch::X86SRL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12565 /* x86srli.b */, LoongArch::X86SRLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, }, { 12575 /* x86srli.d */, LoongArch::X86SRLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, }, { 12585 /* x86srli.h */, LoongArch::X86SRLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, }, { 12595 /* x86srli.w */, LoongArch::X86SRLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, }, { 12605 /* x86sub.b */, LoongArch::X86SUB_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12614 /* x86sub.d */, LoongArch::X86SUB_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12623 /* x86sub.du */, LoongArch::X86SUB_DU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12633 /* x86sub.h */, LoongArch::X86SUB_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12642 /* x86sub.w */, LoongArch::X86SUB_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12651 /* x86sub.wu */, LoongArch::X86SUB_WU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12661 /* x86xor.b */, LoongArch::X86XOR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12670 /* x86xor.d */, LoongArch::X86XOR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, { 12679 /* x86xor.h */, LoongArch::X86XOR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12688 /* x86xor.w */, LoongArch::X86XOR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, { 12697 /* xor */, LoongArch::XOR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, { 12701 /* xori */, LoongArch::XORI, Convert__Reg1_0__Reg1_1__UImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12 }, }, { 12706 /* xvabsd.b */, LoongArch::XVABSD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12715 /* xvabsd.bu */, LoongArch::XVABSD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12725 /* xvabsd.d */, LoongArch::XVABSD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12734 /* xvabsd.du */, LoongArch::XVABSD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12744 /* xvabsd.h */, LoongArch::XVABSD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12753 /* xvabsd.hu */, LoongArch::XVABSD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12763 /* xvabsd.w */, LoongArch::XVABSD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12772 /* xvabsd.wu */, LoongArch::XVABSD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12782 /* xvadd.b */, LoongArch::XVADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12790 /* xvadd.d */, LoongArch::XVADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12798 /* xvadd.h */, LoongArch::XVADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12806 /* xvadd.q */, LoongArch::XVADD_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12814 /* xvadd.w */, LoongArch::XVADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12822 /* xvadda.b */, LoongArch::XVADDA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12831 /* xvadda.d */, LoongArch::XVADDA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12840 /* xvadda.h */, LoongArch::XVADDA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12849 /* xvadda.w */, LoongArch::XVADDA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12858 /* xvaddi.bu */, LoongArch::XVADDI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 12868 /* xvaddi.du */, LoongArch::XVADDI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 12878 /* xvaddi.hu */, LoongArch::XVADDI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 12888 /* xvaddi.wu */, LoongArch::XVADDI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 12898 /* xvaddwev.d.w */, LoongArch::XVADDWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12911 /* xvaddwev.d.wu */, LoongArch::XVADDWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12925 /* xvaddwev.d.wu.w */, LoongArch::XVADDWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12941 /* xvaddwev.h.b */, LoongArch::XVADDWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12954 /* xvaddwev.h.bu */, LoongArch::XVADDWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12968 /* xvaddwev.h.bu.b */, LoongArch::XVADDWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12984 /* xvaddwev.q.d */, LoongArch::XVADDWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 12997 /* xvaddwev.q.du */, LoongArch::XVADDWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13011 /* xvaddwev.q.du.d */, LoongArch::XVADDWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13027 /* xvaddwev.w.h */, LoongArch::XVADDWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13040 /* xvaddwev.w.hu */, LoongArch::XVADDWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13054 /* xvaddwev.w.hu.h */, LoongArch::XVADDWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13070 /* xvaddwod.d.w */, LoongArch::XVADDWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13083 /* xvaddwod.d.wu */, LoongArch::XVADDWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13097 /* xvaddwod.d.wu.w */, LoongArch::XVADDWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13113 /* xvaddwod.h.b */, LoongArch::XVADDWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13126 /* xvaddwod.h.bu */, LoongArch::XVADDWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13140 /* xvaddwod.h.bu.b */, LoongArch::XVADDWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13156 /* xvaddwod.q.d */, LoongArch::XVADDWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13169 /* xvaddwod.q.du */, LoongArch::XVADDWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13183 /* xvaddwod.q.du.d */, LoongArch::XVADDWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13199 /* xvaddwod.w.h */, LoongArch::XVADDWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13212 /* xvaddwod.w.hu */, LoongArch::XVADDWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13226 /* xvaddwod.w.hu.h */, LoongArch::XVADDWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13242 /* xvand.v */, LoongArch::XVAND_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13250 /* xvandi.b */, LoongArch::XVANDI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 13259 /* xvandn.v */, LoongArch::XVANDN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13268 /* xvavg.b */, LoongArch::XVAVG_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13276 /* xvavg.bu */, LoongArch::XVAVG_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13285 /* xvavg.d */, LoongArch::XVAVG_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13293 /* xvavg.du */, LoongArch::XVAVG_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13302 /* xvavg.h */, LoongArch::XVAVG_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13310 /* xvavg.hu */, LoongArch::XVAVG_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13319 /* xvavg.w */, LoongArch::XVAVG_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13327 /* xvavg.wu */, LoongArch::XVAVG_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13336 /* xvavgr.b */, LoongArch::XVAVGR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13345 /* xvavgr.bu */, LoongArch::XVAVGR_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13355 /* xvavgr.d */, LoongArch::XVAVGR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13364 /* xvavgr.du */, LoongArch::XVAVGR_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13374 /* xvavgr.h */, LoongArch::XVAVGR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13383 /* xvavgr.hu */, LoongArch::XVAVGR_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13393 /* xvavgr.w */, LoongArch::XVAVGR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13402 /* xvavgr.wu */, LoongArch::XVAVGR_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13412 /* xvbitclr.b */, LoongArch::XVBITCLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13423 /* xvbitclr.d */, LoongArch::XVBITCLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13434 /* xvbitclr.h */, LoongArch::XVBITCLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13445 /* xvbitclr.w */, LoongArch::XVBITCLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13456 /* xvbitclri.b */, LoongArch::XVBITCLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 13468 /* xvbitclri.d */, LoongArch::XVBITCLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 13480 /* xvbitclri.h */, LoongArch::XVBITCLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 13492 /* xvbitclri.w */, LoongArch::XVBITCLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 13504 /* xvbitrev.b */, LoongArch::XVBITREV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13515 /* xvbitrev.d */, LoongArch::XVBITREV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13526 /* xvbitrev.h */, LoongArch::XVBITREV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13537 /* xvbitrev.w */, LoongArch::XVBITREV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13548 /* xvbitrevi.b */, LoongArch::XVBITREVI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 13560 /* xvbitrevi.d */, LoongArch::XVBITREVI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 13572 /* xvbitrevi.h */, LoongArch::XVBITREVI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 13584 /* xvbitrevi.w */, LoongArch::XVBITREVI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 13596 /* xvbitsel.v */, LoongArch::XVBITSEL_V, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13607 /* xvbitseli.b */, LoongArch::XVBITSELI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 13619 /* xvbitset.b */, LoongArch::XVBITSET_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13630 /* xvbitset.d */, LoongArch::XVBITSET_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13641 /* xvbitset.h */, LoongArch::XVBITSET_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13652 /* xvbitset.w */, LoongArch::XVBITSET_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13663 /* xvbitseti.b */, LoongArch::XVBITSETI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 13675 /* xvbitseti.d */, LoongArch::XVBITSETI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 13687 /* xvbitseti.h */, LoongArch::XVBITSETI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 13699 /* xvbitseti.w */, LoongArch::XVBITSETI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 13711 /* xvbsll.v */, LoongArch::XVBSLL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 13720 /* xvbsrl.v */, LoongArch::XVBSRL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 13729 /* xvclo.b */, LoongArch::XVCLO_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13737 /* xvclo.d */, LoongArch::XVCLO_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13745 /* xvclo.h */, LoongArch::XVCLO_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13753 /* xvclo.w */, LoongArch::XVCLO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13761 /* xvclz.b */, LoongArch::XVCLZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13769 /* xvclz.d */, LoongArch::XVCLZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13777 /* xvclz.h */, LoongArch::XVCLZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13785 /* xvclz.w */, LoongArch::XVCLZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13793 /* xvdiv.b */, LoongArch::XVDIV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13801 /* xvdiv.bu */, LoongArch::XVDIV_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13810 /* xvdiv.d */, LoongArch::XVDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13818 /* xvdiv.du */, LoongArch::XVDIV_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13827 /* xvdiv.h */, LoongArch::XVDIV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13835 /* xvdiv.hu */, LoongArch::XVDIV_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13844 /* xvdiv.w */, LoongArch::XVDIV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13852 /* xvdiv.wu */, LoongArch::XVDIV_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 13861 /* xvexth.d.w */, LoongArch::XVEXTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13872 /* xvexth.du.wu */, LoongArch::XVEXTH_DU_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13885 /* xvexth.h.b */, LoongArch::XVEXTH_H_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13896 /* xvexth.hu.bu */, LoongArch::XVEXTH_HU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13909 /* xvexth.q.d */, LoongArch::XVEXTH_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13920 /* xvexth.qu.du */, LoongArch::XVEXTH_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13933 /* xvexth.w.h */, LoongArch::XVEXTH_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13944 /* xvexth.wu.hu */, LoongArch::XVEXTH_WU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13957 /* xvextl.q.d */, LoongArch::XVEXTL_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13968 /* xvextl.qu.du */, LoongArch::XVEXTL_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 13981 /* xvextrins.b */, LoongArch::XVEXTRINS_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 13993 /* xvextrins.d */, LoongArch::XVEXTRINS_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 14005 /* xvextrins.h */, LoongArch::XVEXTRINS_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 14017 /* xvextrins.w */, LoongArch::XVEXTRINS_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 14029 /* xvfadd.d */, LoongArch::XVFADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14038 /* xvfadd.s */, LoongArch::XVFADD_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14047 /* xvfclass.d */, LoongArch::XVFCLASS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14058 /* xvfclass.s */, LoongArch::XVFCLASS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14069 /* xvfcmp.caf.d */, LoongArch::XVFCMP_CAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14082 /* xvfcmp.caf.s */, LoongArch::XVFCMP_CAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14095 /* xvfcmp.ceq.d */, LoongArch::XVFCMP_CEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14108 /* xvfcmp.ceq.s */, LoongArch::XVFCMP_CEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14121 /* xvfcmp.cle.d */, LoongArch::XVFCMP_CLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14134 /* xvfcmp.cle.s */, LoongArch::XVFCMP_CLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14147 /* xvfcmp.clt.d */, LoongArch::XVFCMP_CLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14160 /* xvfcmp.clt.s */, LoongArch::XVFCMP_CLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14173 /* xvfcmp.cne.d */, LoongArch::XVFCMP_CNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14186 /* xvfcmp.cne.s */, LoongArch::XVFCMP_CNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14199 /* xvfcmp.cor.d */, LoongArch::XVFCMP_COR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14212 /* xvfcmp.cor.s */, LoongArch::XVFCMP_COR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14225 /* xvfcmp.cueq.d */, LoongArch::XVFCMP_CUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14239 /* xvfcmp.cueq.s */, LoongArch::XVFCMP_CUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14253 /* xvfcmp.cule.d */, LoongArch::XVFCMP_CULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14267 /* xvfcmp.cule.s */, LoongArch::XVFCMP_CULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14281 /* xvfcmp.cult.d */, LoongArch::XVFCMP_CULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14295 /* xvfcmp.cult.s */, LoongArch::XVFCMP_CULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14309 /* xvfcmp.cun.d */, LoongArch::XVFCMP_CUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14322 /* xvfcmp.cun.s */, LoongArch::XVFCMP_CUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14335 /* xvfcmp.cune.d */, LoongArch::XVFCMP_CUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14349 /* xvfcmp.cune.s */, LoongArch::XVFCMP_CUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14363 /* xvfcmp.saf.d */, LoongArch::XVFCMP_SAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14376 /* xvfcmp.saf.s */, LoongArch::XVFCMP_SAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14389 /* xvfcmp.seq.d */, LoongArch::XVFCMP_SEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14402 /* xvfcmp.seq.s */, LoongArch::XVFCMP_SEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14415 /* xvfcmp.sle.d */, LoongArch::XVFCMP_SLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14428 /* xvfcmp.sle.s */, LoongArch::XVFCMP_SLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14441 /* xvfcmp.slt.d */, LoongArch::XVFCMP_SLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14454 /* xvfcmp.slt.s */, LoongArch::XVFCMP_SLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14467 /* xvfcmp.sne.d */, LoongArch::XVFCMP_SNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14480 /* xvfcmp.sne.s */, LoongArch::XVFCMP_SNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14493 /* xvfcmp.sor.d */, LoongArch::XVFCMP_SOR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14506 /* xvfcmp.sor.s */, LoongArch::XVFCMP_SOR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14519 /* xvfcmp.sueq.d */, LoongArch::XVFCMP_SUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14533 /* xvfcmp.sueq.s */, LoongArch::XVFCMP_SUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14547 /* xvfcmp.sule.d */, LoongArch::XVFCMP_SULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14561 /* xvfcmp.sule.s */, LoongArch::XVFCMP_SULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14575 /* xvfcmp.sult.d */, LoongArch::XVFCMP_SULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14589 /* xvfcmp.sult.s */, LoongArch::XVFCMP_SULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14603 /* xvfcmp.sun.d */, LoongArch::XVFCMP_SUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14616 /* xvfcmp.sun.s */, LoongArch::XVFCMP_SUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14629 /* xvfcmp.sune.d */, LoongArch::XVFCMP_SUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14643 /* xvfcmp.sune.s */, LoongArch::XVFCMP_SUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14657 /* xvfcvt.h.s */, LoongArch::XVFCVT_H_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14668 /* xvfcvt.s.d */, LoongArch::XVFCVT_S_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14679 /* xvfcvth.d.s */, LoongArch::XVFCVTH_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14691 /* xvfcvth.s.h */, LoongArch::XVFCVTH_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14703 /* xvfcvtl.d.s */, LoongArch::XVFCVTL_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14715 /* xvfcvtl.s.h */, LoongArch::XVFCVTL_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14727 /* xvfdiv.d */, LoongArch::XVFDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14736 /* xvfdiv.s */, LoongArch::XVFDIV_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14745 /* xvffint.d.l */, LoongArch::XVFFINT_D_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14757 /* xvffint.d.lu */, LoongArch::XVFFINT_D_LU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14770 /* xvffint.s.l */, LoongArch::XVFFINT_S_L, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14782 /* xvffint.s.w */, LoongArch::XVFFINT_S_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14794 /* xvffint.s.wu */, LoongArch::XVFFINT_S_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14807 /* xvffinth.d.w */, LoongArch::XVFFINTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14820 /* xvffintl.d.w */, LoongArch::XVFFINTL_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14833 /* xvflogb.d */, LoongArch::XVFLOGB_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14843 /* xvflogb.s */, LoongArch::XVFLOGB_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 14853 /* xvfmadd.d */, LoongArch::XVFMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14863 /* xvfmadd.s */, LoongArch::XVFMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14873 /* xvfmax.d */, LoongArch::XVFMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14882 /* xvfmax.s */, LoongArch::XVFMAX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14891 /* xvfmaxa.d */, LoongArch::XVFMAXA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14901 /* xvfmaxa.s */, LoongArch::XVFMAXA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14911 /* xvfmin.d */, LoongArch::XVFMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14920 /* xvfmin.s */, LoongArch::XVFMIN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14929 /* xvfmina.d */, LoongArch::XVFMINA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14939 /* xvfmina.s */, LoongArch::XVFMINA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14949 /* xvfmsub.d */, LoongArch::XVFMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14959 /* xvfmsub.s */, LoongArch::XVFMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14969 /* xvfmul.d */, LoongArch::XVFMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14978 /* xvfmul.s */, LoongArch::XVFMUL_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14987 /* xvfnmadd.d */, LoongArch::XVFNMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 14998 /* xvfnmadd.s */, LoongArch::XVFNMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15009 /* xvfnmsub.d */, LoongArch::XVFNMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15020 /* xvfnmsub.s */, LoongArch::XVFNMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15031 /* xvfrecip.d */, LoongArch::XVFRECIP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15042 /* xvfrecip.s */, LoongArch::XVFRECIP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15053 /* xvfrecipe.d */, LoongArch::XVFRECIPE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15065 /* xvfrecipe.s */, LoongArch::XVFRECIPE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15077 /* xvfrint.d */, LoongArch::XVFRINT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15087 /* xvfrint.s */, LoongArch::XVFRINT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15097 /* xvfrintrm.d */, LoongArch::XVFRINTRM_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15109 /* xvfrintrm.s */, LoongArch::XVFRINTRM_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15121 /* xvfrintrne.d */, LoongArch::XVFRINTRNE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15134 /* xvfrintrne.s */, LoongArch::XVFRINTRNE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15147 /* xvfrintrp.d */, LoongArch::XVFRINTRP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15159 /* xvfrintrp.s */, LoongArch::XVFRINTRP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15171 /* xvfrintrz.d */, LoongArch::XVFRINTRZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15183 /* xvfrintrz.s */, LoongArch::XVFRINTRZ_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15195 /* xvfrsqrt.d */, LoongArch::XVFRSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15206 /* xvfrsqrt.s */, LoongArch::XVFRSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15217 /* xvfrsqrte.d */, LoongArch::XVFRSQRTE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15229 /* xvfrsqrte.s */, LoongArch::XVFRSQRTE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15241 /* xvfrstp.b */, LoongArch::XVFRSTP_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15251 /* xvfrstp.h */, LoongArch::XVFRSTP_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15261 /* xvfrstpi.b */, LoongArch::XVFRSTPI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 15272 /* xvfrstpi.h */, LoongArch::XVFRSTPI_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 15283 /* xvfsqrt.d */, LoongArch::XVFSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15293 /* xvfsqrt.s */, LoongArch::XVFSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15303 /* xvfsub.d */, LoongArch::XVFSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15312 /* xvfsub.s */, LoongArch::XVFSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15321 /* xvftint.l.d */, LoongArch::XVFTINT_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15333 /* xvftint.lu.d */, LoongArch::XVFTINT_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15346 /* xvftint.w.d */, LoongArch::XVFTINT_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15358 /* xvftint.w.s */, LoongArch::XVFTINT_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15370 /* xvftint.wu.s */, LoongArch::XVFTINT_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15383 /* xvftinth.l.s */, LoongArch::XVFTINTH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15396 /* xvftintl.l.s */, LoongArch::XVFTINTL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15409 /* xvftintrm.l.d */, LoongArch::XVFTINTRM_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15423 /* xvftintrm.w.d */, LoongArch::XVFTINTRM_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15437 /* xvftintrm.w.s */, LoongArch::XVFTINTRM_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15451 /* xvftintrmh.l.s */, LoongArch::XVFTINTRMH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15466 /* xvftintrml.l.s */, LoongArch::XVFTINTRML_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15481 /* xvftintrne.l.d */, LoongArch::XVFTINTRNE_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15496 /* xvftintrne.w.d */, LoongArch::XVFTINTRNE_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15511 /* xvftintrne.w.s */, LoongArch::XVFTINTRNE_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15526 /* xvftintrneh.l.s */, LoongArch::XVFTINTRNEH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15542 /* xvftintrnel.l.s */, LoongArch::XVFTINTRNEL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15558 /* xvftintrp.l.d */, LoongArch::XVFTINTRP_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15572 /* xvftintrp.w.d */, LoongArch::XVFTINTRP_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15586 /* xvftintrp.w.s */, LoongArch::XVFTINTRP_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15600 /* xvftintrph.l.s */, LoongArch::XVFTINTRPH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15615 /* xvftintrpl.l.s */, LoongArch::XVFTINTRPL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15630 /* xvftintrz.l.d */, LoongArch::XVFTINTRZ_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15644 /* xvftintrz.lu.d */, LoongArch::XVFTINTRZ_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15659 /* xvftintrz.w.d */, LoongArch::XVFTINTRZ_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15673 /* xvftintrz.w.s */, LoongArch::XVFTINTRZ_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15687 /* xvftintrz.wu.s */, LoongArch::XVFTINTRZ_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15702 /* xvftintrzh.l.s */, LoongArch::XVFTINTRZH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15717 /* xvftintrzl.l.s */, LoongArch::XVFTINTRZL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 15732 /* xvhaddw.d.w */, LoongArch::XVHADDW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15744 /* xvhaddw.du.wu */, LoongArch::XVHADDW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15758 /* xvhaddw.h.b */, LoongArch::XVHADDW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15770 /* xvhaddw.hu.bu */, LoongArch::XVHADDW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15784 /* xvhaddw.q.d */, LoongArch::XVHADDW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15796 /* xvhaddw.qu.du */, LoongArch::XVHADDW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15810 /* xvhaddw.w.h */, LoongArch::XVHADDW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15822 /* xvhaddw.wu.hu */, LoongArch::XVHADDW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15836 /* xvhseli.d */, LoongArch::XVHSELI_D, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 15846 /* xvhsubw.d.w */, LoongArch::XVHSUBW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15858 /* xvhsubw.du.wu */, LoongArch::XVHSUBW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15872 /* xvhsubw.h.b */, LoongArch::XVHSUBW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15884 /* xvhsubw.hu.bu */, LoongArch::XVHSUBW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15898 /* xvhsubw.q.d */, LoongArch::XVHSUBW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15910 /* xvhsubw.qu.du */, LoongArch::XVHSUBW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15924 /* xvhsubw.w.h */, LoongArch::XVHSUBW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15936 /* xvhsubw.wu.hu */, LoongArch::XVHSUBW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15950 /* xvilvh.b */, LoongArch::XVILVH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15959 /* xvilvh.d */, LoongArch::XVILVH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15968 /* xvilvh.h */, LoongArch::XVILVH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15977 /* xvilvh.w */, LoongArch::XVILVH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15986 /* xvilvl.b */, LoongArch::XVILVL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 15995 /* xvilvl.d */, LoongArch::XVILVL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16004 /* xvilvl.h */, LoongArch::XVILVL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16013 /* xvilvl.w */, LoongArch::XVILVL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16022 /* xvinsgr2vr.d */, LoongArch::XVINSGR2VR_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_UImm2 }, }, { 16035 /* xvinsgr2vr.w */, LoongArch::XVINSGR2VR_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_UImm3 }, }, { 16048 /* xvinsve0.d */, LoongArch::XVINSVE0_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm2 }, }, { 16059 /* xvinsve0.w */, LoongArch::XVINSVE0_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 16070 /* xvld */, LoongArch::XVLD, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm12 }, }, { 16075 /* xvldi */, LoongArch::XVLDI, Convert__Reg1_0__SImm131_1, AMFBS_None, { MCK_LASX256, MCK_SImm13 }, }, { 16081 /* xvldrepl.b */, LoongArch::XVLDREPL_B, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm12 }, }, { 16092 /* xvldrepl.d */, LoongArch::XVLDREPL_D, Convert__Reg1_0__Reg1_1__SImm9lsl31_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm9lsl3 }, }, { 16103 /* xvldrepl.h */, LoongArch::XVLDREPL_H, Convert__Reg1_0__Reg1_1__SImm11lsl11_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm11lsl1 }, }, { 16114 /* xvldrepl.w */, LoongArch::XVLDREPL_W, Convert__Reg1_0__Reg1_1__SImm10lsl21_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm10lsl2 }, }, { 16125 /* xvldx */, LoongArch::XVLDX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_GPR }, }, { 16131 /* xvmadd.b */, LoongArch::XVMADD_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16140 /* xvmadd.d */, LoongArch::XVMADD_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16149 /* xvmadd.h */, LoongArch::XVMADD_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16158 /* xvmadd.w */, LoongArch::XVMADD_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16167 /* xvmaddwev.d.w */, LoongArch::XVMADDWEV_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16181 /* xvmaddwev.d.wu */, LoongArch::XVMADDWEV_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16196 /* xvmaddwev.d.wu.w */, LoongArch::XVMADDWEV_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16213 /* xvmaddwev.h.b */, LoongArch::XVMADDWEV_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16227 /* xvmaddwev.h.bu */, LoongArch::XVMADDWEV_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16242 /* xvmaddwev.h.bu.b */, LoongArch::XVMADDWEV_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16259 /* xvmaddwev.q.d */, LoongArch::XVMADDWEV_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16273 /* xvmaddwev.q.du */, LoongArch::XVMADDWEV_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16288 /* xvmaddwev.q.du.d */, LoongArch::XVMADDWEV_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16305 /* xvmaddwev.w.h */, LoongArch::XVMADDWEV_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16319 /* xvmaddwev.w.hu */, LoongArch::XVMADDWEV_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16334 /* xvmaddwev.w.hu.h */, LoongArch::XVMADDWEV_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16351 /* xvmaddwod.d.w */, LoongArch::XVMADDWOD_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16365 /* xvmaddwod.d.wu */, LoongArch::XVMADDWOD_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16380 /* xvmaddwod.d.wu.w */, LoongArch::XVMADDWOD_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16397 /* xvmaddwod.h.b */, LoongArch::XVMADDWOD_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16411 /* xvmaddwod.h.bu */, LoongArch::XVMADDWOD_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16426 /* xvmaddwod.h.bu.b */, LoongArch::XVMADDWOD_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16443 /* xvmaddwod.q.d */, LoongArch::XVMADDWOD_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16457 /* xvmaddwod.q.du */, LoongArch::XVMADDWOD_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16472 /* xvmaddwod.q.du.d */, LoongArch::XVMADDWOD_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16489 /* xvmaddwod.w.h */, LoongArch::XVMADDWOD_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16503 /* xvmaddwod.w.hu */, LoongArch::XVMADDWOD_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16518 /* xvmaddwod.w.hu.h */, LoongArch::XVMADDWOD_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16535 /* xvmax.b */, LoongArch::XVMAX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16543 /* xvmax.bu */, LoongArch::XVMAX_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16552 /* xvmax.d */, LoongArch::XVMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16560 /* xvmax.du */, LoongArch::XVMAX_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16569 /* xvmax.h */, LoongArch::XVMAX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16577 /* xvmax.hu */, LoongArch::XVMAX_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16586 /* xvmax.w */, LoongArch::XVMAX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16594 /* xvmax.wu */, LoongArch::XVMAX_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16603 /* xvmaxi.b */, LoongArch::XVMAXI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 16612 /* xvmaxi.bu */, LoongArch::XVMAXI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 16622 /* xvmaxi.d */, LoongArch::XVMAXI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 16631 /* xvmaxi.du */, LoongArch::XVMAXI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 16641 /* xvmaxi.h */, LoongArch::XVMAXI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 16650 /* xvmaxi.hu */, LoongArch::XVMAXI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 16660 /* xvmaxi.w */, LoongArch::XVMAXI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 16669 /* xvmaxi.wu */, LoongArch::XVMAXI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 16679 /* xvmin.b */, LoongArch::XVMIN_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16687 /* xvmin.bu */, LoongArch::XVMIN_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16696 /* xvmin.d */, LoongArch::XVMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16704 /* xvmin.du */, LoongArch::XVMIN_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16713 /* xvmin.h */, LoongArch::XVMIN_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16721 /* xvmin.hu */, LoongArch::XVMIN_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16730 /* xvmin.w */, LoongArch::XVMIN_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16738 /* xvmin.wu */, LoongArch::XVMIN_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16747 /* xvmini.b */, LoongArch::XVMINI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 16756 /* xvmini.bu */, LoongArch::XVMINI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 16766 /* xvmini.d */, LoongArch::XVMINI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 16775 /* xvmini.du */, LoongArch::XVMINI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 16785 /* xvmini.h */, LoongArch::XVMINI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 16794 /* xvmini.hu */, LoongArch::XVMINI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 16804 /* xvmini.w */, LoongArch::XVMINI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 16813 /* xvmini.wu */, LoongArch::XVMINI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 16823 /* xvmod.b */, LoongArch::XVMOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16831 /* xvmod.bu */, LoongArch::XVMOD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16840 /* xvmod.d */, LoongArch::XVMOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16848 /* xvmod.du */, LoongArch::XVMOD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16857 /* xvmod.h */, LoongArch::XVMOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16865 /* xvmod.hu */, LoongArch::XVMOD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16874 /* xvmod.w */, LoongArch::XVMOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16882 /* xvmod.wu */, LoongArch::XVMOD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16891 /* xvmskgez.b */, LoongArch::XVMSKGEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 16902 /* xvmskltz.b */, LoongArch::XVMSKLTZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 16913 /* xvmskltz.d */, LoongArch::XVMSKLTZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 16924 /* xvmskltz.h */, LoongArch::XVMSKLTZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 16935 /* xvmskltz.w */, LoongArch::XVMSKLTZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 16946 /* xvmsknz.b */, LoongArch::XVMSKNZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 16956 /* xvmsub.b */, LoongArch::XVMSUB_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16965 /* xvmsub.d */, LoongArch::XVMSUB_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16974 /* xvmsub.h */, LoongArch::XVMSUB_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16983 /* xvmsub.w */, LoongArch::XVMSUB_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 16992 /* xvmuh.b */, LoongArch::XVMUH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17000 /* xvmuh.bu */, LoongArch::XVMUH_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17009 /* xvmuh.d */, LoongArch::XVMUH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17017 /* xvmuh.du */, LoongArch::XVMUH_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17026 /* xvmuh.h */, LoongArch::XVMUH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17034 /* xvmuh.hu */, LoongArch::XVMUH_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17043 /* xvmuh.w */, LoongArch::XVMUH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17051 /* xvmuh.wu */, LoongArch::XVMUH_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17060 /* xvmul.b */, LoongArch::XVMUL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17068 /* xvmul.d */, LoongArch::XVMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17076 /* xvmul.h */, LoongArch::XVMUL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17084 /* xvmul.w */, LoongArch::XVMUL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17092 /* xvmulwev.d.w */, LoongArch::XVMULWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17105 /* xvmulwev.d.wu */, LoongArch::XVMULWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17119 /* xvmulwev.d.wu.w */, LoongArch::XVMULWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17135 /* xvmulwev.h.b */, LoongArch::XVMULWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17148 /* xvmulwev.h.bu */, LoongArch::XVMULWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17162 /* xvmulwev.h.bu.b */, LoongArch::XVMULWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17178 /* xvmulwev.q.d */, LoongArch::XVMULWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17191 /* xvmulwev.q.du */, LoongArch::XVMULWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17205 /* xvmulwev.q.du.d */, LoongArch::XVMULWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17221 /* xvmulwev.w.h */, LoongArch::XVMULWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17234 /* xvmulwev.w.hu */, LoongArch::XVMULWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17248 /* xvmulwev.w.hu.h */, LoongArch::XVMULWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17264 /* xvmulwod.d.w */, LoongArch::XVMULWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17277 /* xvmulwod.d.wu */, LoongArch::XVMULWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17291 /* xvmulwod.d.wu.w */, LoongArch::XVMULWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17307 /* xvmulwod.h.b */, LoongArch::XVMULWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17320 /* xvmulwod.h.bu */, LoongArch::XVMULWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17334 /* xvmulwod.h.bu.b */, LoongArch::XVMULWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17350 /* xvmulwod.q.d */, LoongArch::XVMULWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17363 /* xvmulwod.q.du */, LoongArch::XVMULWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17377 /* xvmulwod.q.du.d */, LoongArch::XVMULWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17393 /* xvmulwod.w.h */, LoongArch::XVMULWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17406 /* xvmulwod.w.hu */, LoongArch::XVMULWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17420 /* xvmulwod.w.hu.h */, LoongArch::XVMULWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17436 /* xvneg.b */, LoongArch::XVNEG_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 17444 /* xvneg.d */, LoongArch::XVNEG_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 17452 /* xvneg.h */, LoongArch::XVNEG_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 17460 /* xvneg.w */, LoongArch::XVNEG_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 17468 /* xvnor.v */, LoongArch::XVNOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17476 /* xvnori.b */, LoongArch::XVNORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 17485 /* xvor.v */, LoongArch::XVOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17492 /* xvori.b */, LoongArch::XVORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 17500 /* xvorn.v */, LoongArch::XVORN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17508 /* xvpackev.b */, LoongArch::XVPACKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17519 /* xvpackev.d */, LoongArch::XVPACKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17530 /* xvpackev.h */, LoongArch::XVPACKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17541 /* xvpackev.w */, LoongArch::XVPACKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17552 /* xvpackod.b */, LoongArch::XVPACKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17563 /* xvpackod.d */, LoongArch::XVPACKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17574 /* xvpackod.h */, LoongArch::XVPACKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17585 /* xvpackod.w */, LoongArch::XVPACKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17596 /* xvpcnt.b */, LoongArch::XVPCNT_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 17605 /* xvpcnt.d */, LoongArch::XVPCNT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 17614 /* xvpcnt.h */, LoongArch::XVPCNT_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 17623 /* xvpcnt.w */, LoongArch::XVPCNT_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 17632 /* xvperm.w */, LoongArch::XVPERM_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17641 /* xvpermi.d */, LoongArch::XVPERMI_D, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 17651 /* xvpermi.q */, LoongArch::XVPERMI_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 17661 /* xvpermi.w */, LoongArch::XVPERMI_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 17671 /* xvpickev.b */, LoongArch::XVPICKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17682 /* xvpickev.d */, LoongArch::XVPICKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17693 /* xvpickev.h */, LoongArch::XVPICKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17704 /* xvpickev.w */, LoongArch::XVPICKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17715 /* xvpickod.b */, LoongArch::XVPICKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17726 /* xvpickod.d */, LoongArch::XVPICKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17737 /* xvpickod.h */, LoongArch::XVPICKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17748 /* xvpickod.w */, LoongArch::XVPICKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 17759 /* xvpickve.d */, LoongArch::XVPICKVE_D, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm2 }, }, { 17770 /* xvpickve.w */, LoongArch::XVPICKVE_W, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 17781 /* xvpickve2gr.d */, LoongArch::XVPICKVE2GR_D, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm2 }, }, { 17795 /* xvpickve2gr.du */, LoongArch::XVPICKVE2GR_DU, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm2 }, }, { 17810 /* xvpickve2gr.w */, LoongArch::XVPICKVE2GR_W, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm3 }, }, { 17824 /* xvpickve2gr.wu */, LoongArch::XVPICKVE2GR_WU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm3 }, }, { 17839 /* xvrepl128vei.b */, LoongArch::XVREPL128VEI_B, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 17854 /* xvrepl128vei.d */, LoongArch::XVREPL128VEI_D, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm1 }, }, { 17869 /* xvrepl128vei.h */, LoongArch::XVREPL128VEI_H, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 17884 /* xvrepl128vei.w */, LoongArch::XVREPL128VEI_W, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm2 }, }, { 17899 /* xvreplgr2vr.b */, LoongArch::XVREPLGR2VR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, }, { 17913 /* xvreplgr2vr.d */, LoongArch::XVREPLGR2VR_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, }, { 17927 /* xvreplgr2vr.h */, LoongArch::XVREPLGR2VR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, }, { 17941 /* xvreplgr2vr.w */, LoongArch::XVREPLGR2VR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, }, { 17955 /* xvrepli.b */, LoongArch::PseudoXVREPLI_B, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, }, { 17965 /* xvrepli.d */, LoongArch::PseudoXVREPLI_D, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, }, { 17975 /* xvrepli.h */, LoongArch::PseudoXVREPLI_H, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, }, { 17985 /* xvrepli.w */, LoongArch::PseudoXVREPLI_W, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, }, { 17995 /* xvreplve.b */, LoongArch::XVREPLVE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, }, { 18006 /* xvreplve.d */, LoongArch::XVREPLVE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, }, { 18017 /* xvreplve.h */, LoongArch::XVREPLVE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, }, { 18028 /* xvreplve.w */, LoongArch::XVREPLVE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, }, { 18039 /* xvreplve0.b */, LoongArch::XVREPLVE0_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 18051 /* xvreplve0.d */, LoongArch::XVREPLVE0_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 18063 /* xvreplve0.h */, LoongArch::XVREPLVE0_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 18075 /* xvreplve0.q */, LoongArch::XVREPLVE0_Q, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 18087 /* xvreplve0.w */, LoongArch::XVREPLVE0_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, }, { 18099 /* xvrotr.b */, LoongArch::XVROTR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18108 /* xvrotr.d */, LoongArch::XVROTR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18117 /* xvrotr.h */, LoongArch::XVROTR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18126 /* xvrotr.w */, LoongArch::XVROTR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18135 /* xvrotri.b */, LoongArch::XVROTRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 18145 /* xvrotri.d */, LoongArch::XVROTRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 18155 /* xvrotri.h */, LoongArch::XVROTRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 18165 /* xvrotri.w */, LoongArch::XVROTRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 18175 /* xvsadd.b */, LoongArch::XVSADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18184 /* xvsadd.bu */, LoongArch::XVSADD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18194 /* xvsadd.d */, LoongArch::XVSADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18203 /* xvsadd.du */, LoongArch::XVSADD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18213 /* xvsadd.h */, LoongArch::XVSADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18222 /* xvsadd.hu */, LoongArch::XVSADD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18232 /* xvsadd.w */, LoongArch::XVSADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18241 /* xvsadd.wu */, LoongArch::XVSADD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18251 /* xvsat.b */, LoongArch::XVSAT_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 18259 /* xvsat.bu */, LoongArch::XVSAT_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 18268 /* xvsat.d */, LoongArch::XVSAT_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 18276 /* xvsat.du */, LoongArch::XVSAT_DU, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 18285 /* xvsat.h */, LoongArch::XVSAT_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 18293 /* xvsat.hu */, LoongArch::XVSAT_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 18302 /* xvsat.w */, LoongArch::XVSAT_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 18310 /* xvsat.wu */, LoongArch::XVSAT_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 18319 /* xvseq.b */, LoongArch::XVSEQ_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18327 /* xvseq.d */, LoongArch::XVSEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18335 /* xvseq.h */, LoongArch::XVSEQ_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18343 /* xvseq.w */, LoongArch::XVSEQ_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18351 /* xvseqi.b */, LoongArch::XVSEQI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 18360 /* xvseqi.d */, LoongArch::XVSEQI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 18369 /* xvseqi.h */, LoongArch::XVSEQI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 18378 /* xvseqi.w */, LoongArch::XVSEQI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 18387 /* xvsetallnez.b */, LoongArch::XVSETALLNEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, }, { 18401 /* xvsetallnez.d */, LoongArch::XVSETALLNEZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, }, { 18415 /* xvsetallnez.h */, LoongArch::XVSETALLNEZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, }, { 18429 /* xvsetallnez.w */, LoongArch::XVSETALLNEZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, }, { 18443 /* xvsetanyeqz.b */, LoongArch::XVSETANYEQZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, }, { 18457 /* xvsetanyeqz.d */, LoongArch::XVSETANYEQZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, }, { 18471 /* xvsetanyeqz.h */, LoongArch::XVSETANYEQZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, }, { 18485 /* xvsetanyeqz.w */, LoongArch::XVSETANYEQZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, }, { 18499 /* xvseteqz.v */, LoongArch::XVSETEQZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, }, { 18510 /* xvsetnez.v */, LoongArch::XVSETNEZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, }, { 18521 /* xvshuf.b */, LoongArch::XVSHUF_B, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18530 /* xvshuf.d */, LoongArch::XVSHUF_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18539 /* xvshuf.h */, LoongArch::XVSHUF_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18548 /* xvshuf.w */, LoongArch::XVSHUF_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18557 /* xvshuf4i.b */, LoongArch::XVSHUF4I_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 18568 /* xvshuf4i.d */, LoongArch::XVSHUF4I_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 18579 /* xvshuf4i.h */, LoongArch::XVSHUF4I_H, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 18590 /* xvshuf4i.w */, LoongArch::XVSHUF4I_W, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, { 18601 /* xvsigncov.b */, LoongArch::XVSIGNCOV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18613 /* xvsigncov.d */, LoongArch::XVSIGNCOV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18625 /* xvsigncov.h */, LoongArch::XVSIGNCOV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18637 /* xvsigncov.w */, LoongArch::XVSIGNCOV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18649 /* xvsle.b */, LoongArch::XVSLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18657 /* xvsle.bu */, LoongArch::XVSLE_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18666 /* xvsle.d */, LoongArch::XVSLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18674 /* xvsle.du */, LoongArch::XVSLE_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18683 /* xvsle.h */, LoongArch::XVSLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18691 /* xvsle.hu */, LoongArch::XVSLE_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18700 /* xvsle.w */, LoongArch::XVSLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18708 /* xvsle.wu */, LoongArch::XVSLE_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18717 /* xvslei.b */, LoongArch::XVSLEI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 18726 /* xvslei.bu */, LoongArch::XVSLEI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 18736 /* xvslei.d */, LoongArch::XVSLEI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 18745 /* xvslei.du */, LoongArch::XVSLEI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 18755 /* xvslei.h */, LoongArch::XVSLEI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 18764 /* xvslei.hu */, LoongArch::XVSLEI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 18774 /* xvslei.w */, LoongArch::XVSLEI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 18783 /* xvslei.wu */, LoongArch::XVSLEI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 18793 /* xvsll.b */, LoongArch::XVSLL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18801 /* xvsll.d */, LoongArch::XVSLL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18809 /* xvsll.h */, LoongArch::XVSLL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18817 /* xvsll.w */, LoongArch::XVSLL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18825 /* xvslli.b */, LoongArch::XVSLLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 18834 /* xvslli.d */, LoongArch::XVSLLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 18843 /* xvslli.h */, LoongArch::XVSLLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 18852 /* xvslli.w */, LoongArch::XVSLLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 18861 /* xvsllwil.d.w */, LoongArch::XVSLLWIL_D_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 18874 /* xvsllwil.du.wu */, LoongArch::XVSLLWIL_DU_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 18889 /* xvsllwil.h.b */, LoongArch::XVSLLWIL_H_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 18902 /* xvsllwil.hu.bu */, LoongArch::XVSLLWIL_HU_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 18917 /* xvsllwil.w.h */, LoongArch::XVSLLWIL_W_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 18930 /* xvsllwil.wu.hu */, LoongArch::XVSLLWIL_WU_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 18945 /* xvslt.b */, LoongArch::XVSLT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18953 /* xvslt.bu */, LoongArch::XVSLT_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18962 /* xvslt.d */, LoongArch::XVSLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18970 /* xvslt.du */, LoongArch::XVSLT_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18979 /* xvslt.h */, LoongArch::XVSLT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18987 /* xvslt.hu */, LoongArch::XVSLT_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 18996 /* xvslt.w */, LoongArch::XVSLT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19004 /* xvslt.wu */, LoongArch::XVSLT_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19013 /* xvslti.b */, LoongArch::XVSLTI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 19022 /* xvslti.bu */, LoongArch::XVSLTI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19032 /* xvslti.d */, LoongArch::XVSLTI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 19041 /* xvslti.du */, LoongArch::XVSLTI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19051 /* xvslti.h */, LoongArch::XVSLTI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 19060 /* xvslti.hu */, LoongArch::XVSLTI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19070 /* xvslti.w */, LoongArch::XVSLTI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, }, { 19079 /* xvslti.wu */, LoongArch::XVSLTI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19089 /* xvsra.b */, LoongArch::XVSRA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19097 /* xvsra.d */, LoongArch::XVSRA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19105 /* xvsra.h */, LoongArch::XVSRA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19113 /* xvsra.w */, LoongArch::XVSRA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19121 /* xvsrai.b */, LoongArch::XVSRAI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 19130 /* xvsrai.d */, LoongArch::XVSRAI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 19139 /* xvsrai.h */, LoongArch::XVSRAI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 19148 /* xvsrai.w */, LoongArch::XVSRAI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19157 /* xvsran.b.h */, LoongArch::XVSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19168 /* xvsran.h.w */, LoongArch::XVSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19179 /* xvsran.w.d */, LoongArch::XVSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19190 /* xvsrani.b.h */, LoongArch::XVSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 19202 /* xvsrani.d.q */, LoongArch::XVSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 19214 /* xvsrani.h.w */, LoongArch::XVSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19226 /* xvsrani.w.d */, LoongArch::XVSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 19238 /* xvsrar.b */, LoongArch::XVSRAR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19247 /* xvsrar.d */, LoongArch::XVSRAR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19256 /* xvsrar.h */, LoongArch::XVSRAR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19265 /* xvsrar.w */, LoongArch::XVSRAR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19274 /* xvsrari.b */, LoongArch::XVSRARI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 19284 /* xvsrari.d */, LoongArch::XVSRARI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 19294 /* xvsrari.h */, LoongArch::XVSRARI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 19304 /* xvsrari.w */, LoongArch::XVSRARI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19314 /* xvsrarn.b.h */, LoongArch::XVSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19326 /* xvsrarn.h.w */, LoongArch::XVSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19338 /* xvsrarn.w.d */, LoongArch::XVSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19350 /* xvsrarni.b.h */, LoongArch::XVSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 19363 /* xvsrarni.d.q */, LoongArch::XVSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 19376 /* xvsrarni.h.w */, LoongArch::XVSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19389 /* xvsrarni.w.d */, LoongArch::XVSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 19402 /* xvsrl.b */, LoongArch::XVSRL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19410 /* xvsrl.d */, LoongArch::XVSRL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19418 /* xvsrl.h */, LoongArch::XVSRL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19426 /* xvsrl.w */, LoongArch::XVSRL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19434 /* xvsrli.b */, LoongArch::XVSRLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 19443 /* xvsrli.d */, LoongArch::XVSRLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 19452 /* xvsrli.h */, LoongArch::XVSRLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 19461 /* xvsrli.w */, LoongArch::XVSRLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19470 /* xvsrln.b.h */, LoongArch::XVSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19481 /* xvsrln.h.w */, LoongArch::XVSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19492 /* xvsrln.w.d */, LoongArch::XVSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19503 /* xvsrlni.b.h */, LoongArch::XVSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 19515 /* xvsrlni.d.q */, LoongArch::XVSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 19527 /* xvsrlni.h.w */, LoongArch::XVSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19539 /* xvsrlni.w.d */, LoongArch::XVSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 19551 /* xvsrlr.b */, LoongArch::XVSRLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19560 /* xvsrlr.d */, LoongArch::XVSRLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19569 /* xvsrlr.h */, LoongArch::XVSRLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19578 /* xvsrlr.w */, LoongArch::XVSRLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19587 /* xvsrlri.b */, LoongArch::XVSRLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, }, { 19597 /* xvsrlri.d */, LoongArch::XVSRLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 19607 /* xvsrlri.h */, LoongArch::XVSRLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 19617 /* xvsrlri.w */, LoongArch::XVSRLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19627 /* xvsrlrn.b.h */, LoongArch::XVSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19639 /* xvsrlrn.h.w */, LoongArch::XVSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19651 /* xvsrlrn.w.d */, LoongArch::XVSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19663 /* xvsrlrni.b.h */, LoongArch::XVSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 19676 /* xvsrlrni.d.q */, LoongArch::XVSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 19689 /* xvsrlrni.h.w */, LoongArch::XVSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19702 /* xvsrlrni.w.d */, LoongArch::XVSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 19715 /* xvssran.b.h */, LoongArch::XVSSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19727 /* xvssran.bu.h */, LoongArch::XVSSRAN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19740 /* xvssran.h.w */, LoongArch::XVSSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19752 /* xvssran.hu.w */, LoongArch::XVSSRAN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19765 /* xvssran.w.d */, LoongArch::XVSSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19777 /* xvssran.wu.d */, LoongArch::XVSSRAN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19790 /* xvssrani.b.h */, LoongArch::XVSSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 19803 /* xvssrani.bu.h */, LoongArch::XVSSRANI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 19817 /* xvssrani.d.q */, LoongArch::XVSSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 19830 /* xvssrani.du.q */, LoongArch::XVSSRANI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 19844 /* xvssrani.h.w */, LoongArch::XVSSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19857 /* xvssrani.hu.w */, LoongArch::XVSSRANI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 19871 /* xvssrani.w.d */, LoongArch::XVSSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 19884 /* xvssrani.wu.d */, LoongArch::XVSSRANI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 19898 /* xvssrarn.b.h */, LoongArch::XVSSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19911 /* xvssrarn.bu.h */, LoongArch::XVSSRARN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19925 /* xvssrarn.h.w */, LoongArch::XVSSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19938 /* xvssrarn.hu.w */, LoongArch::XVSSRARN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19952 /* xvssrarn.w.d */, LoongArch::XVSSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19965 /* xvssrarn.wu.d */, LoongArch::XVSSRARN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 19979 /* xvssrarni.b.h */, LoongArch::XVSSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 19993 /* xvssrarni.bu.h */, LoongArch::XVSSRARNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 20008 /* xvssrarni.d.q */, LoongArch::XVSSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 20022 /* xvssrarni.du.q */, LoongArch::XVSSRARNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 20037 /* xvssrarni.h.w */, LoongArch::XVSSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 20051 /* xvssrarni.hu.w */, LoongArch::XVSSRARNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 20066 /* xvssrarni.w.d */, LoongArch::XVSSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 20080 /* xvssrarni.wu.d */, LoongArch::XVSSRARNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 20095 /* xvssrln.b.h */, LoongArch::XVSSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20107 /* xvssrln.bu.h */, LoongArch::XVSSRLN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20120 /* xvssrln.h.w */, LoongArch::XVSSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20132 /* xvssrln.hu.w */, LoongArch::XVSSRLN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20145 /* xvssrln.w.d */, LoongArch::XVSSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20157 /* xvssrln.wu.d */, LoongArch::XVSSRLN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20170 /* xvssrlni.b.h */, LoongArch::XVSSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 20183 /* xvssrlni.bu.h */, LoongArch::XVSSRLNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 20197 /* xvssrlni.d.q */, LoongArch::XVSSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 20210 /* xvssrlni.du.q */, LoongArch::XVSSRLNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 20224 /* xvssrlni.h.w */, LoongArch::XVSSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 20237 /* xvssrlni.hu.w */, LoongArch::XVSSRLNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 20251 /* xvssrlni.w.d */, LoongArch::XVSSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 20264 /* xvssrlni.wu.d */, LoongArch::XVSSRLNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 20278 /* xvssrlrn.b.h */, LoongArch::XVSSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20291 /* xvssrlrn.bu.h */, LoongArch::XVSSRLRN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20305 /* xvssrlrn.h.w */, LoongArch::XVSSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20318 /* xvssrlrn.hu.w */, LoongArch::XVSSRLRN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20332 /* xvssrlrn.w.d */, LoongArch::XVSSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20345 /* xvssrlrn.wu.d */, LoongArch::XVSSRLRN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20359 /* xvssrlrni.b.h */, LoongArch::XVSSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 20373 /* xvssrlrni.bu.h */, LoongArch::XVSSRLRNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, }, { 20388 /* xvssrlrni.d.q */, LoongArch::XVSSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 20402 /* xvssrlrni.du.q */, LoongArch::XVSSRLRNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, }, { 20417 /* xvssrlrni.h.w */, LoongArch::XVSSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 20431 /* xvssrlrni.hu.w */, LoongArch::XVSSRLRNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 20446 /* xvssrlrni.w.d */, LoongArch::XVSSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 20460 /* xvssrlrni.wu.d */, LoongArch::XVSSRLRNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, }, { 20475 /* xvssub.b */, LoongArch::XVSSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20484 /* xvssub.bu */, LoongArch::XVSSUB_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20494 /* xvssub.d */, LoongArch::XVSSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20503 /* xvssub.du */, LoongArch::XVSSUB_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20513 /* xvssub.h */, LoongArch::XVSSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20522 /* xvssub.hu */, LoongArch::XVSSUB_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20532 /* xvssub.w */, LoongArch::XVSSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20541 /* xvssub.wu */, LoongArch::XVSSUB_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20551 /* xvst */, LoongArch::XVST, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm12 }, }, { 20556 /* xvstelm.b */, LoongArch::XVSTELM_B, Convert__Reg1_0__Reg1_1__SImm81_2__UImm51_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8, MCK_UImm5 }, }, { 20566 /* xvstelm.d */, LoongArch::XVSTELM_D, Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm21_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8lsl3, MCK_UImm2 }, }, { 20576 /* xvstelm.h */, LoongArch::XVSTELM_H, Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm41_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8lsl1, MCK_UImm4 }, }, { 20586 /* xvstelm.w */, LoongArch::XVSTELM_W, Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm31_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8lsl2, MCK_UImm3 }, }, { 20596 /* xvstx */, LoongArch::XVSTX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_GPR }, }, { 20602 /* xvsub.b */, LoongArch::XVSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20610 /* xvsub.d */, LoongArch::XVSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20618 /* xvsub.h */, LoongArch::XVSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20626 /* xvsub.q */, LoongArch::XVSUB_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20634 /* xvsub.w */, LoongArch::XVSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20642 /* xvsubi.bu */, LoongArch::XVSUBI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 20652 /* xvsubi.du */, LoongArch::XVSUBI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 20662 /* xvsubi.hu */, LoongArch::XVSUBI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 20672 /* xvsubi.wu */, LoongArch::XVSUBI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, }, { 20682 /* xvsubwev.d.w */, LoongArch::XVSUBWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20695 /* xvsubwev.d.wu */, LoongArch::XVSUBWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20709 /* xvsubwev.h.b */, LoongArch::XVSUBWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20722 /* xvsubwev.h.bu */, LoongArch::XVSUBWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20736 /* xvsubwev.q.d */, LoongArch::XVSUBWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20749 /* xvsubwev.q.du */, LoongArch::XVSUBWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20763 /* xvsubwev.w.h */, LoongArch::XVSUBWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20776 /* xvsubwev.w.hu */, LoongArch::XVSUBWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20790 /* xvsubwod.d.w */, LoongArch::XVSUBWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20803 /* xvsubwod.d.wu */, LoongArch::XVSUBWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20817 /* xvsubwod.h.b */, LoongArch::XVSUBWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20830 /* xvsubwod.h.bu */, LoongArch::XVSUBWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20844 /* xvsubwod.q.d */, LoongArch::XVSUBWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20857 /* xvsubwod.q.du */, LoongArch::XVSUBWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20871 /* xvsubwod.w.h */, LoongArch::XVSUBWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20884 /* xvsubwod.w.hu */, LoongArch::XVSUBWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20898 /* xvxor.v */, LoongArch::XVXOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, }, { 20906 /* xvxori.b */, LoongArch::XVXORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, }, }; #include "llvm/Support/Debug.h" #include "llvm/Support/Format.h" unsigned LoongArchAsmParser:: MatchInstructionImpl(const OperandVector &Operands, MCInst &Inst, uint64_t &ErrorInfo, FeatureBitset &MissingFeatures, bool matchingInlineAsm, unsigned VariantID) { // Eliminate obvious mismatches. if (Operands.size() > 5) { ErrorInfo = 5; return Match_InvalidOperand; } // Get the current feature set. const FeatureBitset &AvailableFeatures = getAvailableFeatures(); // Get the instruction mnemonic, which is the first token. StringRef Mnemonic = ((LoongArchOperand &)*Operands[0]).getToken(); // Some state to try to produce better error messages. bool HadMatchOtherThanFeatures = false; bool HadMatchOtherThanPredicate = false; unsigned RetCode = Match_InvalidOperand; MissingFeatures.set(); // Set ErrorInfo to the operand that mismatches if it is // wrong for all instances of the instruction. ErrorInfo = ~0ULL; // Find the appropriate table for this asm variant. const MatchEntry *Start, *End; switch (VariantID) { default: llvm_unreachable("invalid variant!"); case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; } // Search the table. auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " << std::distance(MnemonicRange.first, MnemonicRange.second) << " encodings with mnemonic '" << Mnemonic << "'\n"); // Return a more specific error code if no mnemonics match. if (MnemonicRange.first == MnemonicRange.second) return Match_MnemonicFail; for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; it != ie; ++it) { const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; bool HasRequiredFeatures = (AvailableFeatures & RequiredFeatures) == RequiredFeatures; DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode " << MII.getName(it->Opcode) << "\n"); // equal_range guarantees that instruction mnemonic matches. assert(Mnemonic == it->getMnemonic()); bool OperandsValid = true; for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 4; ++FormalIdx) { auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]); DEBUG_WITH_TYPE("asm-matcher", dbgs() << " Matching formal operand class " << getMatchClassName(Formal) << " against actual operand at index " << ActualIdx); if (ActualIdx < Operands.size()) DEBUG_WITH_TYPE("asm-matcher", dbgs() << " ("; Operands[ActualIdx]->print(dbgs()); dbgs() << "): "); else DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": "); if (ActualIdx >= Operands.size()) { DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range\n"); if (Formal == InvalidMatchClass) { break; } if (isSubclass(Formal, OptionalMatchClass)) { continue; } OperandsValid = false; ErrorInfo = ActualIdx; break; } MCParsedAsmOperand &Actual = *Operands[ActualIdx]; unsigned Diag = validateOperandClass(Actual, Formal); if (Diag == Match_Success) { DEBUG_WITH_TYPE("asm-matcher", dbgs() << "match success using generic matcher\n"); ++ActualIdx; continue; } // If the generic handler indicates an invalid operand // failure, check for a special case. if (Diag != Match_Success) { unsigned TargetDiag = validateTargetOperandClass(Actual, Formal); if (TargetDiag == Match_Success) { DEBUG_WITH_TYPE("asm-matcher", dbgs() << "match success using target matcher\n"); ++ActualIdx; continue; } // If the target matcher returned a specific error code use // that, else use the one from the generic matcher. if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures) Diag = TargetDiag; } // If current formal operand wasn't matched and it is optional // then try to match next formal operand if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) { DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n"); continue; } // If this operand is broken for all of the instances of this // mnemonic, keep track of it so we can report loc info. // If we already had a match that only failed due to a // target predicate, that diagnostic is preferred. if (!HadMatchOtherThanPredicate && (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) { if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand)) RetCode = Diag; ErrorInfo = ActualIdx; } // Otherwise, just reject this instance of the mnemonic. OperandsValid = false; break; } if (!OperandsValid) { DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple " "operand mismatches, ignoring " "this opcode\n"); continue; } if (!HasRequiredFeatures) { HadMatchOtherThanFeatures = true; FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures; DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:"; for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I) if (NewMissingFeatures[I]) dbgs() << ' ' << I; dbgs() << "\n"); if (NewMissingFeatures.count() <= MissingFeatures.count()) MissingFeatures = NewMissingFeatures; continue; } Inst.clear(); Inst.setOpcode(it->Opcode); // We have a potential match but have not rendered the operands. // Check the target predicate to handle any context sensitive // constraints. // For example, Ties that are referenced multiple times must be // checked here to ensure the input is the same for each match // constraints. If we leave it any later the ties will have been // canonicalized unsigned MatchResult; if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) { Inst.clear(); DEBUG_WITH_TYPE( "asm-matcher", dbgs() << "Early target match predicate failed with diag code " << MatchResult << "\n"); RetCode = MatchResult; HadMatchOtherThanPredicate = true; continue; } if (matchingInlineAsm) { convertToMapAndConstraints(it->ConvertFn, Operands); if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo)) return Match_InvalidTiedOperand; return Match_Success; } // We have selected a definite instruction, convert the parsed // operands into the appropriate MCInst. convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); // We have a potential match. Check the target predicate to // handle any context sensitive constraints. if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Target match predicate failed with diag code " << MatchResult << "\n"); Inst.clear(); RetCode = MatchResult; HadMatchOtherThanPredicate = true; continue; } if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo)) return Match_InvalidTiedOperand; DEBUG_WITH_TYPE( "asm-matcher", dbgs() << "Opcode result: complete match, selecting this opcode\n"); return Match_Success; } // Okay, we had no match. Try to return a useful error code. if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) return RetCode; ErrorInfo = 0; return Match_MissingFeature; } namespace { struct OperandMatchEntry { uint16_t Mnemonic; uint8_t OperandMask; uint8_t Class; uint8_t RequiredFeaturesIdx; StringRef getMnemonic() const { return StringRef(MnemonicTable + Mnemonic + 1, MnemonicTable[Mnemonic]); } }; // Predicate for searching for an opcode. struct LessOpcodeOperand { bool operator()(const OperandMatchEntry &LHS, StringRef RHS) { return LHS.getMnemonic() < RHS; } bool operator()(StringRef LHS, const OperandMatchEntry &RHS) { return LHS < RHS.getMnemonic(); } bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) { return LHS.getMnemonic() < RHS.getMnemonic(); } }; } // end anonymous namespace static const OperandMatchEntry OperandMatchTable[88] = { /* Operand List Mnemonic, Mask, Operand Class, Features */ { 24 /* add.d */, 8 /* 3 */, MCK_TPRelAddSymbol, AMFBS_IsLA64 }, { 30 /* add.w */, 8 /* 3 */, MCK_TPRelAddSymbol, AMFBS_IsLA32 }, { 102 /* amadd.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 110 /* amadd.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 118 /* amadd.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 126 /* amadd.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 134 /* amadd_db.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 145 /* amadd_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 156 /* amadd_db.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 167 /* amadd_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 178 /* amand.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 186 /* amand.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 194 /* amand_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 205 /* amand_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 216 /* amcas.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 224 /* amcas.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 232 /* amcas.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 240 /* amcas.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 248 /* amcas_db.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 259 /* amcas_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 270 /* amcas_db.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 281 /* amcas_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 292 /* ammax.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 300 /* ammax.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 309 /* ammax.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 317 /* ammax.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 326 /* ammax_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 337 /* ammax_db.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 349 /* ammax_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 360 /* ammax_db.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 372 /* ammin.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 380 /* ammin.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 389 /* ammin.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 397 /* ammin.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 406 /* ammin_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 417 /* ammin_db.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 429 /* ammin_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 440 /* ammin_db.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 452 /* amor.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 459 /* amor.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 466 /* amor_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 476 /* amor_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 486 /* amswap.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 495 /* amswap.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 504 /* amswap.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 513 /* amswap.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 522 /* amswap_db.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 534 /* amswap_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 546 /* amswap_db.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 558 /* amswap_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 570 /* amxor.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 578 /* amxor.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 586 /* amxor_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 597 /* amxor_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, { 844 /* b */, 1 /* 0 */, MCK_SImm26OperandB, AMFBS_None }, { 933 /* bl */, 1 /* 0 */, MCK_SImm26OperandBL, AMFBS_None }, { 1049 /* call36 */, 1 /* 0 */, MCK_BareSymbol, AMFBS_IsLA64 }, { 2786 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel }, { 2786 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs }, { 2786 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 2789 /* la.abs */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 2789 /* la.abs */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 2796 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel }, { 2796 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs }, { 2796 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 2796 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel }, { 2796 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs }, { 2796 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_None }, { 2806 /* la.got */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 2806 /* la.got */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 }, { 2813 /* la.local */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaLocalWithAbs }, { 2813 /* la.local */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 2813 /* la.local */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaLocalWithAbs }, { 2813 /* la.local */, 4 /* 2 */, MCK_BareSymbol, AMFBS_None }, { 2822 /* la.pcrel */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 2822 /* la.pcrel */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 }, { 2831 /* la.tls.desc */, 2 /* 1 */, MCK_BareSymbol, AMFBS_IsLA32_HasLaGlobalWithAbs }, { 2831 /* la.tls.desc */, 2 /* 1 */, MCK_BareSymbol, AMFBS_IsLA64_HasLaGlobalWithAbs }, { 2831 /* la.tls.desc */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 2831 /* la.tls.desc */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 }, { 2843 /* la.tls.gd */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 2843 /* la.tls.gd */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 }, { 2853 /* la.tls.ie */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 2853 /* la.tls.ie */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 }, { 2863 /* la.tls.ld */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 2863 /* la.tls.ld */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 }, { 2873 /* la.tls.le */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, { 4002 /* tail36 */, 2 /* 1 */, MCK_BareSymbol, AMFBS_IsLA64 }, }; ParseStatus LoongArchAsmParser:: tryCustomParseOperand(OperandVector &Operands, unsigned MCK) { switch(MCK) { case MCK_AtomicMemAsmOperand: return parseAtomicMemOp(Operands); case MCK_BareSymbol: return parseImmediate(Operands); case MCK_SImm26OperandB: return parseImmediate(Operands); case MCK_SImm26OperandBL: return parseSImm26Operand(Operands); case MCK_TPRelAddSymbol: return parseOperandWithModifier(Operands); default: return ParseStatus::NoMatch; } return ParseStatus::NoMatch; } ParseStatus LoongArchAsmParser:: MatchOperandParserImpl(OperandVector &Operands, StringRef Mnemonic, bool ParseForAllFeatures) { // Get the current feature set. const FeatureBitset &AvailableFeatures = getAvailableFeatures(); // Get the next operand index. unsigned NextOpNum = Operands.size() - 1; // Search the table. auto MnemonicRange = std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable), Mnemonic, LessOpcodeOperand()); if (MnemonicRange.first == MnemonicRange.second) return ParseStatus::NoMatch; for (const OperandMatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; it != ie; ++it) { // equal_range guarantees that instruction mnemonic matches. assert(Mnemonic == it->getMnemonic()); // check if the available features match const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; if (!ParseForAllFeatures && (AvailableFeatures & RequiredFeatures) != RequiredFeatures) continue; // check if the operand in question has a custom parser. if (!(it->OperandMask & (1 << NextOpNum))) continue; // call custom parse method to handle the operand ParseStatus Result = tryCustomParseOperand(Operands, it->Class); if (!Result.isNoMatch()) return Result; } // Okay, we had no match. return ParseStatus::NoMatch; } #endif // GET_MATCHER_IMPLEMENTATION #ifdef GET_MNEMONIC_SPELL_CHECKER #undef GET_MNEMONIC_SPELL_CHECKER static std::string LoongArchMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) { const unsigned MaxEditDist = 2; std::vector<StringRef> Candidates; StringRef Prev = ""; // Find the appropriate table for this asm variant. const MatchEntry *Start, *End; switch (VariantID) { default: llvm_unreachable("invalid variant!"); case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; } for (auto I = Start; I < End; I++) { // Ignore unsupported instructions. const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx]; if ((FBS & RequiredFeatures) != RequiredFeatures) continue; StringRef T = I->getMnemonic(); // Avoid recomputing the edit distance for the same string. if (T == Prev) continue; Prev = T; unsigned Dist = S.edit_distance(T, false, MaxEditDist); if (Dist <= MaxEditDist) Candidates.push_back(T); } if (Candidates.empty()) return ""; std::string Res = ", did you mean: "; unsigned i = 0; for (; i < Candidates.size() - 1; i++) Res += Candidates[i].str() + ", "; return Res + Candidates[i].str() + "?"; } #endif // GET_MNEMONIC_SPELL_CHECKER #ifdef GET_MNEMONIC_CHECKER #undef GET_MNEMONIC_CHECKER static bool LoongArchCheckMnemonic(StringRef Mnemonic, const FeatureBitset &AvailableFeatures, unsigned VariantID) { // Find the appropriate table for this asm variant. const MatchEntry *Start, *End; switch (VariantID) { default: llvm_unreachable("invalid variant!"); case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; } // Search the table. auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); if (MnemonicRange.first == MnemonicRange.second) return false; for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; it != ie; ++it) { const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures) return true; } return false; } #endif // GET_MNEMONIC_CHECKER
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