llvm/llvm/lib/Target/PowerPC/PPCSubtarget.cpp

//===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the PPC specific subclass of TargetSubtargetInfo.
//
//===----------------------------------------------------------------------===//

#include "PPCSubtarget.h"
#include "GISel/PPCCallLowering.h"
#include "GISel/PPCLegalizerInfo.h"
#include "GISel/PPCRegisterBankInfo.h"
#include "PPC.h"
#include "PPCRegisterInfo.h"
#include "PPCTargetMachine.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalAlias.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/IR/GlobalVariable.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Target/TargetMachine.h"
#include <cstdlib>

usingnamespacellvm;

#define DEBUG_TYPE …

#define GET_SUBTARGETINFO_TARGET_DESC
#define GET_SUBTARGETINFO_CTOR
#include "PPCGenSubtargetInfo.inc"

static cl::opt<bool>
    EnableMachinePipeliner("ppc-enable-pipeliner",
                           cl::desc("Enable Machine Pipeliner for PPC"),
                           cl::init(false), cl::Hidden);

PPCSubtarget &PPCSubtarget::initializeSubtargetDependencies(StringRef CPU,
                                                            StringRef TuneCPU,
                                                            StringRef FS) { … }

PPCSubtarget::PPCSubtarget(const Triple &TT, const std::string &CPU,
                           const std::string &TuneCPU, const std::string &FS,
                           const PPCTargetMachine &TM)
    : … { … }

void PPCSubtarget::initializeEnvironment() { … }

void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
                                         StringRef FS) { … }

bool PPCSubtarget::enableMachineScheduler() const { … }

bool PPCSubtarget::enableMachinePipeliner() const { … }

bool PPCSubtarget::useDFAforSMS() const { … }

// This overrides the PostRAScheduler bit in the SchedModel for each CPU.
bool PPCSubtarget::enablePostRAScheduler() const { … }

PPCGenSubtargetInfo::AntiDepBreakMode PPCSubtarget::getAntiDepBreakMode() const { … }

void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { … }

void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
                                       unsigned NumRegionInstrs) const { … }

bool PPCSubtarget::useAA() const { … }

bool PPCSubtarget::enableSubRegLiveness() const { … }

bool PPCSubtarget::isGVIndirectSymbol(const GlobalValue *GV) const { … }

CodeModel::Model PPCSubtarget::getCodeModel(const TargetMachine &TM,
                                            const GlobalValue *GV) const { … }

bool PPCSubtarget::isELFv2ABI() const { … }
bool PPCSubtarget::isPPC64() const { … }

bool PPCSubtarget::isUsingPCRelativeCalls() const { … }

// GlobalISEL
const CallLowering *PPCSubtarget::getCallLowering() const { … }

const RegisterBankInfo *PPCSubtarget::getRegBankInfo() const { … }

const LegalizerInfo *PPCSubtarget::getLegalizerInfo() const { … }

InstructionSelector *PPCSubtarget::getInstructionSelector() const { … }