llvm/llvm/lib/Target/RISCV/RISCVSubtarget.cpp

//===-- RISCVSubtarget.cpp - RISC-V Subtarget Information -----------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the RISC-V specific subclass of TargetSubtargetInfo.
//
//===----------------------------------------------------------------------===//

#include "RISCVSubtarget.h"
#include "GISel/RISCVCallLowering.h"
#include "GISel/RISCVLegalizerInfo.h"
#include "RISCV.h"
#include "RISCVFrameLowering.h"
#include "RISCVTargetMachine.h"
#include "llvm/CodeGen/MacroFusion.h"
#include "llvm/CodeGen/ScheduleDAGMutation.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/ErrorHandling.h"

usingnamespacellvm;

#define DEBUG_TYPE …

#define GET_SUBTARGETINFO_TARGET_DESC
#define GET_SUBTARGETINFO_CTOR
#include "RISCVGenSubtargetInfo.inc"

#define GET_RISCV_MACRO_FUSION_PRED_IMPL
#include "RISCVGenMacroFusion.inc"

namespace llvm::RISCVTuneInfoTable {

#define GET_RISCVTuneInfoTable_IMPL
#include "RISCVGenSearchableTables.inc"
} // namespace llvm::RISCVTuneInfoTable

static cl::opt<unsigned> RVVVectorLMULMax(
    "riscv-v-fixed-length-vector-lmul-max",
    cl::desc("The maximum LMUL value to use for fixed length vectors. "
             "Fractional LMUL values are not supported."),
    cl::init(8), cl::Hidden);

static cl::opt<bool> RISCVDisableUsingConstantPoolForLargeInts(
    "riscv-disable-using-constant-pool-for-large-ints",
    cl::desc("Disable using constant pool for large integers."),
    cl::init(false), cl::Hidden);

static cl::opt<unsigned> RISCVMaxBuildIntsCost(
    "riscv-max-build-ints-cost",
    cl::desc("The maximum cost used for building integers."), cl::init(0),
    cl::Hidden);

static cl::opt<bool> UseAA("riscv-use-aa", cl::init(true),
                           cl::desc("Enable the use of AA during codegen."));

static cl::opt<unsigned> RISCVMinimumJumpTableEntries(
    "riscv-min-jump-table-entries", cl::Hidden,
    cl::desc("Set minimum number of entries to use a jump table on RISCV"));

void RISCVSubtarget::anchor() { … }

RISCVSubtarget &
RISCVSubtarget::initializeSubtargetDependencies(const Triple &TT, StringRef CPU,
                                                StringRef TuneCPU, StringRef FS,
                                                StringRef ABIName) { … }

RISCVSubtarget::RISCVSubtarget(const Triple &TT, StringRef CPU,
                               StringRef TuneCPU, StringRef FS,
                               StringRef ABIName, unsigned RVVVectorBitsMin,
                               unsigned RVVVectorBitsMax,
                               const TargetMachine &TM)
    : … { … }

const CallLowering *RISCVSubtarget::getCallLowering() const { … }

InstructionSelector *RISCVSubtarget::getInstructionSelector() const { … }

const LegalizerInfo *RISCVSubtarget::getLegalizerInfo() const { … }

const RISCVRegisterBankInfo *RISCVSubtarget::getRegBankInfo() const { … }

bool RISCVSubtarget::useConstantPoolForLargeInts() const { … }

unsigned RISCVSubtarget::getMaxBuildIntsCost() const { … }

unsigned RISCVSubtarget::getMaxRVVVectorSizeInBits() const { … }

unsigned RISCVSubtarget::getMinRVVVectorSizeInBits() const { … }

unsigned RISCVSubtarget::getMaxLMULForFixedLengthVectors() const { … }

bool RISCVSubtarget::useRVVForFixedLengthVectors() const { … }

bool RISCVSubtarget::enableSubRegLiveness() const { … }

void RISCVSubtarget::getPostRAMutations(
    std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const { … }

  /// Enable use of alias analysis during code generation (during MI
  /// scheduling, DAGCombine, etc.).
bool RISCVSubtarget::useAA() const { … }

unsigned RISCVSubtarget::getMinimumJumpTableEntries() const { … }