llvm/llvm/test/Transforms/SLPVectorizer/

../
AArch64/
AMDGPU/
ARM/
NVPTX/
PowerPC/
RISCV/
SystemZ/
VE/
WebAssembly/
X86/
XCore/
a
alt-cmp-vectorize.ll
alternate-cmp-swapped-pred-parent.ll
alternate-non-profitable.ll
alternate-opcode-sindle-bv.ll
arith-div-undef.ll
b
bool-logical-op-reduction-with-poison.ll
buildvector-insert-mask-size.ll
buildvector-nodes-dependency.ll
c
call-arg-reduced-by-minbitwidth.ll
catchswitch.ll
const-bool-logical-or-reduction.ll
crash_exceed_scheduling.ll
crash_extractelement_poison.ll
d
diamond_broadcast.ll
e
empty-struct.ll
ext-after-phi-node.ll
i
insertelement-across-zero.ll
int_sideeffect.ll
is_fpclass.ll
o
orig-btiwidth-les-projected.ll
p
phi-not-ordered.ll
r
rdar128092379.ll
reduction-whole-regs-loads.ll
reschedule.ll
resized-alt-shuffle-after-minbw.ll
revec-shufflevector.ll
revec.ll
s
slp-hr-with-reuse.ll
slp-max-phi-size.ll
slp-max-reg-size.ll
slp-non-pow-2-insertelement.ll
slp-umax-rdx-matcher-crash.ll
slp-variable-insertelement.ll
v
vectorizable-functions-inseltpoison.ll
vectorizable-functions.ll