llvm/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/lanai_asm.ll.expected

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=lanai < %s | FileCheck %s

define i64 @i64_test(i64 %i) nounwind readnone {
; CHECK-LABEL: i64_test:
; CHECK:       ! %bb.0:
; CHECK-NEXT:    st %fp, [--%sp]
; CHECK-NEXT:    add %sp, 0x8, %fp
; CHECK-NEXT:    sub %sp, 0x10, %sp
; CHECK-NEXT:    ld 4[%fp], %r3
; CHECK-NEXT:    ld 0[%fp], %r9
; CHECK-NEXT:    sub %fp, 0x10, %r12
; CHECK-NEXT:    or %r12, 0x4, %r12
; CHECK-NEXT:    ld -16[%fp], %r13
; CHECK-NEXT:    ld 0[%r12], %r12
; CHECK-NEXT:    add %r9, %r13, %r13
; CHECK-NEXT:    add %r3, %r12, %r9
; CHECK-NEXT:    sub.f %r9, %r3, %r0
; CHECK-NEXT:    sult %r3
; CHECK-NEXT:    add %r13, %r3, %rv
; CHECK-NEXT:    ld -4[%fp], %pc ! return
; CHECK-NEXT:    add %fp, 0x0, %sp
; CHECK-NEXT:    ld -8[%fp], %fp
  %loc = alloca i64
  %j = load i64, i64 * %loc
  %r = add i64 %i, %j
  ret i64 %r
}

define i64 @i32_test(i32 %i) nounwind readnone {
; CHECK-LABEL: i32_test:
; CHECK:       ! %bb.0:
; CHECK-NEXT:    st %fp, [--%sp]
; CHECK-NEXT:    add %sp, 0x8, %fp
; CHECK-NEXT:    sub %sp, 0x10, %sp
; CHECK-NEXT:    ld 0[%fp], %r3
; CHECK-NEXT:    ld -12[%fp], %r9
; CHECK-NEXT:    add %r3, %r9, %r9
; CHECK-NEXT:    or %r0, 0x0, %rv
; CHECK-NEXT:    ld -4[%fp], %pc ! return
; CHECK-NEXT:    add %fp, 0x0, %sp
; CHECK-NEXT:    ld -8[%fp], %fp
  %loc = alloca i32
  %j = load i32, i32 * %loc
  %r = add i32 %i, %j
  %ext = zext i32 %r to i64
  ret i64 %ext
}

define i64 @i16_test(i16 %i) nounwind readnone {
; CHECK-LABEL: i16_test:
; CHECK:       ! %bb.0:
; CHECK-NEXT:    st %fp, [--%sp]
; CHECK-NEXT:    add %sp, 0x8, %fp
; CHECK-NEXT:    sub %sp, 0x10, %sp
; CHECK-NEXT:    add %fp, 0x0, %r3
; CHECK-NEXT:    or %r3, 0x2, %r3
; CHECK-NEXT:    uld.h 0[%r3], %r3
; CHECK-NEXT:    uld.h -10[%fp], %r9
; CHECK-NEXT:    add %r3, %r9, %r3
; CHECK-NEXT:    and %r3, 0xffff, %r9
; CHECK-NEXT:    or %r0, 0x0, %rv
; CHECK-NEXT:    ld -4[%fp], %pc ! return
; CHECK-NEXT:    add %fp, 0x0, %sp
; CHECK-NEXT:    ld -8[%fp], %fp
  %loc = alloca i16
  %j = load i16, i16 * %loc
  %r = add i16 %i, %j
  %ext = zext i16 %r to i64
  ret i64 %ext
}

define i64 @i8_test(i8 %i) nounwind readnone {
; CHECK-LABEL: i8_test:
; CHECK:       ! %bb.0:
; CHECK-NEXT:    st %fp, [--%sp]
; CHECK-NEXT:    add %sp, 0x8, %fp
; CHECK-NEXT:    sub %sp, 0x10, %sp
; CHECK-NEXT:    add %fp, 0x0, %r3
; CHECK-NEXT:    or %r3, 0x3, %r3
; CHECK-NEXT:    uld.b 0[%r3], %r3
; CHECK-NEXT:    uld.b -9[%fp], %r9
; CHECK-NEXT:    add %r3, %r9, %r3
; CHECK-NEXT:    mov 0xff, %r9
; CHECK-NEXT:    and %r3, %r9, %r9
; CHECK-NEXT:    or %r0, 0x0, %rv
; CHECK-NEXT:    ld -4[%fp], %pc ! return
; CHECK-NEXT:    add %fp, 0x0, %sp
; CHECK-NEXT:    ld -8[%fp], %fp
  %loc = alloca i8
  %j = load i8, i8 * %loc
  %r = add i8 %i, %j
  %ext = zext i8 %r to i64
  ret i64 %ext
}