llvm/llvm/test/tools/llvm-mca/AArch64/Cortex/IPC/A55-7-cmp.s

# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=aarch64 -mcpu=cortex-a55 --all-views=false --summary-view --iterations=1000 < %s | FileCheck %s

add	w8, w8, #1
add	w12, w9, #1
cmp	w9, #42
mul	w10, w12, w10

# CHECK:      Iterations:        1000
# CHECK-NEXT: Instructions:      4000
# CHECK-NEXT: Total Cycles:      3004
# CHECK-NEXT: Total uOps:        4000

# CHECK:      Dispatch Width:    2
# CHECK-NEXT: uOps Per Cycle:    1.33
# CHECK-NEXT: IPC:               1.33
# CHECK-NEXT: Block RThroughput: 2.0