llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE32 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE32 %s

---

name:            copy
legalized:       true
regBankSelected: true


body: |
  bb.0:
    liveins: $sgpr2_sgpr3

    ; WAVE64-LABEL: name: copy
    ; WAVE64: liveins: $sgpr2_sgpr3
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
    ; WAVE64-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY [[COPY]]
    ; WAVE64-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
    ; WAVE64-NEXT: FLAT_STORE_DWORD [[COPY1]], [[DEF]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
    ;
    ; WAVE32-LABEL: name: copy
    ; WAVE32: liveins: $sgpr2_sgpr3
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
    ; WAVE32-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
    ; WAVE32-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
    ; WAVE32-NEXT: GLOBAL_STORE_DWORD_SADDR [[V_MOV_B32_e32_]], [[DEF]], [[COPY]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
    %0:sgpr(p1) = COPY $sgpr2_sgpr3
    %1:vgpr(p1) = COPY %0
    %2:vgpr(s32) = G_IMPLICIT_DEF
    G_STORE %2, %1 :: (store (s32), addrspace 1)
...
---

name:            copy_vcc_bank_sgpr_bank
legalized:       true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc

    ; WAVE64-LABEL: name: copy_vcc_bank_sgpr_bank
    ; WAVE64: liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; WAVE64-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
    ; WAVE64-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
    ; WAVE64-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc
    ; WAVE64-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY3]], implicit-def dead $scc
    ; WAVE64-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
    ; WAVE64-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit $exec
    ; WAVE64-NEXT: FLAT_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
    ;
    ; WAVE32-LABEL: name: copy_vcc_bank_sgpr_bank
    ; WAVE32: liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; WAVE32-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
    ; WAVE32-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
    ; WAVE32-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc
    ; WAVE32-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY3]], implicit-def dead $scc
    ; WAVE32-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
    ; WAVE32-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit $exec
    ; WAVE32-NEXT: GLOBAL_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
    %0:vgpr(p1) = COPY $vgpr0_vgpr1
    %1:vgpr(s32) = COPY $vgpr2
    %2:vgpr(s32) = COPY $vgpr3
    %3:sgpr(s1) = COPY $scc
    %4:vcc(s1) = COPY %3
    %5:vgpr(s32) = G_SELECT %4, %1, %2
    G_STORE %5, %0 :: (store (s32), addrspace 1)
...
---

name:            copy_vcc_bank_sgpr_bank_2_uses
legalized:       true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc

    ; WAVE64-LABEL: name: copy_vcc_bank_sgpr_bank_2_uses
    ; WAVE64: liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; WAVE64-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
    ; WAVE64-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
    ; WAVE64-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc
    ; WAVE64-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY3]], implicit-def dead $scc
    ; WAVE64-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
    ; WAVE64-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit $exec
    ; WAVE64-NEXT: [[S_AND_B32_1:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY3]], implicit-def dead $scc
    ; WAVE64-NEXT: [[V_CMP_NE_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_1]], implicit $exec
    ; WAVE64-NEXT: [[V_CNDMASK_B32_e64_1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_CNDMASK_B32_e64_]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_1]], implicit $exec
    ; WAVE64-NEXT: FLAT_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_1]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
    ;
    ; WAVE32-LABEL: name: copy_vcc_bank_sgpr_bank_2_uses
    ; WAVE32: liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; WAVE32-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
    ; WAVE32-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
    ; WAVE32-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc
    ; WAVE32-NEXT: [[COPY4:%[0-9]+]]:sreg_32_xm0_xexec = COPY [[COPY3]]
    ; WAVE32-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[COPY4]], implicit $exec
    ; WAVE32-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY3]], implicit-def dead $scc
    ; WAVE32-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
    ; WAVE32-NEXT: [[V_CNDMASK_B32_e64_1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_CNDMASK_B32_e64_]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit $exec
    ; WAVE32-NEXT: GLOBAL_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_1]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
    %0:vgpr(p1) = COPY $vgpr0_vgpr1
    %1:vgpr(s32) = COPY $vgpr2
    %2:vgpr(s32) = COPY $vgpr3
    %3:sgpr(s1) = COPY $scc
    %4:vcc(s1) = COPY %3
    %5:vgpr(s32) = G_SELECT %4, %1, %2
    %6:vcc(s1) = COPY %3
    %7:vgpr(s32) = G_SELECT %6, %1, %5
    G_STORE %7, %0 :: (store (s32), addrspace 1)
...

---

name:            copy_vcc_bank_scc_physreg
legalized:       true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc

    ; WAVE64-LABEL: name: copy_vcc_bank_scc_physreg
    ; WAVE64: liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; WAVE64-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
    ; WAVE64-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
    ; WAVE64-NEXT: [[COPY3:%[0-9]+]]:sreg_64_xexec = COPY $scc
    ; WAVE64-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[COPY3]], implicit $exec
    ; WAVE64-NEXT: FLAT_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
    ;
    ; WAVE32-LABEL: name: copy_vcc_bank_scc_physreg
    ; WAVE32: liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; WAVE32-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
    ; WAVE32-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
    ; WAVE32-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xm0_xexec = COPY $scc
    ; WAVE32-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[COPY3]], implicit $exec
    ; WAVE32-NEXT: GLOBAL_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
    %0:vgpr(p1) = COPY $vgpr0_vgpr1
    %1:vgpr(s32) = COPY $vgpr2
    %2:vgpr(s32) = COPY $vgpr3
    %3:vcc(s1) = COPY $scc
    %5:vgpr(s32) = G_SELECT %3, %1, %2
    G_STORE %5, %0 :: (store (s32), addrspace 1)
...
---

name:            copy_sgpr_no_type
legalized:       true
regBankSelected: true


body: |
  bb.0:
    liveins: $sgpr0
    ; WAVE64-LABEL: name: copy_sgpr_no_type
    ; WAVE64: liveins: $sgpr0
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
    ; WAVE64-NEXT: S_ENDPGM 0, implicit [[COPY]]
    ;
    ; WAVE32-LABEL: name: copy_sgpr_no_type
    ; WAVE32: liveins: $sgpr0
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
    ; WAVE32-NEXT: S_ENDPGM 0, implicit [[COPY]]
    %0:sreg_32_xm0 = COPY $sgpr0
    %1:sreg_32_xm0 = COPY %0
    S_ENDPGM 0, implicit %1

...

---

name:            copy_vgpr_no_type
legalized:       true
regBankSelected: true


body: |
  bb.0:
    liveins: $vgpr0
    ; WAVE64-LABEL: name: copy_vgpr_no_type
    ; WAVE64: liveins: $vgpr0
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64-NEXT: S_ENDPGM 0, implicit [[COPY]]
    ;
    ; WAVE32-LABEL: name: copy_vgpr_no_type
    ; WAVE32: liveins: $vgpr0
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32-NEXT: S_ENDPGM 0, implicit [[COPY]]
    %0:vgpr_32 = COPY $vgpr0
    %1:vgpr_32 = COPY %0
    S_ENDPGM 0, implicit %1

...

---

name:            copy_maybe_vcc
legalized:       true
regBankSelected: true


body: |
  bb.0:
    liveins: $sgpr0_sgpr1
    ; WAVE64-LABEL: name: copy_maybe_vcc
    ; WAVE64: liveins: $sgpr0_sgpr1
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
    ; WAVE64-NEXT: S_ENDPGM 0, implicit [[COPY]]
    ;
    ; WAVE32-LABEL: name: copy_maybe_vcc
    ; WAVE32: liveins: $sgpr0_sgpr1
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
    ; WAVE32-NEXT: S_ENDPGM 0, implicit [[COPY]]
    %0:sreg_64_xexec = COPY $sgpr0_sgpr1
    %1:sreg_64_xexec = COPY %0
    S_ENDPGM 0, implicit %1

...

# FIXME: This is malformed. There should never be a trunc to vcc.
---

name:            copy_s1_vcc_to_vcc
legalized:       true
regBankSelected: true


body: |
  bb.0:
    liveins: $sgpr0_sgpr1

    ; WAVE64-LABEL: name: copy_s1_vcc_to_vcc
    ; WAVE64: liveins: $sgpr0_sgpr1
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; WAVE64-NEXT: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[COPY]]
    ; WAVE64-NEXT: S_ENDPGM 0, implicit [[COPY1]]
    ;
    ; WAVE32-LABEL: name: copy_s1_vcc_to_vcc
    ; WAVE32: liveins: $sgpr0_sgpr1
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; WAVE32-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0_xexec = COPY [[COPY]]
    ; WAVE32-NEXT: S_ENDPGM 0, implicit [[COPY1]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:vcc(s1) = G_TRUNC %0
    %2:vcc(s1) = COPY %1
    S_ENDPGM 0, implicit %2

...

---

name:            copy_s64_to_vcc
legalized:       true
regBankSelected: true


body: |
  bb.0:
    liveins: $sgpr0_sgpr1
    ; WAVE64-LABEL: name: copy_s64_to_vcc
    ; WAVE64: liveins: $sgpr0_sgpr1
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; WAVE64-NEXT: $vcc = COPY [[COPY]]
    ; WAVE64-NEXT: S_ENDPGM 0, implicit $vcc
    ;
    ; WAVE32-LABEL: name: copy_s64_to_vcc
    ; WAVE32: liveins: $sgpr0_sgpr1
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; WAVE32-NEXT: $vcc = COPY [[COPY]]
    ; WAVE32-NEXT: S_ENDPGM 0, implicit $vcc_lo
    %0:sgpr(s64) = COPY $sgpr0_sgpr1
    $vcc = COPY %0
    S_ENDPGM 0, implicit $vcc

...

---

name:            copy_s32_to_vcc_lo
legalized:       true
regBankSelected: true


body: |
  bb.0:
    liveins: $sgpr0
    ; WAVE64-LABEL: name: copy_s32_to_vcc_lo
    ; WAVE64: liveins: $sgpr0
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; WAVE64-NEXT: $vcc_lo = COPY [[COPY]]
    ; WAVE64-NEXT: S_ENDPGM 0, implicit $vcc
    ;
    ; WAVE32-LABEL: name: copy_s32_to_vcc_lo
    ; WAVE32: liveins: $sgpr0
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; WAVE32-NEXT: $vcc_lo = COPY [[COPY]]
    ; WAVE32-NEXT: S_ENDPGM 0, implicit $vcc_lo
    %0:sgpr(s32) = COPY $sgpr0
    $vcc_lo = COPY %0
    S_ENDPGM 0, implicit $vcc

...

---

name:            copy_vcc_to_s64
legalized:       true
regBankSelected: true


body: |
  bb.0:
    liveins: $vcc
    ; WAVE64-LABEL: name: copy_vcc_to_s64
    ; WAVE64: liveins: $vcc
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $vcc
    ; WAVE64-NEXT: S_ENDPGM 0, implicit [[COPY]]
    ;
    ; WAVE32-LABEL: name: copy_vcc_to_s64
    ; WAVE32: liveins: $vcc
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $vcc
    ; WAVE32-NEXT: S_ENDPGM 0, implicit [[COPY]]
    %0:sgpr(s64) = COPY $vcc
    S_ENDPGM 0, implicit %0

...

---

name:            copy_vcc_lo_to_s32
legalized:       true
regBankSelected: true


body: |
  bb.0:
    liveins: $vcc
    ; WAVE64-LABEL: name: copy_vcc_lo_to_s32
    ; WAVE64: liveins: $vcc
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $vcc_lo
    ; WAVE64-NEXT: S_ENDPGM 0, implicit [[COPY]]
    ;
    ; WAVE32-LABEL: name: copy_vcc_lo_to_s32
    ; WAVE32: liveins: $vcc
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $vcc_lo
    ; WAVE32-NEXT: S_ENDPGM 0, implicit [[COPY]]
    %0:sgpr(s32) = COPY $vcc_lo
    S_ENDPGM 0, implicit %0

...

---

name:            copy_s1_to_vcc
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $sgpr0_sgpr1

    ; WAVE64-LABEL: name: copy_s1_to_vcc
    ; WAVE64: liveins: $sgpr0_sgpr1
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; WAVE64-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
    ; WAVE64-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY1]], implicit-def dead $scc
    ; WAVE64-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
    ; WAVE64-NEXT: S_ENDPGM 0, implicit [[V_CMP_NE_U32_e64_]]
    ;
    ; WAVE32-LABEL: name: copy_s1_to_vcc
    ; WAVE32: liveins: $sgpr0_sgpr1
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; WAVE32-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
    ; WAVE32-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY1]], implicit-def dead $scc
    ; WAVE32-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
    ; WAVE32-NEXT: S_ENDPGM 0, implicit [[V_CMP_NE_U32_e64_]]
    %0:sgpr(s64) = COPY $sgpr0_sgpr1
    %1:sgpr(s1) = G_TRUNC %0(s64)
    %2:vcc(s1) = COPY %1(s1)
    S_ENDPGM 0, implicit %2

...

---

name:            copy_s1_false_to_vcc
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $sgpr0

    ; WAVE64-LABEL: name: copy_s1_false_to_vcc
    ; WAVE64: liveins: $sgpr0
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
    ; WAVE64-NEXT: S_ENDPGM 0, implicit [[S_MOV_B64_]]
    ;
    ; WAVE32-LABEL: name: copy_s1_false_to_vcc
    ; WAVE32: liveins: $sgpr0
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
    ; WAVE32-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_]]
    %0:sgpr(s1) = G_CONSTANT i1 false
    %1:vcc(s1) = COPY %0(s1)
    S_ENDPGM 0, implicit %1

...

---

name:            copy_s1_true_to_vcc
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $sgpr0

    ; WAVE64-LABEL: name: copy_s1_true_to_vcc
    ; WAVE64: liveins: $sgpr0
    ; WAVE64-NEXT: {{  $}}
    ; WAVE64-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 -1
    ; WAVE64-NEXT: S_ENDPGM 0, implicit [[S_MOV_B64_]]
    ;
    ; WAVE32-LABEL: name: copy_s1_true_to_vcc
    ; WAVE32: liveins: $sgpr0
    ; WAVE32-NEXT: {{  $}}
    ; WAVE32-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
    ; WAVE32-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_]]
    %0:sgpr(s1) = G_CONSTANT i1 true
    %1:vcc(s1) = COPY %0(s1)
    S_ENDPGM 0, implicit %1

...