# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -run-pass=amdgpu-regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -run-pass=amdgpu-regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
---
name: merge_s64_s32_s32_ss
legalized: true
body: |
bb.0:
liveins: $sgpr0, $sgpr1
; CHECK-LABEL: name: merge_s64_s32_s32_ss
; CHECK: liveins: $sgpr0, $sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:sgpr(s32) = G_EXTRACT [[COPY]](s64), 0
; CHECK-NEXT: [[EXTRACT1:%[0-9]+]]:sgpr(s32) = G_EXTRACT [[COPY]](s64), 32
; CHECK-NEXT: [[MV:%[0-9]+]]:sgpr(s64) = G_MERGE_VALUES [[EXTRACT]](s32), [[EXTRACT1]](s32)
; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s32) = G_EXTRACT %0, 0
%2:_(s32) = G_EXTRACT %0, 32
%3:_(s64) = G_MERGE_VALUES %1, %2
S_ENDPGM 0, implicit %3
...
---
name: merge_s64_s32_s32_s64
legalized: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: merge_s64_s32_s32_s64
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:vgpr(s32) = G_EXTRACT [[COPY]](s64), 0
; CHECK-NEXT: [[EXTRACT1:%[0-9]+]]:vgpr(s32) = G_EXTRACT [[COPY]](s64), 32
; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[EXTRACT]](s32), [[EXTRACT1]](s32)
; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s32) = G_EXTRACT %0, 0
%2:_(s32) = G_EXTRACT %0, 32
%3:_(s64) = G_MERGE_VALUES %1, %2
S_ENDPGM 0, implicit %3
...
---
name: merge_s64_s32_s32_aa
legalized: true
body: |
bb.0:
liveins: $agpr0, $agpr1
; CHECK-LABEL: name: merge_s64_s32_s32_aa
; CHECK: liveins: $agpr0, $agpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:agpr(s32) = COPY $agpr0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:agpr(s32) = COPY $agpr1
; CHECK-NEXT: [[MV:%[0-9]+]]:agpr(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)
%0:_(s32) = COPY $agpr0
%1:_(s32) = COPY $agpr1
%2:_(s64) = G_MERGE_VALUES %0, %1
S_ENDPGM 0, implicit %2
...
---
name: merge_s64_s32_s32_sa
legalized: true
body: |
bb.0:
liveins: $sgpr0, $agpr0
; CHECK-LABEL: name: merge_s64_s32_s32_sa
; CHECK: liveins: $sgpr0, $agpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:agpr(s32) = COPY $agpr0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)
%0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $agpr0
%2:_(s64) = G_MERGE_VALUES %0, %1
S_ENDPGM 0, implicit %2
...
---
name: merge_s64_s32_s32_as
legalized: true
body: |
bb.0:
liveins: $sgpr0, $agpr0
; CHECK-LABEL: name: merge_s64_s32_s32_as
; CHECK: liveins: $sgpr0, $agpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:agpr(s32) = COPY $agpr0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s64)
%0:_(s32) = COPY $agpr0
%1:_(s32) = COPY $sgpr0
%2:_(s64) = G_MERGE_VALUES %0, %1
S_ENDPGM 0, implicit %2
...