artifact-combiner-extract.mir | Explore in Territory

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s

---
name: extract_s32_merge_s64_s32_s32_offset0

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s32_merge_s64_s32_s32_offset0
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
    ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32)
    %0:_(s32) = G_CONSTANT i32 0
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s64) = G_MERGE_VALUES %0, %1
    %3:_(s32) = G_EXTRACT %2, 0
    $vgpr0 = COPY %3
...

---
name: extract_s32_merge_s64_s32_s32_offset32

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s32_merge_s64_s32_s32_offset32
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
    ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32)
    %0:_(s32) = G_CONSTANT i32 0
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s64) = G_MERGE_VALUES %0, %1
    %3:_(s32) = G_EXTRACT %2, 32
    $vgpr0 = COPY %3
...

---
name: extract_s64_merge_s128_s64_s64_offset0

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s64_merge_s128_s64_s64_offset0
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[C]](s64)
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY]](s64)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(s128) = G_MERGE_VALUES %0, %1
    %3:_(s64) = G_EXTRACT %2, 0
    $vgpr0_vgpr1 = COPY %3
...

---
name: extract_s64_merge_s128_s64_s64_offset64

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s64_merge_s128_s64_s64_offset64
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[C]](s64)
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY]](s64)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(s128) = G_MERGE_VALUES %0, %1
    %3:_(s64) = G_EXTRACT %2, 64
    $vgpr0_vgpr1 = COPY %3
...

---
name: extract_s32_merge_s128_s64_s64_offset0

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s32_merge_s128_s64_s64_offset0
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[C]](s64), 0
    ; CHECK-NEXT: $vgpr0 = COPY [[EXTRACT]](s32)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(s128) = G_MERGE_VALUES %0, %1
    %3:_(s32) = G_EXTRACT %2, 0
    $vgpr0 = COPY %3
...

---
name: extract_s32_merge_s128_s64_s64_offset32

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s32_merge_s128_s64_s64_offset32
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[C]](s64), 32
    ; CHECK-NEXT: $vgpr0 = COPY [[EXTRACT]](s32)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(s128) = G_MERGE_VALUES %0, %1
    %3:_(s32) = G_EXTRACT %2, 32
    $vgpr0 = COPY %3
...

---
name: extract_s32_merge_s128_s64_s64_offset64

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s32_merge_s128_s64_s64_offset64
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[C]](s64), 0
    ; CHECK-NEXT: $vgpr0 = COPY [[EXTRACT]](s32)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(s128) = G_MERGE_VALUES %0, %1
    %3:_(s32) = G_EXTRACT %2, 64
    $vgpr0 = COPY %3
...

---
name: extract_s32_merge_s128_s64_s64_offset96

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s32_merge_s128_s64_s64_offset96
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[C]](s64), 32
    ; CHECK-NEXT: $vgpr0 = COPY [[EXTRACT]](s32)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(s128) = G_MERGE_VALUES %0, %1
    %3:_(s32) = G_EXTRACT %2, 96
    $vgpr0 = COPY %3
...

# Destination size fits, but is skewed from the start of the register.
---
name: extract_s16_merge_s128_s64_s64_offset18

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s16_merge_s128_s64_s64_offset18
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s16) = G_EXTRACT [[C]](s64), 18
    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[EXTRACT]](s16)
    ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(s128) = G_MERGE_VALUES %0, %1
    %3:_(s16) = G_EXTRACT %2, 18
    %4:_(s32) = G_ANYEXT %3
    $vgpr0 = COPY %4
...

# Destination size fits, but is skewed from the start of the register.
---
name: extract_s16_merge_s128_s64_s64_offset82

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s16_merge_s128_s64_s64_offset82
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s16) = G_EXTRACT [[C]](s64), 18
    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[EXTRACT]](s16)
    ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(s128) = G_MERGE_VALUES %0, %1
    %3:_(s16) = G_EXTRACT %2, 82
    %4:_(s32) = G_ANYEXT %3
    $vgpr0 = COPY %4
...


# Can't handle this since it spans two registers
---
name: extract_s64_merge_s128_s64_s64_offset32

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s64_merge_s128_s64_s64_offset32
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C]](s64), [[C1]](s64)
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s64) = G_EXTRACT [[MV]](s128), 32
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[EXTRACT]](s64)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(s128) = G_MERGE_VALUES %0, %1
    %3:_(s64) = G_EXTRACT %2, 32
    $vgpr0_vgpr1 = COPY %3
...


# Only the last bit spans to another register
---
name: extract_s16_merge_s32_s32_offset1

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s16_merge_s32_s32_offset1
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C1]](s32)
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[MV]](s64), 1
    ; CHECK-NEXT: $vgpr0 = COPY [[EXTRACT]](s32)
    %0:_(s32) = G_CONSTANT i32 0
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s64) = G_MERGE_VALUES %0, %1
    %3:_(s32) = G_EXTRACT %2, 1
    $vgpr0 = COPY %3
...


# Test with some merges with 3 operands

---
name: extract_s32_merge_s96_s32_s32_s32_offset0

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s32_merge_s96_s32_s32_s32_offset0
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
    ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32)
    %0:_(s32) = G_CONSTANT i32 0
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s32) = G_CONSTANT i32 1
    %3:_(s96) = G_MERGE_VALUES %0, %1, %2
    %4:_(s32) = G_EXTRACT %3, 0
    $vgpr0 = COPY %4
...

---
name: extract_s32_merge_s96_s32_s32_s32_offset64

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s32_merge_s96_s32_s32_s32_offset64
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
    ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32)
    %0:_(s32) = G_CONSTANT i32 0
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s32) = G_CONSTANT i32 1
    %3:_(s96) = G_MERGE_VALUES %0, %1, %2
    %4:_(s32) = G_EXTRACT %3, 64
    $vgpr0 = COPY %4
...

---
name: extract_s64_merge_s96_s32_s32_s32_offset0

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s64_merge_s96_s32_s32_s32_offset0
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[C]](s32), [[C1]](s32), [[C2]](s32)
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s64) = G_EXTRACT [[MV]](s96), 0
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[EXTRACT]](s64)
    %0:_(s32) = G_CONSTANT i32 0
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s32) = G_CONSTANT i32 1
    %3:_(s96) = G_MERGE_VALUES %0, %1, %2
    %4:_(s64) = G_EXTRACT %3, 0
    $vgpr0_vgpr1 = COPY %4
...

---
name: extract_s64_merge_s96_s32_s32_s32_offset32

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s64_merge_s96_s32_s32_s32_offset32
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[C]](s32), [[C1]](s32), [[C2]](s32)
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s64) = G_EXTRACT [[MV]](s96), 32
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[EXTRACT]](s64)
    %0:_(s32) = G_CONSTANT i32 0
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s32) = G_CONSTANT i32 1
    %3:_(s96) = G_MERGE_VALUES %0, %1, %2
    %4:_(s64) = G_EXTRACT %3, 32
    $vgpr0_vgpr1 = COPY %4
...

# Test build_vector sources
---
name: extract_s64_build_vector_v2s64_s64_s64_offset0

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s64_build_vector_v2s64_s64_s64_offset0
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[C]](s64)
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY]](s64)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(<2 x s64>) = G_BUILD_VECTOR %0, %1
    %3:_(s64) = G_EXTRACT %2, 0
    $vgpr0_vgpr1 = COPY %3
...

---
name: extract_s64_build_vector_v2s64_s64_s64_offset64

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s64_build_vector_v2s64_s64_s64_offset64
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[C]](s64)
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY]](s64)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(<2 x s64>) = G_BUILD_VECTOR %0, %1
    %3:_(s64) = G_EXTRACT %2, 64
    $vgpr0_vgpr1 = COPY %3
...

---
name: extract_s64_build_vector_v2s64_s64_s64_offset32

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s64_build_vector_v2s64_s64_s64_offset32
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C1]](s64)
    ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<2 x s64>)
    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[BITCAST]](s128)
    ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[C2]](s32)
    ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[C2]](s32)
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]]
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[OR]](s64)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(<2 x s64>) = G_BUILD_VECTOR %0, %1
    %3:_(s64) = G_EXTRACT %2, 32
    $vgpr0_vgpr1 = COPY %3
...

# Test extracting something smaller than the element size
---
name: extract_s32_build_vector_v2s64_s64_s64_offset64

body: |
  bb.0:
    ; CHECK-LABEL: name: extract_s32_build_vector_v2s64_s64_s64_offset64
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[C]](s64), 0
    ; CHECK-NEXT: $vgpr0 = COPY [[EXTRACT]](s32)
    %0:_(s64) = G_CONSTANT i64 0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(<2 x s64>) = G_BUILD_VECTOR %0, %1
    %3:_(s32) = G_EXTRACT %2, 64
    $vgpr0 = COPY %3

...

# Test concat_vector sources
---
name: extract_v2s16_build_vector_v2s64_v2s16_v2s16_offset0

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; CHECK-LABEL: name: extract_v2s16_build_vector_v2s64_v2s16_v2s16_offset0
    ; CHECK: liveins: $vgpr0, $vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY [[COPY]](<2 x s16>)
    ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](<2 x s16>)
    %0:_(<2 x s16>) = COPY $vgpr0
    %1:_(<2 x s16>) = COPY $vgpr1
    %2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
    %3:_(<2 x s16>) = G_EXTRACT %2, 0
    $vgpr0 = COPY %3
...

---
name: extract_v2s16_build_vector_v2s64_v2s16_v2s16_offset32

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; CHECK-LABEL: name: extract_v2s16_build_vector_v2s64_v2s16_v2s16_offset32
    ; CHECK: liveins: $vgpr0, $vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY [[COPY]](<2 x s16>)
    ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](<2 x s16>)
    %0:_(<2 x s16>) = COPY $vgpr0
    %1:_(<2 x s16>) = COPY $vgpr1
    %2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
    %3:_(<2 x s16>) = G_EXTRACT %2, 32
    $vgpr0 = COPY %3
...

# Test extracting only a single element, not a subvector
---
name: extract_s16_build_vector_v2s64_v2s16_v2s16_offset32

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; CHECK-LABEL: name: extract_s16_build_vector_v2s64_v2s16_v2s16_offset32
    ; CHECK: liveins: $vgpr0, $vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
    ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
    ; CHECK-NEXT: $vgpr0 = COPY [[BITCAST]](s32)
    %0:_(<2 x s16>) = COPY $vgpr0
    %1:_(<2 x s16>) = COPY $vgpr1
    %2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
    %3:_(s16) = G_EXTRACT %2, 32
    %4:_(s32) = G_ANYEXT %3
    $vgpr0 = COPY %4
...

---
name: extract_s16_build_vector_v2s64_v2s16_v2s16_offset48

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; CHECK-LABEL: name: extract_s16_build_vector_v2s64_v2s16_v2s16_offset48
    ; CHECK: liveins: $vgpr0, $vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
    ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
    ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)
    %0:_(<2 x s16>) = COPY $vgpr0
    %1:_(<2 x s16>) = COPY $vgpr1
    %2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
    %3:_(s16) = G_EXTRACT %2, 48
    %4:_(s32) = G_ANYEXT %3
    $vgpr0 = COPY %4
...

# Test extracting less than an element
---
name: extract_s8_build_vector_v2s64_v2s16_v2s16_offset48

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; CHECK-LABEL: name: extract_s8_build_vector_v2s64_v2s16_v2s16_offset48
    ; CHECK: liveins: $vgpr0, $vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
    ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s8) = G_EXTRACT [[COPY]](<2 x s16>), 16
    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[EXTRACT]](s8)
    ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
    %0:_(<2 x s16>) = COPY $vgpr0
    %1:_(<2 x s16>) = COPY $vgpr1
    %2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
    %3:_(s8) = G_EXTRACT %2, 48
    %4:_(s32) = G_ANYEXT %3
    $vgpr0 = COPY %4
...
llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
