combine-trunc-shift.mir | Explore in Territory

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s

---
name: trunc_s32_shl_s64_5
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; CHECK-LABEL: name: trunc_s32_shl_s64_5
    ; CHECK: liveins: $vgpr0_vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
    ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
    ; CHECK-NEXT: $vgpr0 = COPY [[SHL]](s32)
    %0:_(s64) = COPY $vgpr0_vgpr1
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s64) = G_SHL %0:_, %1
    %3:_(s32) = G_TRUNC %2
    $vgpr0 = COPY %3
...

---
name: trunc_s16_shl_s32_5
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: trunc_s16_shl_s32_5
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32)
    ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s16)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s32) = G_SHL %0:_, %1
    %3:_(s16) = G_TRUNC %2
    S_ENDPGM 0, implicit %3

...

---
name: trunc_s16_shl_s64_5
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; CHECK-LABEL: name: trunc_s16_shl_s64_5
    ; CHECK: liveins: $vgpr0_vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s32)
    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s64)
    ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s16)
    %0:_(s64) = COPY $vgpr0_vgpr1
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s64) = G_SHL %0:_, %1
    %3:_(s16) = G_TRUNC %2
    S_ENDPGM 0, implicit %3

...

---
name:            s16_trunc_s64_lshr_16
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: s16_trunc_s64_lshr_16
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %amt:_(s32) = G_CONSTANT i32 16
    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], %amt(s32)
    ; CHECK-NEXT: %trunc:_(s16) = G_TRUNC [[LSHR]](s32)
    ; CHECK-NEXT: %foo:_(s16) = G_CONSTANT i16 55
    ; CHECK-NEXT: %keep:_(s32) = G_MERGE_VALUES %trunc(s16), %foo(s16)
    ; CHECK-NEXT: $vgpr0 = COPY %keep(s32)
    %0:_(s32) = COPY $vgpr0
    %src:_(s64) = G_ZEXT %0
    %amt:_(s32) = G_CONSTANT i32 16
    %shift:_(s64) = G_LSHR %src, %amt
    %trunc:_(s16) = G_TRUNC %shift
    %foo:_(s16) = G_CONSTANT i16 55
    %keep:_(s32) = G_MERGE_VALUES %trunc, %foo
    $vgpr0 = COPY %keep
...

---
name:            s16_trunc_s64_ashr_16
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: s16_trunc_s64_ashr_16
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %amt:_(s32) = G_CONSTANT i32 16
    ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], %amt(s32)
    ; CHECK-NEXT: %trunc:_(s16) = G_TRUNC [[ASHR]](s32)
    ; CHECK-NEXT: %foo:_(s16) = G_CONSTANT i16 55
    ; CHECK-NEXT: %keep:_(s32) = G_MERGE_VALUES %trunc(s16), %foo(s16)
    ; CHECK-NEXT: $vgpr0 = COPY %keep(s32)
    %0:_(s32) = COPY $vgpr0
    %src:_(s64) = G_ZEXT %0
    %amt:_(s32) = G_CONSTANT i32 16
    %shift:_(s64) = G_ASHR %src, %amt
    %trunc:_(s16) = G_TRUNC %shift
    %foo:_(s16) = G_CONSTANT i16 55
    %keep:_(s32) = G_MERGE_VALUES %trunc, %foo
    $vgpr0 = COPY %keep
...

---
name:            s16_trunc_s64_lshr_17_nofold
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: s16_trunc_s64_lshr_17_nofold
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %src:_(s64) = G_ZEXT [[COPY]](s32)
    ; CHECK-NEXT: %amt:_(s32) = G_CONSTANT i32 17
    ; CHECK-NEXT: %shift:_(s64) = G_LSHR %src, %amt(s32)
    ; CHECK-NEXT: %trunc:_(s16) = G_TRUNC %shift(s64)
    ; CHECK-NEXT: %foo:_(s16) = G_CONSTANT i16 55
    ; CHECK-NEXT: %keep:_(s32) = G_MERGE_VALUES %trunc(s16), %foo(s16)
    ; CHECK-NEXT: $vgpr0 = COPY %keep(s32)
    %0:_(s32) = COPY $vgpr0
    %src:_(s64) = G_ZEXT %0
    %amt:_(s32) = G_CONSTANT i32 17
    %shift:_(s64) = G_LSHR %src, %amt
    %trunc:_(s16) = G_TRUNC %shift
    %foo:_(s16) = G_CONSTANT i16 55
    %keep:_(s32) = G_MERGE_VALUES %trunc, %foo
    $vgpr0 = COPY %keep
...

---
name:            s26_trunc_s64_lshr_6
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: s26_trunc_s64_lshr_6
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %amt:_(s32) = G_CONSTANT i32 6
    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], %amt(s32)
    ; CHECK-NEXT: %trunc:_(s26) = G_TRUNC [[LSHR]](s32)
    ; CHECK-NEXT: %foo:_(s26) = G_CONSTANT i26 55
    ; CHECK-NEXT: %keep0:_(s26) = G_ADD %trunc, %foo
    ; CHECK-NEXT: %keep1:_(s32) = G_ANYEXT %keep0(s26)
    ; CHECK-NEXT: $vgpr0 = COPY %keep1(s32)
    %0:_(s32) = COPY $vgpr0
    %src:_(s64) = G_ZEXT %0
    %amt:_(s32) = G_CONSTANT i32 6
    %shift:_(s64) = G_LSHR %src, %amt
    %trunc:_(s26) = G_TRUNC %shift
    %foo:_(s26) = G_CONSTANT i26 55
    %keep0:_(s26) = G_ADD %trunc, %foo
    %keep1:_(s32) = G_ANYEXT %keep0
    $vgpr0 = COPY %keep1
...

---
name:            s26_trunc_s64_lshr_7_nofold
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: s26_trunc_s64_lshr_7_nofold
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %src:_(s64) = G_ZEXT [[COPY]](s32)
    ; CHECK-NEXT: %amt:_(s32) = G_CONSTANT i32 7
    ; CHECK-NEXT: %shift:_(s64) = G_LSHR %src, %amt(s32)
    ; CHECK-NEXT: %trunc:_(s26) = G_TRUNC %shift(s64)
    ; CHECK-NEXT: %foo:_(s26) = G_CONSTANT i26 55
    ; CHECK-NEXT: %keep0:_(s26) = G_ADD %trunc, %foo
    ; CHECK-NEXT: %keep1:_(s32) = G_ANYEXT %keep0(s26)
    ; CHECK-NEXT: $vgpr0 = COPY %keep1(s32)
    %0:_(s32) = COPY $vgpr0
    %src:_(s64) = G_ZEXT %0
    %amt:_(s32) = G_CONSTANT i32 7
    %shift:_(s64) = G_LSHR %src, %amt
    %trunc:_(s26) = G_TRUNC %shift
    %foo:_(s26) = G_CONSTANT i26 55
    %keep0:_(s26) = G_ADD %trunc, %foo
    %keep1:_(s32) = G_ANYEXT %keep0
    $vgpr0 = COPY %keep1
...
llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-shift.mir
