llvm/llvm/test/CodeGen/AMDGPU/sgpr-spill-dead-frame-in-dbg-value.mir

# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -amdgpu-spill-sgpr-to-vgpr=true -verify-machineinstrs -run-pass=si-lower-sgpr-spills -o - %s | FileCheck -check-prefix=SGPR_SPILL %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -amdgpu-spill-sgpr-to-vgpr=true -verify-machineinstrs --start-before=si-lower-sgpr-spills --stop-after=prologepilog -o - %s | FileCheck -check-prefix=PEI %s

# After handling the SGPR spill to VGPR in SILowerSGPRSpills pass, replace the dead frame index in the DBG_VALUE instruction with reg 0.
# Otherwise, the test would crash during PEI while trying to replace the dead frame index.
--- |
  define amdgpu_kernel void @test() { ret void }

  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !4, producer: "llvm", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !4, retainedTypes: !4)
  !1 = !DILocalVariable(name: "a", scope: !2, file: !4, line: 126, type: !6)
  !2 = distinct !DISubprogram(name: "test", scope: !4, file: !4, line: 1, type: !3, isLocal: false, isDefinition: true, scopeLine: 2, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !5)
  !3 = !DISubroutineType(types: !4)
  !4 = !{null}
  !5 = !{!1}
  !6 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 64, align: 32)
  !7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
  !8 = !DIExpression()
  !9 = !DILocation(line: 10, column: 9, scope: !2)

...
---
name:            test
tracksRegLiveness: true
frameInfo:
  maxAlignment:    4
stack:
  - { id: 0, type: spill-slot, size: 4, alignment: 4, stack-id: sgpr-spill }
machineFunctionInfo:
  maxKernArgAlign: 4
  isEntryFunction: true
  waveLimiter:     true
  scratchRSrcReg:  '$sgpr96_sgpr97_sgpr98_sgpr99'
  stackPtrOffsetReg: '$sgpr32'
  frameOffsetReg: '$sgpr33'
  hasSpilledSGPRs: true
  argumentInfo:
    privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
    dispatchPtr:     { reg: '$sgpr4_sgpr5' }
    kernargSegmentPtr: { reg: '$sgpr6_sgpr7' }
    workGroupIDX:    { reg: '$sgpr8' }
    privateSegmentWaveByteOffset: { reg: '$sgpr9' }
body:             |
  ; SGPR_SPILL-LABEL: name: test
  ; SGPR_SPILL: bb.0:
  ; SGPR_SPILL-NEXT:   successors: %bb.1(0x80000000)
  ; SGPR_SPILL-NEXT: {{  $}}
  ; SGPR_SPILL-NEXT:   [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
  ; SGPR_SPILL-NEXT:   renamable $sgpr10 = IMPLICIT_DEF
  ; SGPR_SPILL-NEXT:   [[V_WRITELANE_B32_:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR killed $sgpr10, 0, [[V_WRITELANE_B32_]]
  ; SGPR_SPILL-NEXT:   DBG_VALUE $noreg, 0
  ; SGPR_SPILL-NEXT: {{  $}}
  ; SGPR_SPILL-NEXT: bb.1:
  ; SGPR_SPILL-NEXT:   $sgpr10 = SI_RESTORE_S32_FROM_VGPR [[V_WRITELANE_B32_]], 0
  ; SGPR_SPILL-NEXT:   KILL [[V_WRITELANE_B32_]]
  ; SGPR_SPILL-NEXT:   S_ENDPGM 0
  ; PEI-LABEL: name: test
  ; PEI: bb.0:
  ; PEI-NEXT:   successors: %bb.1(0x80000000)
  ; PEI-NEXT: {{  $}}
  ; PEI-NEXT:   renamable $vgpr0 = IMPLICIT_DEF
  ; PEI-NEXT:   renamable $sgpr10 = IMPLICIT_DEF
  ; PEI-NEXT:   renamable $vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr10, 0, killed $vgpr0
  ; PEI-NEXT: {{  $}}
  ; PEI-NEXT: bb.1:
  ; PEI-NEXT:   liveins: $vgpr0
  ; PEI-NEXT: {{  $}}
  ; PEI-NEXT:   $sgpr10 = SI_RESTORE_S32_FROM_VGPR $vgpr0, 0
  ; PEI-NEXT:   KILL killed renamable $vgpr0
  ; PEI-NEXT:   S_ENDPGM 0
  bb.0:
    renamable $sgpr10 = IMPLICIT_DEF
    SI_SPILL_S32_SAVE killed $sgpr10, %stack.0, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32
    DBG_VALUE %stack.0, 0, !1, !8, debug-location !9

  bb.1:
    renamable $sgpr10 = SI_SPILL_S32_RESTORE %stack.0, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32
    S_ENDPGM 0