llvm/llvm/test/MC/Disassembler/Mips/micromips32r3/valid-fp64-el.txt

# RUN: llvm-mc --disassemble -triple=mipsel -mcpu=mips32r3 -mattr=+micromips,+fp64 %s \
# RUN: | FileCheck %s

0x0c 0x54 0x3b 0x0a # CHECK: sqrt.s $f0, $f12
0x0c 0x54 0x7b 0x03 # CHECK: abs.s  $f0, $f12
0x0c 0x54 0x3b 0x4a # CHECK: sqrt.d $f0, $f12
0x0c 0x54 0x7b 0x23 # CHECK: abs.d  $f0, $f12
0x80 0x54 0x3b 0x38 # CHECK: mthc1 $4, $f0
0x80 0x54 0x3b 0x30 # CHECK: mfhc1 $4, $f0
0x82 0x54 0x30 0x01 # CHECK: add.d $f0, $f2, $f4
0x82 0x54 0x70 0x01 # CHECK: sub.d $f0, $f2, $f4
0x82 0x54 0xb0 0x01 # CHECK: mul.d $f0, $f2, $f4
0x82 0x54 0xf0 0x01 # CHECK: div.d $f0, $f2, $f4
0x02 0x54 0x7b 0x20 # CHECK: mov.d $f0, $f2
0x02 0x54 0x7b 0x2b # CHECK: neg.d $f0, $f2
0x02 0x54 0x3b 0x49 # CHECK: cvt.w.d $f0, $f2
0x02 0x54 0x7b 0x13 # CHECK: cvt.d.s $f0, $f2
0x02 0x54 0x7b 0x33 # CHECK: cvt.d.w $f0, $f2
0x02 0x54 0x7b 0x1b # CHECK: cvt.s.d $f0, $f2
0x82 0x54 0x3b 0x01 # CHECK: cvt.l.s $f4, $f2
0x82 0x54 0x3b 0x41 # CHECK: cvt.l.d $f4, $f2
0x85 0x54 0x48 0x21 # CHECK: luxc1 $f4, $4($5)
0x85 0x54 0x88 0x21 # CHECK: suxc1 $f4, $4($5)
0x86 0x54 0x3b 0x28 # CHECK: mtc1  $4, $f6
0x86 0x54 0x3b 0x20 # CHECK: mfc1  $4, $f6
0x86 0x54 0x3b 0x38 # CHECK: mthc1 $4, $f6
0x86 0x54 0x3b 0x30 # CHECK: mfhc1 $4, $f6