llvm/llvm/test/MC/Disassembler/X86/apx/blsr.txt

# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL

# ATT:   {nf}	blsrl	%ecx, %edx
# INTEL: {nf}	blsr	edx, ecx
0x62,0xf2,0x6c,0x0c,0xf3,0xc9

# ATT:   blsrl	%ecx, %edx
# INTEL: blsr	edx, ecx
0x62,0xf2,0x6c,0x08,0xf3,0xc9

# ATT:   {nf}	blsrq	%r9, %r15
# INTEL: {nf}	blsr	r15, r9
0x62,0xd2,0x84,0x0c,0xf3,0xc9

# ATT:   blsrq	%r9, %r15
# INTEL: blsr	r15, r9
0x62,0xd2,0x84,0x08,0xf3,0xc9

# ATT:   {nf}	blsrl	123(%rax,%rbx,4), %ecx
# INTEL: {nf}	blsr	ecx, dword ptr [rax + 4*rbx + 123]
0x62,0xf2,0x74,0x0c,0xf3,0x4c,0x98,0x7b

# ATT:   blsrl	123(%rax,%rbx,4), %ecx
# INTEL: blsr	ecx, dword ptr [rax + 4*rbx + 123]
0x62,0xf2,0x74,0x08,0xf3,0x4c,0x98,0x7b

# ATT:   {nf}	blsrq	123(%rax,%rbx,4), %r9
# INTEL: {nf}	blsr	r9, qword ptr [rax + 4*rbx + 123]
0x62,0xf2,0xb4,0x0c,0xf3,0x4c,0x98,0x7b

# ATT:   blsrq	123(%rax,%rbx,4), %r9
# INTEL: blsr	r9, qword ptr [rax + 4*rbx + 123]
0x62,0xf2,0xb4,0x08,0xf3,0x4c,0x98,0x7b

# ATT:   blsrl	%r18d, %r22d
# INTEL: blsr	r22d, r18d
0x62,0xfa,0x4c,0x00,0xf3,0xca

# ATT:   blsrq	%r19, %r23
# INTEL: blsr	r23, r19
0x62,0xfa,0xc4,0x00,0xf3,0xcb

# ATT:   blsrl	291(%r28,%r29,4), %r18d
# INTEL: blsr	r18d, dword ptr [r28 + 4*r29 + 291]
0x62,0x9a,0x68,0x00,0xf3,0x8c,0xac,0x23,0x01,0x00,0x00

# ATT:   blsrq	291(%r28,%r29,4), %r19
# INTEL: blsr	r19, qword ptr [r28 + 4*r29 + 291]
0x62,0x9a,0xe0,0x00,0xf3,0x8c,0xac,0x23,0x01,0x00,0x00