llvm/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir

# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s

---
name:            loads
tracksRegLiveness: true
body:             |
  bb.1.entry:
    %1:_(p0) = G_IMPLICIT_DEF
    %4:_(p1) = G_IMPLICIT_DEF
    %6:_(p5) = G_IMPLICIT_DEF

    ; Atomic load
    ; CHECK: DIVERGENT
    ; CHECK-SAME: G_LOAD
    %0:_(s32) = G_LOAD %1(p0) :: (load seq_cst (s32) from `ptr undef`)

    ; flat load
    ; CHECK: DIVERGENT
    ; CHECK-SAME: G_LOAD
    %2:_(s32) = G_LOAD %1(p0) :: (load (s32) from `ptr undef`)

    ; Gloabal load
    ; CHECK-NOT: DIVERGENT
    %3:_(s32) = G_LOAD %4(p1) :: (load (s32) from `ptr addrspace(1) undef`, addrspace 1)

    ; Private load
    ; CHECK: DIVERGENT
    ; CHECK-SAME: G_LOAD
    %5:_(s32) = G_LOAD %6(p5) :: (volatile load (s32) from `ptr addrspace(5) undef`, addrspace 5)
    G_STORE %2(s32), %4(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
    G_STORE %3(s32), %4(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
    G_STORE %5(s32), %4(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
    G_STORE %0(s32), %4(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
    SI_RETURN

...