#include "../Error.h"
#include "../Target.h"
#include "MCTargetDesc/MipsBaseInfo.h"
#include "Mips.h"
#include "MipsRegisterInfo.h"
#define GET_AVAILABLE_OPCODE_CHECKER
#include "MipsGenInstrInfo.inc"
namespace llvm {
namespace exegesis {
#ifndef NDEBUG
static Error isInvalidMemoryInstr(const Instruction &Instr) {
switch (Instr.Description.TSFlags & MipsII::FormMask) {
default:
llvm_unreachable("Unknown FormMask value");
case MipsII::Pseudo:
case MipsII::FrmR:
case MipsII::FrmJ:
case MipsII::FrmFR:
return Error::success();
case MipsII::FrmI:
return Error::success();
case MipsII::FrmFI:
case MipsII::FrmOther:
return make_error<Failure>("unsupported opcode: non uniform memory access");
}
}
#endif
static void setMemOp(InstructionTemplate &IT, int OpIdx,
const MCOperand &OpVal) { … }
#include "MipsGenExegesis.inc"
namespace {
class ExegesisMipsTarget : public ExegesisTarget { … };
}
static std::vector<MCInst> loadImmediate(unsigned Reg, bool IsGPR32,
const APInt &Value) { … }
unsigned ExegesisMipsTarget::getScratchMemoryRegister(const Triple &TT) const { … }
void ExegesisMipsTarget::fillMemoryOperands(InstructionTemplate &IT,
unsigned Reg,
unsigned Offset) const { … }
std::vector<MCInst> ExegesisMipsTarget::setRegTo(const MCSubtargetInfo &STI,
unsigned Reg,
const APInt &Value) const { … }
static ExegesisTarget *getTheExegesisMipsTarget() { … }
void InitializeMipsExegesisTarget() { … }
}
}