# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# Test wave32
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+wavefrontsize32 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefixes=MUBUFW32 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+wavefrontsize32 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefixes=FLATSCRW32 %s
---
name: v_add_co_u32_e64__inline_imm__fi_offset0
tracksRegLiveness: true
stack:
- { id: 0, size: 4, alignment: 16 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
body: |
bb.0:
; MUBUFW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0
; MUBUFW32: renamable $vgpr0, $vcc_lo = V_ADD_CO_U32_e64 12, $sgpr32, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0
; FLATSCRW32: renamable $vgpr0, $vcc_lo = V_ADD_CO_U32_e64 12, $sgpr32, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr0
renamable $vgpr0, $vcc_lo = V_ADD_CO_U32_e64 12, %stack.0, 0, implicit $exec
SI_RETURN implicit $vgpr0, implicit $sgpr0
...
---
name: v_add_co_u32_e64__inline_imm__fi_offset0__clamp
tracksRegLiveness: true
stack:
- { id: 0, size: 4, alignment: 16 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
body: |
bb.0:
; MUBUFW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__clamp
; MUBUFW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 12, $sgpr32, 1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__clamp
; FLATSCRW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 12, $sgpr32, 1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 12, %stack.0, 1, implicit $exec
SI_RETURN implicit $vgpr0
...
---
name: v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc_clamp
tracksRegLiveness: true
stack:
- { id: 0, size: 4, alignment: 16 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
body: |
bb.0:
; MUBUFW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc_clamp
; MUBUFW32: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 12, $sgpr32, 1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc_clamp
; FLATSCRW32: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 12, $sgpr32, 1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 12, %stack.0, 1, implicit $exec
SI_RETURN implicit $vgpr0, implicit $vcc_lo
...
---
name: v_add_co_u32_e64__fi_literal_offset__sgpr
tracksRegLiveness: true
stack:
- { id: 0, size: 128, alignment: 16 }
- { id: 1, size: 4, alignment: 4 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
body: |
bb.0:
liveins: $sgpr8
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $sgpr8, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $sgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 %stack.1, $sgpr8, 0, implicit $exec
SI_RETURN implicit $vgpr0, implicit $vcc_lo
...
---
name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
tracksRegLiveness: true
stack:
- { id: 0, size: 128, alignment: 16 }
- { id: 1, size: 4, alignment: 4 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
body: |
bb.0:
liveins: $sgpr8
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $sgpr8, 1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $sgpr8, 1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 %stack.1, $sgpr8, 1, implicit $exec
SI_RETURN implicit $vgpr0, implicit $vcc_lo
...
---
name: v_add_co_u32_e64__fi_literal_offset__vgpr
tracksRegLiveness: true
stack:
- { id: 0, size: 128, alignment: 16 }
- { id: 1, size: 4, alignment: 4 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
body: |
bb.0:
liveins: $vgpr8
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; MUBUFW32: liveins: $vgpr8
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $vgpr8, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; FLATSCRW32: liveins: $vgpr8
; FLATSCRW32-NEXT: {{ $}}
; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $vgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 %stack.1, $vgpr8, 0, implicit $exec
SI_RETURN implicit $vgpr0
...
---
name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
tracksRegLiveness: true
stack:
- { id: 0, size: 128, alignment: 16 }
- { id: 1, size: 4, alignment: 4 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
body: |
bb.0:
liveins: $vgpr8
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; MUBUFW32: liveins: $vgpr8
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $vgpr8, 1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; FLATSCRW32: liveins: $vgpr8
; FLATSCRW32-NEXT: {{ $}}
; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $vgpr8, 1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 %stack.1, $vgpr8, 1, implicit $exec
SI_RETURN implicit $vgpr0
...
---
name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
tracksRegLiveness: true
stack:
- { id: 0, size: 128, alignment: 16 }
- { id: 1, size: 4, alignment: 4 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
body: |
bb.0:
liveins: $vgpr8
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; MUBUFW32: liveins: $vgpr8
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $vgpr8, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; FLATSCRW32: liveins: $vgpr8
; FLATSCRW32-NEXT: {{ $}}
; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $vgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 %stack.1, $vgpr8, 0, implicit $exec
SI_RETURN implicit $vgpr0, implicit $vcc_lo
...
---
name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp
tracksRegLiveness: true
stack:
- { id: 0, size: 72, alignment: 16 }
- { id: 1, size: 40, alignment: 4 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
isEntryFunction: true
body: |
bb.0:
; MUBUFW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp
; MUBUFW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 12, 72, 1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp
; FLATSCRW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 12, 72, 1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 12, %stack.1, 1, implicit $exec
SI_RETURN implicit $vgpr0
...
---
name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
tracksRegLiveness: true
stack:
- { id: 0, size: 128, alignment: 16 }
- { id: 1, size: 4, alignment: 4 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
body: |
bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; MUBUFW32: liveins: $sgpr8, $vgpr254, $vgpr255, $vgpr252_vgpr253, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $sgpr8, 0, implicit $exec
; MUBUFW32-NEXT: S_NOP 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, implicit $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, implicit $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, implicit $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, implicit $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, implicit $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, implicit $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, implicit $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, implicit $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, implicit $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, implicit $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, implicit $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, implicit $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, implicit $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, implicit $vgpr248_vgpr249_vgpr250_vgpr251, implicit $vgpr252_vgpr253, implicit $vgpr254, implicit $vgpr255
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; FLATSCRW32: liveins: $sgpr8, $vgpr254, $vgpr255, $vgpr252_vgpr253, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; FLATSCRW32-NEXT: {{ $}}
; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 128, implicit-def $scc
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 killed $sgpr4, $sgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: S_NOP 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, implicit $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, implicit $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, implicit $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, implicit $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, implicit $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, implicit $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, implicit $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, implicit $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, implicit $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, implicit $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, implicit $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, implicit $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, implicit $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, implicit $vgpr248_vgpr249_vgpr250_vgpr251, implicit $vgpr252_vgpr253, implicit $vgpr254, implicit $vgpr255
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 %stack.1, $sgpr8, 0, implicit $exec
S_NOP 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, implicit $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, implicit $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, implicit $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, implicit $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, implicit $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, implicit $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, implicit $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, implicit $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, implicit $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, implicit $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, implicit $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, implicit $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, implicit $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, implicit $vgpr248_vgpr249_vgpr250_vgpr251, implicit $vgpr252_vgpr253, implicit $vgpr254, implicit $vgpr255
SI_RETURN implicit $vgpr0
...
---
name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after
tracksRegLiveness: true
stack:
- { id: 0, size: 16, alignment: 16 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
isEntryFunction: true
body: |
bb.0:
liveins: $vgpr1
; MUBUFW32-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after
; MUBUFW32: liveins: $vgpr1
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after
; FLATSCRW32: liveins: $vgpr1
; FLATSCRW32-NEXT: {{ $}}
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 renamable $vgpr1, %stack.0, 0, implicit $exec
SI_RETURN implicit $vgpr0, implicit $vgpr1
...
---
name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0
tracksRegLiveness: true
stack:
- { id: 0, size: 16, alignment: 16 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
isEntryFunction: true
body: |
bb.0:
liveins: $vgpr1
; MUBUFW32-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0
; MUBUFW32: liveins: $vgpr1
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0
; FLATSCRW32: liveins: $vgpr1
; FLATSCRW32-NEXT: {{ $}}
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 %stack.0, renamable $vgpr1, 0, implicit $exec
SI_RETURN implicit $vgpr0, implicit $vgpr1
...
---
name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel
tracksRegLiveness: true
stack:
- { id: 0, size: 32, alignment: 16 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
isEntryFunction: true
body: |
bb.0:
liveins: $vgpr0
; MUBUFW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel
; MUBUFW32: liveins: $vgpr0
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, 0, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel
; FLATSCRW32: liveins: $vgpr0
; FLATSCRW32-NEXT: {{ $}}
; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, 0, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, %stack.0, 0, implicit $exec
SI_RETURN implicit $vgpr0
...
---
name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel
tracksRegLiveness: true
stack:
- { id: 0, size: 32, alignment: 16 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
isEntryFunction: true
body: |
bb.0:
liveins: $vgpr0
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel
; MUBUFW32: liveins: $vgpr0
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 0, $vgpr0, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel
; FLATSCRW32: liveins: $vgpr0
; FLATSCRW32-NEXT: {{ $}}
; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 0, $vgpr0, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 %stack.0, $vgpr0, 0, implicit $exec
SI_RETURN implicit $vgpr0
...
---
name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel
tracksRegLiveness: true
stack:
- { id: 0, size: 32, alignment: 16 }
- { id: 1, size: 64, alignment: 4 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
isEntryFunction: true
body: |
bb.0:
liveins: $vgpr0
; MUBUFW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel
; MUBUFW32: liveins: $vgpr0
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel
; FLATSCRW32: liveins: $vgpr0
; FLATSCRW32-NEXT: {{ $}}
; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, %stack.1, 0, implicit $exec
SI_RETURN implicit $vgpr0
...
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