# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
# ATT: vcvttpd2dqs %xmm23, %xmm22
# INTEL: vcvttpd2dqs xmm22, xmm23
0x62,0xa5,0xfc,0x08,0x6d,0xf7
# ATT: vcvttpd2dqs %xmm23, %xmm22 {%k7}
# INTEL: vcvttpd2dqs xmm22 {k7}, xmm23
0x62,0xa5,0xfc,0x0f,0x6d,0xf7
# ATT: vcvttpd2dqs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttpd2dqs xmm22 {k7} {z}, xmm23
0x62,0xa5,0xfc,0x8f,0x6d,0xf7
# ATT: vcvttpd2dqs %ymm23, %xmm22
# INTEL: vcvttpd2dqs xmm22, ymm23
0x62,0xa5,0xfc,0x28,0x6d,0xf7
# ATT: vcvttpd2dqs {sae}, %ymm23, %xmm22
# INTEL: vcvttpd2dqs xmm22, ymm23, {sae}
0x62,0xa5,0xf8,0x18,0x6d,0xf7
# ATT: vcvttpd2dqs %ymm23, %xmm22 {%k7}
# INTEL: vcvttpd2dqs xmm22 {k7}, ymm23
0x62,0xa5,0xfc,0x2f,0x6d,0xf7
# ATT: vcvttpd2dqs {sae}, %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvttpd2dqs xmm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0xf8,0x9f,0x6d,0xf7
# ATT: vcvttpd2dqs %zmm23, %ymm22
# INTEL: vcvttpd2dqs ymm22, zmm23
0x62,0xa5,0xfc,0x48,0x6d,0xf7
# ATT: vcvttpd2dqs {sae}, %zmm23, %ymm22
# INTEL: vcvttpd2dqs ymm22, zmm23, {sae}
0x62,0xa5,0xfc,0x18,0x6d,0xf7
# ATT: vcvttpd2dqs %zmm23, %ymm22 {%k7}
# INTEL: vcvttpd2dqs ymm22 {k7}, zmm23
0x62,0xa5,0xfc,0x4f,0x6d,0xf7
# ATT: vcvttpd2dqs {sae}, %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvttpd2dqs ymm22 {k7} {z}, zmm23, {sae}
0x62,0xa5,0xfc,0x9f,0x6d,0xf7
# ATT: vcvttpd2dqsx 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttpd2dqs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0xfc,0x08,0x6d,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttpd2dqsx 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttpd2dqs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0xfc,0x0f,0x6d,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttpd2dqs (%rip){1to2}, %xmm22
# INTEL: vcvttpd2dqs xmm22, qword ptr [rip]{1to2}
0x62,0xe5,0xfc,0x18,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2dqsx -512(,%rbp,2), %xmm22
# INTEL: vcvttpd2dqs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0xfc,0x08,0x6d,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttpd2dqsx 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttpd2dqs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0xfc,0x8f,0x6d,0x71,0x7f
# ATT: vcvttpd2dqs -1024(%rdx){1to2}, %xmm22 {%k7} {z}
# INTEL: vcvttpd2dqs xmm22 {k7} {z}, qword ptr [rdx - 1024]{1to2}
0x62,0xe5,0xfc,0x9f,0x6d,0x72,0x80
# ATT: vcvttpd2dqs (%rip){1to4}, %xmm22
# INTEL: vcvttpd2dqs xmm22, qword ptr [rip]{1to4}
0x62,0xe5,0xfc,0x38,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2dqsy -1024(,%rbp,2), %xmm22
# INTEL: vcvttpd2dqs xmm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0xfc,0x28,0x6d,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttpd2dqsy 4064(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttpd2dqs xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0xfc,0xaf,0x6d,0x71,0x7f
# ATT: vcvttpd2dqs -1024(%rdx){1to4}, %xmm22 {%k7} {z}
# INTEL: vcvttpd2dqs xmm22 {k7} {z}, qword ptr [rdx - 1024]{1to4}
0x62,0xe5,0xfc,0xbf,0x6d,0x72,0x80
# ATT: vcvttpd2dqs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttpd2dqs ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0xfc,0x48,0x6d,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttpd2dqs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttpd2dqs ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0xfc,0x4f,0x6d,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttpd2dqs (%rip){1to8}, %ymm22
# INTEL: vcvttpd2dqs ymm22, qword ptr [rip]{1to8}
0x62,0xe5,0xfc,0x58,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2dqs -2048(,%rbp,2), %ymm22
# INTEL: vcvttpd2dqs ymm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0xfc,0x48,0x6d,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttpd2dqs 8128(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttpd2dqs ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0xfc,0xcf,0x6d,0x71,0x7f
# ATT: vcvttpd2dqs -1024(%rdx){1to8}, %ymm22 {%k7} {z}
# INTEL: vcvttpd2dqs ymm22 {k7} {z}, qword ptr [rdx - 1024]{1to8}
0x62,0xe5,0xfc,0xdf,0x6d,0x72,0x80
# ATT: vcvttpd2qqs %xmm23, %xmm22
# INTEL: vcvttpd2qqs xmm22, xmm23
0x62,0xa5,0xfd,0x08,0x6d,0xf7
# ATT: vcvttpd2qqs %xmm23, %xmm22 {%k7}
# INTEL: vcvttpd2qqs xmm22 {k7}, xmm23
0x62,0xa5,0xfd,0x0f,0x6d,0xf7
# ATT: vcvttpd2qqs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttpd2qqs xmm22 {k7} {z}, xmm23
0x62,0xa5,0xfd,0x8f,0x6d,0xf7
# ATT: vcvttpd2qqs %ymm23, %ymm22
# INTEL: vcvttpd2qqs ymm22, ymm23
0x62,0xa5,0xfd,0x28,0x6d,0xf7
# ATT: vcvttpd2qqs {sae}, %ymm23, %ymm22
# INTEL: vcvttpd2qqs ymm22, ymm23, {sae}
0x62,0xa5,0xf9,0x18,0x6d,0xf7
# ATT: vcvttpd2qqs %ymm23, %ymm22 {%k7}
# INTEL: vcvttpd2qqs ymm22 {k7}, ymm23
0x62,0xa5,0xfd,0x2f,0x6d,0xf7
# ATT: vcvttpd2qqs {sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvttpd2qqs ymm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0xf9,0x9f,0x6d,0xf7
# ATT: vcvttpd2qqs %zmm23, %zmm22
# INTEL: vcvttpd2qqs zmm22, zmm23
0x62,0xa5,0xfd,0x48,0x6d,0xf7
# ATT: vcvttpd2qqs {sae}, %zmm23, %zmm22
# INTEL: vcvttpd2qqs zmm22, zmm23, {sae}
0x62,0xa5,0xfd,0x18,0x6d,0xf7
# ATT: vcvttpd2qqs %zmm23, %zmm22 {%k7}
# INTEL: vcvttpd2qqs zmm22 {k7}, zmm23
0x62,0xa5,0xfd,0x4f,0x6d,0xf7
# ATT: vcvttpd2qqs {sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvttpd2qqs zmm22 {k7} {z}, zmm23, {sae}
0x62,0xa5,0xfd,0x9f,0x6d,0xf7
# ATT: vcvttpd2qqs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttpd2qqs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0xfd,0x08,0x6d,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttpd2qqs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttpd2qqs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0xfd,0x0f,0x6d,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttpd2qqs (%rip){1to2}, %xmm22
# INTEL: vcvttpd2qqs xmm22, qword ptr [rip]{1to2}
0x62,0xe5,0xfd,0x18,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2qqs -512(,%rbp,2), %xmm22
# INTEL: vcvttpd2qqs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0xfd,0x08,0x6d,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttpd2qqs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttpd2qqs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0xfd,0x8f,0x6d,0x71,0x7f
# ATT: vcvttpd2qqs -1024(%rdx){1to2}, %xmm22 {%k7} {z}
# INTEL: vcvttpd2qqs xmm22 {k7} {z}, qword ptr [rdx - 1024]{1to2}
0x62,0xe5,0xfd,0x9f,0x6d,0x72,0x80
# ATT: vcvttpd2qqs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttpd2qqs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0xfd,0x28,0x6d,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttpd2qqs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttpd2qqs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0xfd,0x2f,0x6d,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttpd2qqs (%rip){1to4}, %ymm22
# INTEL: vcvttpd2qqs ymm22, qword ptr [rip]{1to4}
0x62,0xe5,0xfd,0x38,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2qqs -1024(,%rbp,2), %ymm22
# INTEL: vcvttpd2qqs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0xfd,0x28,0x6d,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttpd2qqs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttpd2qqs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0xfd,0xaf,0x6d,0x71,0x7f
# ATT: vcvttpd2qqs -1024(%rdx){1to4}, %ymm22 {%k7} {z}
# INTEL: vcvttpd2qqs ymm22 {k7} {z}, qword ptr [rdx - 1024]{1to4}
0x62,0xe5,0xfd,0xbf,0x6d,0x72,0x80
# ATT: vcvttpd2qqs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttpd2qqs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0xfd,0x48,0x6d,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttpd2qqs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttpd2qqs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0xfd,0x4f,0x6d,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttpd2qqs (%rip){1to8}, %zmm22
# INTEL: vcvttpd2qqs zmm22, qword ptr [rip]{1to8}
0x62,0xe5,0xfd,0x58,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2qqs -2048(,%rbp,2), %zmm22
# INTEL: vcvttpd2qqs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0xfd,0x48,0x6d,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttpd2qqs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttpd2qqs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0xfd,0xcf,0x6d,0x71,0x7f
# ATT: vcvttpd2qqs -1024(%rdx){1to8}, %zmm22 {%k7} {z}
# INTEL: vcvttpd2qqs zmm22 {k7} {z}, qword ptr [rdx - 1024]{1to8}
0x62,0xe5,0xfd,0xdf,0x6d,0x72,0x80
# ATT: vcvttpd2udqs %xmm23, %xmm22
# INTEL: vcvttpd2udqs xmm22, xmm23
0x62,0xa5,0xfc,0x08,0x6c,0xf7
# ATT: vcvttpd2udqs %xmm23, %xmm22 {%k7}
# INTEL: vcvttpd2udqs xmm22 {k7}, xmm23
0x62,0xa5,0xfc,0x0f,0x6c,0xf7
# ATT: vcvttpd2udqs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttpd2udqs xmm22 {k7} {z}, xmm23
0x62,0xa5,0xfc,0x8f,0x6c,0xf7
# ATT: vcvttpd2udqs %ymm23, %xmm22
# INTEL: vcvttpd2udqs xmm22, ymm23
0x62,0xa5,0xfc,0x28,0x6c,0xf7
# ATT: vcvttpd2udqs {sae}, %ymm23, %xmm22
# INTEL: vcvttpd2udqs xmm22, ymm23, {sae}
0x62,0xa5,0xf8,0x18,0x6c,0xf7
# ATT: vcvttpd2udqs %ymm23, %xmm22 {%k7}
# INTEL: vcvttpd2udqs xmm22 {k7}, ymm23
0x62,0xa5,0xfc,0x2f,0x6c,0xf7
# ATT: vcvttpd2udqs {sae}, %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvttpd2udqs xmm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0xf8,0x9f,0x6c,0xf7
# ATT: vcvttpd2udqs %zmm23, %ymm22
# INTEL: vcvttpd2udqs ymm22, zmm23
0x62,0xa5,0xfc,0x48,0x6c,0xf7
# ATT: vcvttpd2udqs {sae}, %zmm23, %ymm22
# INTEL: vcvttpd2udqs ymm22, zmm23, {sae}
0x62,0xa5,0xfc,0x18,0x6c,0xf7
# ATT: vcvttpd2udqs %zmm23, %ymm22 {%k7}
# INTEL: vcvttpd2udqs ymm22 {k7}, zmm23
0x62,0xa5,0xfc,0x4f,0x6c,0xf7
# ATT: vcvttpd2udqs {sae}, %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvttpd2udqs ymm22 {k7} {z}, zmm23, {sae}
0x62,0xa5,0xfc,0x9f,0x6c,0xf7
# ATT: vcvttpd2udqsx 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttpd2udqs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0xfc,0x08,0x6c,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttpd2udqsx 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttpd2udqs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0xfc,0x0f,0x6c,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttpd2udqs (%rip){1to2}, %xmm22
# INTEL: vcvttpd2udqs xmm22, qword ptr [rip]{1to2}
0x62,0xe5,0xfc,0x18,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2udqsx -512(,%rbp,2), %xmm22
# INTEL: vcvttpd2udqs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0xfc,0x08,0x6c,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttpd2udqsx 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttpd2udqs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0xfc,0x8f,0x6c,0x71,0x7f
# ATT: vcvttpd2udqs -1024(%rdx){1to2}, %xmm22 {%k7} {z}
# INTEL: vcvttpd2udqs xmm22 {k7} {z}, qword ptr [rdx - 1024]{1to2}
0x62,0xe5,0xfc,0x9f,0x6c,0x72,0x80
# ATT: vcvttpd2udqs (%rip){1to4}, %xmm22
# INTEL: vcvttpd2udqs xmm22, qword ptr [rip]{1to4}
0x62,0xe5,0xfc,0x38,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2udqsy -1024(,%rbp,2), %xmm22
# INTEL: vcvttpd2udqs xmm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0xfc,0x28,0x6c,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttpd2udqsy 4064(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttpd2udqs xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0xfc,0xaf,0x6c,0x71,0x7f
# ATT: vcvttpd2udqs -1024(%rdx){1to4}, %xmm22 {%k7} {z}
# INTEL: vcvttpd2udqs xmm22 {k7} {z}, qword ptr [rdx - 1024]{1to4}
0x62,0xe5,0xfc,0xbf,0x6c,0x72,0x80
# ATT: vcvttpd2udqs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttpd2udqs ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0xfc,0x48,0x6c,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttpd2udqs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttpd2udqs ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0xfc,0x4f,0x6c,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttpd2udqs (%rip){1to8}, %ymm22
# INTEL: vcvttpd2udqs ymm22, qword ptr [rip]{1to8}
0x62,0xe5,0xfc,0x58,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2udqs -2048(,%rbp,2), %ymm22
# INTEL: vcvttpd2udqs ymm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0xfc,0x48,0x6c,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttpd2udqs 8128(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttpd2udqs ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0xfc,0xcf,0x6c,0x71,0x7f
# ATT: vcvttpd2udqs -1024(%rdx){1to8}, %ymm22 {%k7} {z}
# INTEL: vcvttpd2udqs ymm22 {k7} {z}, qword ptr [rdx - 1024]{1to8}
0x62,0xe5,0xfc,0xdf,0x6c,0x72,0x80
# ATT: vcvttpd2uqqs %xmm23, %xmm22
# INTEL: vcvttpd2uqqs xmm22, xmm23
0x62,0xa5,0xfd,0x08,0x6c,0xf7
# ATT: vcvttpd2uqqs %xmm23, %xmm22 {%k7}
# INTEL: vcvttpd2uqqs xmm22 {k7}, xmm23
0x62,0xa5,0xfd,0x0f,0x6c,0xf7
# ATT: vcvttpd2uqqs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttpd2uqqs xmm22 {k7} {z}, xmm23
0x62,0xa5,0xfd,0x8f,0x6c,0xf7
# ATT: vcvttpd2uqqs %ymm23, %ymm22
# INTEL: vcvttpd2uqqs ymm22, ymm23
0x62,0xa5,0xfd,0x28,0x6c,0xf7
# ATT: vcvttpd2uqqs {sae}, %ymm23, %ymm22
# INTEL: vcvttpd2uqqs ymm22, ymm23, {sae}
0x62,0xa5,0xf9,0x18,0x6c,0xf7
# ATT: vcvttpd2uqqs %ymm23, %ymm22 {%k7}
# INTEL: vcvttpd2uqqs ymm22 {k7}, ymm23
0x62,0xa5,0xfd,0x2f,0x6c,0xf7
# ATT: vcvttpd2uqqs {sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvttpd2uqqs ymm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0xf9,0x9f,0x6c,0xf7
# ATT: vcvttpd2uqqs %zmm23, %zmm22
# INTEL: vcvttpd2uqqs zmm22, zmm23
0x62,0xa5,0xfd,0x48,0x6c,0xf7
# ATT: vcvttpd2uqqs {sae}, %zmm23, %zmm22
# INTEL: vcvttpd2uqqs zmm22, zmm23, {sae}
0x62,0xa5,0xfd,0x18,0x6c,0xf7
# ATT: vcvttpd2uqqs %zmm23, %zmm22 {%k7}
# INTEL: vcvttpd2uqqs zmm22 {k7}, zmm23
0x62,0xa5,0xfd,0x4f,0x6c,0xf7
# ATT: vcvttpd2uqqs {sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvttpd2uqqs zmm22 {k7} {z}, zmm23, {sae}
0x62,0xa5,0xfd,0x9f,0x6c,0xf7
# ATT: vcvttpd2uqqs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttpd2uqqs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0xfd,0x08,0x6c,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttpd2uqqs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttpd2uqqs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0xfd,0x0f,0x6c,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttpd2uqqs (%rip){1to2}, %xmm22
# INTEL: vcvttpd2uqqs xmm22, qword ptr [rip]{1to2}
0x62,0xe5,0xfd,0x18,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2uqqs -512(,%rbp,2), %xmm22
# INTEL: vcvttpd2uqqs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0xfd,0x08,0x6c,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttpd2uqqs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttpd2uqqs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0xfd,0x8f,0x6c,0x71,0x7f
# ATT: vcvttpd2uqqs -1024(%rdx){1to2}, %xmm22 {%k7} {z}
# INTEL: vcvttpd2uqqs xmm22 {k7} {z}, qword ptr [rdx - 1024]{1to2}
0x62,0xe5,0xfd,0x9f,0x6c,0x72,0x80
# ATT: vcvttpd2uqqs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttpd2uqqs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0xfd,0x28,0x6c,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttpd2uqqs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttpd2uqqs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0xfd,0x2f,0x6c,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttpd2uqqs (%rip){1to4}, %ymm22
# INTEL: vcvttpd2uqqs ymm22, qword ptr [rip]{1to4}
0x62,0xe5,0xfd,0x38,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2uqqs -1024(,%rbp,2), %ymm22
# INTEL: vcvttpd2uqqs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0xfd,0x28,0x6c,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttpd2uqqs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttpd2uqqs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0xfd,0xaf,0x6c,0x71,0x7f
# ATT: vcvttpd2uqqs -1024(%rdx){1to4}, %ymm22 {%k7} {z}
# INTEL: vcvttpd2uqqs ymm22 {k7} {z}, qword ptr [rdx - 1024]{1to4}
0x62,0xe5,0xfd,0xbf,0x6c,0x72,0x80
# ATT: vcvttpd2uqqs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttpd2uqqs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0xfd,0x48,0x6c,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttpd2uqqs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttpd2uqqs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0xfd,0x4f,0x6c,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttpd2uqqs (%rip){1to8}, %zmm22
# INTEL: vcvttpd2uqqs zmm22, qword ptr [rip]{1to8}
0x62,0xe5,0xfd,0x58,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttpd2uqqs -2048(,%rbp,2), %zmm22
# INTEL: vcvttpd2uqqs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0xfd,0x48,0x6c,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttpd2uqqs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttpd2uqqs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0xfd,0xcf,0x6c,0x71,0x7f
# ATT: vcvttpd2uqqs -1024(%rdx){1to8}, %zmm22 {%k7} {z}
# INTEL: vcvttpd2uqqs zmm22 {k7} {z}, qword ptr [rdx - 1024]{1to8}
0x62,0xe5,0xfd,0xdf,0x6c,0x72,0x80
# ATT: vcvttps2dqs %xmm23, %xmm22
# INTEL: vcvttps2dqs xmm22, xmm23
0x62,0xa5,0x7c,0x08,0x6d,0xf7
# ATT: vcvttps2dqs %xmm23, %xmm22 {%k7}
# INTEL: vcvttps2dqs xmm22 {k7}, xmm23
0x62,0xa5,0x7c,0x0f,0x6d,0xf7
# ATT: vcvttps2dqs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttps2dqs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7c,0x8f,0x6d,0xf7
# ATT: vcvttps2dqs %ymm23, %ymm22
# INTEL: vcvttps2dqs ymm22, ymm23
0x62,0xa5,0x7c,0x28,0x6d,0xf7
# ATT: vcvttps2dqs {sae}, %ymm23, %ymm22
# INTEL: vcvttps2dqs ymm22, ymm23, {sae}
0x62,0xa5,0x78,0x18,0x6d,0xf7
# ATT: vcvttps2dqs %ymm23, %ymm22 {%k7}
# INTEL: vcvttps2dqs ymm22 {k7}, ymm23
0x62,0xa5,0x7c,0x2f,0x6d,0xf7
# ATT: vcvttps2dqs {sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvttps2dqs ymm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0x78,0x9f,0x6d,0xf7
# ATT: vcvttps2dqs %zmm23, %zmm22
# INTEL: vcvttps2dqs zmm22, zmm23
0x62,0xa5,0x7c,0x48,0x6d,0xf7
# ATT: vcvttps2dqs {sae}, %zmm23, %zmm22
# INTEL: vcvttps2dqs zmm22, zmm23, {sae}
0x62,0xa5,0x7c,0x18,0x6d,0xf7
# ATT: vcvttps2dqs %zmm23, %zmm22 {%k7}
# INTEL: vcvttps2dqs zmm22 {k7}, zmm23
0x62,0xa5,0x7c,0x4f,0x6d,0xf7
# ATT: vcvttps2dqs {sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvttps2dqs zmm22 {k7} {z}, zmm23, {sae}
0x62,0xa5,0x7c,0x9f,0x6d,0xf7
# ATT: vcvttps2dqs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttps2dqs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x08,0x6d,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2dqs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttps2dqs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x0f,0x6d,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2dqs (%rip){1to4}, %xmm22
# INTEL: vcvttps2dqs xmm22, dword ptr [rip]{1to4}
0x62,0xe5,0x7c,0x18,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2dqs -512(,%rbp,2), %xmm22
# INTEL: vcvttps2dqs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7c,0x08,0x6d,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttps2dqs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttps2dqs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7c,0x8f,0x6d,0x71,0x7f
# ATT: vcvttps2dqs -512(%rdx){1to4}, %xmm22 {%k7} {z}
# INTEL: vcvttps2dqs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
0x62,0xe5,0x7c,0x9f,0x6d,0x72,0x80
# ATT: vcvttps2dqs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttps2dqs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x28,0x6d,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2dqs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttps2dqs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x2f,0x6d,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2dqs (%rip){1to8}, %ymm22
# INTEL: vcvttps2dqs ymm22, dword ptr [rip]{1to8}
0x62,0xe5,0x7c,0x38,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2dqs -1024(,%rbp,2), %ymm22
# INTEL: vcvttps2dqs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7c,0x28,0x6d,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttps2dqs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttps2dqs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7c,0xaf,0x6d,0x71,0x7f
# ATT: vcvttps2dqs -512(%rdx){1to8}, %ymm22 {%k7} {z}
# INTEL: vcvttps2dqs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
0x62,0xe5,0x7c,0xbf,0x6d,0x72,0x80
# ATT: vcvttps2dqs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttps2dqs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x48,0x6d,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2dqs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttps2dqs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x4f,0x6d,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2dqs (%rip){1to16}, %zmm22
# INTEL: vcvttps2dqs zmm22, dword ptr [rip]{1to16}
0x62,0xe5,0x7c,0x58,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2dqs -2048(,%rbp,2), %zmm22
# INTEL: vcvttps2dqs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7c,0x48,0x6d,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttps2dqs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttps2dqs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7c,0xcf,0x6d,0x71,0x7f
# ATT: vcvttps2dqs -512(%rdx){1to16}, %zmm22 {%k7} {z}
# INTEL: vcvttps2dqs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
0x62,0xe5,0x7c,0xdf,0x6d,0x72,0x80
# ATT: vcvttps2qqs %xmm23, %xmm22
# INTEL: vcvttps2qqs xmm22, xmm23
0x62,0xa5,0x7d,0x08,0x6d,0xf7
# ATT: vcvttps2qqs %xmm23, %xmm22 {%k7}
# INTEL: vcvttps2qqs xmm22 {k7}, xmm23
0x62,0xa5,0x7d,0x0f,0x6d,0xf7
# ATT: vcvttps2qqs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttps2qqs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7d,0x8f,0x6d,0xf7
# ATT: vcvttps2qqs %xmm23, %ymm22
# INTEL: vcvttps2qqs ymm22, xmm23
0x62,0xa5,0x7d,0x28,0x6d,0xf7
# ATT: vcvttps2qqs {sae}, %xmm23, %ymm22
# INTEL: vcvttps2qqs ymm22, xmm23, {sae}
0x62,0xa5,0x79,0x18,0x6d,0xf7
# ATT: vcvttps2qqs %xmm23, %ymm22 {%k7}
# INTEL: vcvttps2qqs ymm22 {k7}, xmm23
0x62,0xa5,0x7d,0x2f,0x6d,0xf7
# ATT: vcvttps2qqs {sae}, %xmm23, %ymm22 {%k7} {z}
# INTEL: vcvttps2qqs ymm22 {k7} {z}, xmm23, {sae}
0x62,0xa5,0x79,0x9f,0x6d,0xf7
# ATT: vcvttps2qqs %ymm23, %zmm22
# INTEL: vcvttps2qqs zmm22, ymm23
0x62,0xa5,0x7d,0x48,0x6d,0xf7
# ATT: vcvttps2qqs {sae}, %ymm23, %zmm22
# INTEL: vcvttps2qqs zmm22, ymm23, {sae}
0x62,0xa5,0x7d,0x18,0x6d,0xf7
# ATT: vcvttps2qqs %ymm23, %zmm22 {%k7}
# INTEL: vcvttps2qqs zmm22 {k7}, ymm23
0x62,0xa5,0x7d,0x4f,0x6d,0xf7
# ATT: vcvttps2qqs {sae}, %ymm23, %zmm22 {%k7} {z}
# INTEL: vcvttps2qqs zmm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0x7d,0x9f,0x6d,0xf7
# ATT: vcvttps2qqs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttps2qqs xmm22, qword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x08,0x6d,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2qqs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttps2qqs xmm22 {k7}, qword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x0f,0x6d,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2qqs (%rip){1to2}, %xmm22
# INTEL: vcvttps2qqs xmm22, dword ptr [rip]{1to2}
0x62,0xe5,0x7d,0x18,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2qqs -256(,%rbp,2), %xmm22
# INTEL: vcvttps2qqs xmm22, qword ptr [2*rbp - 256]
0x62,0xe5,0x7d,0x08,0x6d,0x34,0x6d,0x00,0xff,0xff,0xff
# ATT: vcvttps2qqs 1016(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttps2qqs xmm22 {k7} {z}, qword ptr [rcx + 1016]
0x62,0xe5,0x7d,0x8f,0x6d,0x71,0x7f
# ATT: vcvttps2qqs -512(%rdx){1to2}, %xmm22 {%k7} {z}
# INTEL: vcvttps2qqs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to2}
0x62,0xe5,0x7d,0x9f,0x6d,0x72,0x80
# ATT: vcvttps2qqs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttps2qqs ymm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x28,0x6d,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2qqs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttps2qqs ymm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x2f,0x6d,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2qqs (%rip){1to4}, %ymm22
# INTEL: vcvttps2qqs ymm22, dword ptr [rip]{1to4}
0x62,0xe5,0x7d,0x38,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2qqs -512(,%rbp,2), %ymm22
# INTEL: vcvttps2qqs ymm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7d,0x28,0x6d,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttps2qqs 2032(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttps2qqs ymm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7d,0xaf,0x6d,0x71,0x7f
# ATT: vcvttps2qqs -512(%rdx){1to4}, %ymm22 {%k7} {z}
# INTEL: vcvttps2qqs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
0x62,0xe5,0x7d,0xbf,0x6d,0x72,0x80
# ATT: vcvttps2qqs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttps2qqs zmm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x48,0x6d,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2qqs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttps2qqs zmm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x4f,0x6d,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2qqs (%rip){1to8}, %zmm22
# INTEL: vcvttps2qqs zmm22, dword ptr [rip]{1to8}
0x62,0xe5,0x7d,0x58,0x6d,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2qqs -1024(,%rbp,2), %zmm22
# INTEL: vcvttps2qqs zmm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7d,0x48,0x6d,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttps2qqs 4064(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttps2qqs zmm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7d,0xcf,0x6d,0x71,0x7f
# ATT: vcvttps2qqs -512(%rdx){1to8}, %zmm22 {%k7} {z}
# INTEL: vcvttps2qqs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
0x62,0xe5,0x7d,0xdf,0x6d,0x72,0x80
# ATT: vcvttps2udqs %xmm23, %xmm22
# INTEL: vcvttps2udqs xmm22, xmm23
0x62,0xa5,0x7c,0x08,0x6c,0xf7
# ATT: vcvttps2udqs %xmm23, %xmm22 {%k7}
# INTEL: vcvttps2udqs xmm22 {k7}, xmm23
0x62,0xa5,0x7c,0x0f,0x6c,0xf7
# ATT: vcvttps2udqs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttps2udqs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7c,0x8f,0x6c,0xf7
# ATT: vcvttps2udqs %ymm23, %ymm22
# INTEL: vcvttps2udqs ymm22, ymm23
0x62,0xa5,0x7c,0x28,0x6c,0xf7
# ATT: vcvttps2udqs {sae}, %ymm23, %ymm22
# INTEL: vcvttps2udqs ymm22, ymm23, {sae}
0x62,0xa5,0x78,0x18,0x6c,0xf7
# ATT: vcvttps2udqs %ymm23, %ymm22 {%k7}
# INTEL: vcvttps2udqs ymm22 {k7}, ymm23
0x62,0xa5,0x7c,0x2f,0x6c,0xf7
# ATT: vcvttps2udqs {sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvttps2udqs ymm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0x78,0x9f,0x6c,0xf7
# ATT: vcvttps2udqs %zmm23, %zmm22
# INTEL: vcvttps2udqs zmm22, zmm23
0x62,0xa5,0x7c,0x48,0x6c,0xf7
# ATT: vcvttps2udqs {sae}, %zmm23, %zmm22
# INTEL: vcvttps2udqs zmm22, zmm23, {sae}
0x62,0xa5,0x7c,0x18,0x6c,0xf7
# ATT: vcvttps2udqs %zmm23, %zmm22 {%k7}
# INTEL: vcvttps2udqs zmm22 {k7}, zmm23
0x62,0xa5,0x7c,0x4f,0x6c,0xf7
# ATT: vcvttps2udqs {sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvttps2udqs zmm22 {k7} {z}, zmm23, {sae}
0x62,0xa5,0x7c,0x9f,0x6c,0xf7
# ATT: vcvttps2udqs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttps2udqs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x08,0x6c,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2udqs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttps2udqs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x0f,0x6c,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2udqs (%rip){1to4}, %xmm22
# INTEL: vcvttps2udqs xmm22, dword ptr [rip]{1to4}
0x62,0xe5,0x7c,0x18,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2udqs -512(,%rbp,2), %xmm22
# INTEL: vcvttps2udqs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7c,0x08,0x6c,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttps2udqs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttps2udqs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7c,0x8f,0x6c,0x71,0x7f
# ATT: vcvttps2udqs -512(%rdx){1to4}, %xmm22 {%k7} {z}
# INTEL: vcvttps2udqs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
0x62,0xe5,0x7c,0x9f,0x6c,0x72,0x80
# ATT: vcvttps2udqs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttps2udqs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x28,0x6c,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2udqs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttps2udqs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x2f,0x6c,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2udqs (%rip){1to8}, %ymm22
# INTEL: vcvttps2udqs ymm22, dword ptr [rip]{1to8}
0x62,0xe5,0x7c,0x38,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2udqs -1024(,%rbp,2), %ymm22
# INTEL: vcvttps2udqs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7c,0x28,0x6c,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttps2udqs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttps2udqs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7c,0xaf,0x6c,0x71,0x7f
# ATT: vcvttps2udqs -512(%rdx){1to8}, %ymm22 {%k7} {z}
# INTEL: vcvttps2udqs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
0x62,0xe5,0x7c,0xbf,0x6c,0x72,0x80
# ATT: vcvttps2udqs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttps2udqs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x48,0x6c,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2udqs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttps2udqs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x4f,0x6c,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2udqs (%rip){1to16}, %zmm22
# INTEL: vcvttps2udqs zmm22, dword ptr [rip]{1to16}
0x62,0xe5,0x7c,0x58,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2udqs -2048(,%rbp,2), %zmm22
# INTEL: vcvttps2udqs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7c,0x48,0x6c,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttps2udqs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttps2udqs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7c,0xcf,0x6c,0x71,0x7f
# ATT: vcvttps2udqs -512(%rdx){1to16}, %zmm22 {%k7} {z}
# INTEL: vcvttps2udqs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
0x62,0xe5,0x7c,0xdf,0x6c,0x72,0x80
# ATT: vcvttps2uqqs %xmm23, %xmm22
# INTEL: vcvttps2uqqs xmm22, xmm23
0x62,0xa5,0x7d,0x08,0x6c,0xf7
# ATT: vcvttps2uqqs %xmm23, %xmm22 {%k7}
# INTEL: vcvttps2uqqs xmm22 {k7}, xmm23
0x62,0xa5,0x7d,0x0f,0x6c,0xf7
# ATT: vcvttps2uqqs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttps2uqqs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7d,0x8f,0x6c,0xf7
# ATT: vcvttps2uqqs %xmm23, %ymm22
# INTEL: vcvttps2uqqs ymm22, xmm23
0x62,0xa5,0x7d,0x28,0x6c,0xf7
# ATT: vcvttps2uqqs {sae}, %xmm23, %ymm22
# INTEL: vcvttps2uqqs ymm22, xmm23, {sae}
0x62,0xa5,0x79,0x18,0x6c,0xf7
# ATT: vcvttps2uqqs %xmm23, %ymm22 {%k7}
# INTEL: vcvttps2uqqs ymm22 {k7}, xmm23
0x62,0xa5,0x7d,0x2f,0x6c,0xf7
# ATT: vcvttps2uqqs {sae}, %xmm23, %ymm22 {%k7} {z}
# INTEL: vcvttps2uqqs ymm22 {k7} {z}, xmm23, {sae}
0x62,0xa5,0x79,0x9f,0x6c,0xf7
# ATT: vcvttps2uqqs %ymm23, %zmm22
# INTEL: vcvttps2uqqs zmm22, ymm23
0x62,0xa5,0x7d,0x48,0x6c,0xf7
# ATT: vcvttps2uqqs {sae}, %ymm23, %zmm22
# INTEL: vcvttps2uqqs zmm22, ymm23, {sae}
0x62,0xa5,0x7d,0x18,0x6c,0xf7
# ATT: vcvttps2uqqs %ymm23, %zmm22 {%k7}
# INTEL: vcvttps2uqqs zmm22 {k7}, ymm23
0x62,0xa5,0x7d,0x4f,0x6c,0xf7
# ATT: vcvttps2uqqs {sae}, %ymm23, %zmm22 {%k7} {z}
# INTEL: vcvttps2uqqs zmm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0x7d,0x9f,0x6c,0xf7
# ATT: vcvttps2uqqs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttps2uqqs xmm22, qword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x08,0x6c,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2uqqs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttps2uqqs xmm22 {k7}, qword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x0f,0x6c,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2uqqs (%rip){1to2}, %xmm22
# INTEL: vcvttps2uqqs xmm22, dword ptr [rip]{1to2}
0x62,0xe5,0x7d,0x18,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2uqqs -256(,%rbp,2), %xmm22
# INTEL: vcvttps2uqqs xmm22, qword ptr [2*rbp - 256]
0x62,0xe5,0x7d,0x08,0x6c,0x34,0x6d,0x00,0xff,0xff,0xff
# ATT: vcvttps2uqqs 1016(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttps2uqqs xmm22 {k7} {z}, qword ptr [rcx + 1016]
0x62,0xe5,0x7d,0x8f,0x6c,0x71,0x7f
# ATT: vcvttps2uqqs -512(%rdx){1to2}, %xmm22 {%k7} {z}
# INTEL: vcvttps2uqqs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to2}
0x62,0xe5,0x7d,0x9f,0x6c,0x72,0x80
# ATT: vcvttps2uqqs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttps2uqqs ymm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x28,0x6c,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2uqqs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttps2uqqs ymm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x2f,0x6c,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2uqqs (%rip){1to4}, %ymm22
# INTEL: vcvttps2uqqs ymm22, dword ptr [rip]{1to4}
0x62,0xe5,0x7d,0x38,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2uqqs -512(,%rbp,2), %ymm22
# INTEL: vcvttps2uqqs ymm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7d,0x28,0x6c,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttps2uqqs 2032(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttps2uqqs ymm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7d,0xaf,0x6c,0x71,0x7f
# ATT: vcvttps2uqqs -512(%rdx){1to4}, %ymm22 {%k7} {z}
# INTEL: vcvttps2uqqs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
0x62,0xe5,0x7d,0xbf,0x6c,0x72,0x80
# ATT: vcvttps2uqqs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttps2uqqs zmm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x48,0x6c,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2uqqs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttps2uqqs zmm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x4f,0x6c,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2uqqs (%rip){1to8}, %zmm22
# INTEL: vcvttps2uqqs zmm22, dword ptr [rip]{1to8}
0x62,0xe5,0x7d,0x58,0x6c,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2uqqs -1024(,%rbp,2), %zmm22
# INTEL: vcvttps2uqqs zmm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7d,0x48,0x6c,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttps2uqqs 4064(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttps2uqqs zmm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7d,0xcf,0x6c,0x71,0x7f
# ATT: vcvttps2uqqs -512(%rdx){1to8}, %zmm22 {%k7} {z}
# INTEL: vcvttps2uqqs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
0x62,0xe5,0x7d,0xdf,0x6c,0x72,0x80
# ATT: vcvttsd2sis %xmm22, %ecx
# INTEL: vcvttsd2sis ecx, xmm22
0x62,0xb5,0x7f,0x08,0x6d,0xce
# ATT: vcvttsd2sis {sae}, %xmm22, %ecx
# INTEL: vcvttsd2sis ecx, xmm22, {sae}
0x62,0xb5,0x7f,0x18,0x6d,0xce
# ATT: vcvttsd2sis %xmm22, %r9
# INTEL: vcvttsd2sis r9, xmm22
0x62,0x35,0xff,0x08,0x6d,0xce
# ATT: vcvttsd2sis {sae}, %xmm22, %r9
# INTEL: vcvttsd2sis r9, xmm22, {sae}
0x62,0x35,0xff,0x18,0x6d,0xce
# ATT: vcvttsd2sis 268435456(%rbp,%r14,8), %ecx
# INTEL: vcvttsd2sis ecx, qword ptr [rbp + 8*r14 + 268435456]
0x62,0xb5,0x7f,0x08,0x6d,0x8c,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttsd2sis 291(%r8,%rax,4), %ecx
# INTEL: vcvttsd2sis ecx, qword ptr [r8 + 4*rax + 291]
0x62,0xd5,0x7f,0x08,0x6d,0x8c,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttsd2sis (%rip), %ecx
# INTEL: vcvttsd2sis ecx, qword ptr [rip]
0x62,0xf5,0x7f,0x08,0x6d,0x0d,0x00,0x00,0x00,0x00
# ATT: vcvttsd2sis -256(,%rbp,2), %ecx
# INTEL: vcvttsd2sis ecx, qword ptr [2*rbp - 256]
0x62,0xf5,0x7f,0x08,0x6d,0x0c,0x6d,0x00,0xff,0xff,0xff
# ATT: vcvttsd2sis 1016(%rcx), %ecx
# INTEL: vcvttsd2sis ecx, qword ptr [rcx + 1016]
0x62,0xf5,0x7f,0x08,0x6d,0x49,0x7f
# ATT: vcvttsd2sis -1024(%rdx), %ecx
# INTEL: vcvttsd2sis ecx, qword ptr [rdx - 1024]
0x62,0xf5,0x7f,0x08,0x6d,0x4a,0x80
# ATT: vcvttsd2sis 268435456(%rbp,%r14,8), %r9
# INTEL: vcvttsd2sis r9, qword ptr [rbp + 8*r14 + 268435456]
0x62,0x35,0xff,0x08,0x6d,0x8c,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttsd2sis 291(%r8,%rax,4), %r9
# INTEL: vcvttsd2sis r9, qword ptr [r8 + 4*rax + 291]
0x62,0x55,0xff,0x08,0x6d,0x8c,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttsd2sis (%rip), %r9
# INTEL: vcvttsd2sis r9, qword ptr [rip]
0x62,0x75,0xff,0x08,0x6d,0x0d,0x00,0x00,0x00,0x00
# ATT: vcvttsd2sis -256(,%rbp,2), %r9
# INTEL: vcvttsd2sis r9, qword ptr [2*rbp - 256]
0x62,0x75,0xff,0x08,0x6d,0x0c,0x6d,0x00,0xff,0xff,0xff
# ATT: vcvttsd2sis 1016(%rcx), %r9
# INTEL: vcvttsd2sis r9, qword ptr [rcx + 1016]
0x62,0x75,0xff,0x08,0x6d,0x49,0x7f
# ATT: vcvttsd2sis -1024(%rdx), %r9
# INTEL: vcvttsd2sis r9, qword ptr [rdx - 1024]
0x62,0x75,0xff,0x08,0x6d,0x4a,0x80
# ATT: vcvttsd2usis %xmm22, %ecx
# INTEL: vcvttsd2usis ecx, xmm22
0x62,0xb5,0x7f,0x08,0x6c,0xce
# ATT: vcvttsd2usis {sae}, %xmm22, %ecx
# INTEL: vcvttsd2usis ecx, xmm22, {sae}
0x62,0xb5,0x7f,0x18,0x6c,0xce
# ATT: vcvttsd2usis %xmm22, %r9
# INTEL: vcvttsd2usis r9, xmm22
0x62,0x35,0xff,0x08,0x6c,0xce
# ATT: vcvttsd2usis {sae}, %xmm22, %r9
# INTEL: vcvttsd2usis r9, xmm22, {sae}
0x62,0x35,0xff,0x18,0x6c,0xce
# ATT: vcvttsd2usis 268435456(%rbp,%r14,8), %ecx
# INTEL: vcvttsd2usis ecx, qword ptr [rbp + 8*r14 + 268435456]
0x62,0xb5,0x7f,0x08,0x6c,0x8c,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttsd2usis 291(%r8,%rax,4), %ecx
# INTEL: vcvttsd2usis ecx, qword ptr [r8 + 4*rax + 291]
0x62,0xd5,0x7f,0x08,0x6c,0x8c,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttsd2usis (%rip), %ecx
# INTEL: vcvttsd2usis ecx, qword ptr [rip]
0x62,0xf5,0x7f,0x08,0x6c,0x0d,0x00,0x00,0x00,0x00
# ATT: vcvttsd2usis -256(,%rbp,2), %ecx
# INTEL: vcvttsd2usis ecx, qword ptr [2*rbp - 256]
0x62,0xf5,0x7f,0x08,0x6c,0x0c,0x6d,0x00,0xff,0xff,0xff
# ATT: vcvttsd2usis 1016(%rcx), %ecx
# INTEL: vcvttsd2usis ecx, qword ptr [rcx + 1016]
0x62,0xf5,0x7f,0x08,0x6c,0x49,0x7f
# ATT: vcvttsd2usis -1024(%rdx), %ecx
# INTEL: vcvttsd2usis ecx, qword ptr [rdx - 1024]
0x62,0xf5,0x7f,0x08,0x6c,0x4a,0x80
# ATT: vcvttsd2usis 268435456(%rbp,%r14,8), %r9
# INTEL: vcvttsd2usis r9, qword ptr [rbp + 8*r14 + 268435456]
0x62,0x35,0xff,0x08,0x6c,0x8c,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttsd2usis 291(%r8,%rax,4), %r9
# INTEL: vcvttsd2usis r9, qword ptr [r8 + 4*rax + 291]
0x62,0x55,0xff,0x08,0x6c,0x8c,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttsd2usis (%rip), %r9
# INTEL: vcvttsd2usis r9, qword ptr [rip]
0x62,0x75,0xff,0x08,0x6c,0x0d,0x00,0x00,0x00,0x00
# ATT: vcvttsd2usis -256(,%rbp,2), %r9
# INTEL: vcvttsd2usis r9, qword ptr [2*rbp - 256]
0x62,0x75,0xff,0x08,0x6c,0x0c,0x6d,0x00,0xff,0xff,0xff
# ATT: vcvttsd2usis 1016(%rcx), %r9
# INTEL: vcvttsd2usis r9, qword ptr [rcx + 1016]
0x62,0x75,0xff,0x08,0x6c,0x49,0x7f
# ATT: vcvttsd2usis -1024(%rdx), %r9
# INTEL: vcvttsd2usis r9, qword ptr [rdx - 1024]
0x62,0x75,0xff,0x08,0x6c,0x4a,0x80
# ATT: vcvttss2sis %xmm22, %ecx
# INTEL: vcvttss2sis ecx, xmm22
0x62,0xb5,0x7e,0x08,0x6d,0xce
# ATT: vcvttss2sis {sae}, %xmm22, %ecx
# INTEL: vcvttss2sis ecx, xmm22, {sae}
0x62,0xb5,0x7e,0x18,0x6d,0xce
# ATT: vcvttss2sis %xmm22, %r9
# INTEL: vcvttss2sis r9, xmm22
0x62,0x35,0xfe,0x08,0x6d,0xce
# ATT: vcvttss2sis {sae}, %xmm22, %r9
# INTEL: vcvttss2sis r9, xmm22, {sae}
0x62,0x35,0xfe,0x18,0x6d,0xce
# ATT: vcvttss2sis 268435456(%rbp,%r14,8), %ecx
# INTEL: vcvttss2sis ecx, dword ptr [rbp + 8*r14 + 268435456]
0x62,0xb5,0x7e,0x08,0x6d,0x8c,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttss2sis 291(%r8,%rax,4), %ecx
# INTEL: vcvttss2sis ecx, dword ptr [r8 + 4*rax + 291]
0x62,0xd5,0x7e,0x08,0x6d,0x8c,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttss2sis (%rip), %ecx
# INTEL: vcvttss2sis ecx, dword ptr [rip]
0x62,0xf5,0x7e,0x08,0x6d,0x0d,0x00,0x00,0x00,0x00
# ATT: vcvttss2sis -128(,%rbp,2), %ecx
# INTEL: vcvttss2sis ecx, dword ptr [2*rbp - 128]
0x62,0xf5,0x7e,0x08,0x6d,0x0c,0x6d,0x80,0xff,0xff,0xff
# ATT: vcvttss2sis 508(%rcx), %ecx
# INTEL: vcvttss2sis ecx, dword ptr [rcx + 508]
0x62,0xf5,0x7e,0x08,0x6d,0x49,0x7f
# ATT: vcvttss2sis -512(%rdx), %ecx
# INTEL: vcvttss2sis ecx, dword ptr [rdx - 512]
0x62,0xf5,0x7e,0x08,0x6d,0x4a,0x80
# ATT: vcvttss2sis 268435456(%rbp,%r14,8), %r9
# INTEL: vcvttss2sis r9, dword ptr [rbp + 8*r14 + 268435456]
0x62,0x35,0xfe,0x08,0x6d,0x8c,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttss2sis 291(%r8,%rax,4), %r9
# INTEL: vcvttss2sis r9, dword ptr [r8 + 4*rax + 291]
0x62,0x55,0xfe,0x08,0x6d,0x8c,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttss2sis (%rip), %r9
# INTEL: vcvttss2sis r9, dword ptr [rip]
0x62,0x75,0xfe,0x08,0x6d,0x0d,0x00,0x00,0x00,0x00
# ATT: vcvttss2sis -128(,%rbp,2), %r9
# INTEL: vcvttss2sis r9, dword ptr [2*rbp - 128]
0x62,0x75,0xfe,0x08,0x6d,0x0c,0x6d,0x80,0xff,0xff,0xff
# ATT: vcvttss2sis 508(%rcx), %r9
# INTEL: vcvttss2sis r9, dword ptr [rcx + 508]
0x62,0x75,0xfe,0x08,0x6d,0x49,0x7f
# ATT: vcvttss2sis -512(%rdx), %r9
# INTEL: vcvttss2sis r9, dword ptr [rdx - 512]
0x62,0x75,0xfe,0x08,0x6d,0x4a,0x80
# ATT: vcvttss2usis %xmm22, %ecx
# INTEL: vcvttss2usis ecx, xmm22
0x62,0xb5,0x7e,0x08,0x6c,0xce
# ATT: vcvttss2usis {sae}, %xmm22, %ecx
# INTEL: vcvttss2usis ecx, xmm22, {sae}
0x62,0xb5,0x7e,0x18,0x6c,0xce
# ATT: vcvttss2usis %xmm22, %r9
# INTEL: vcvttss2usis r9, xmm22
0x62,0x35,0xfe,0x08,0x6c,0xce
# ATT: vcvttss2usis {sae}, %xmm22, %r9
# INTEL: vcvttss2usis r9, xmm22, {sae}
0x62,0x35,0xfe,0x18,0x6c,0xce
# ATT: vcvttss2usis 268435456(%rbp,%r14,8), %ecx
# INTEL: vcvttss2usis ecx, dword ptr [rbp + 8*r14 + 268435456]
0x62,0xb5,0x7e,0x08,0x6c,0x8c,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttss2usis 291(%r8,%rax,4), %ecx
# INTEL: vcvttss2usis ecx, dword ptr [r8 + 4*rax + 291]
0x62,0xd5,0x7e,0x08,0x6c,0x8c,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttss2usis (%rip), %ecx
# INTEL: vcvttss2usis ecx, dword ptr [rip]
0x62,0xf5,0x7e,0x08,0x6c,0x0d,0x00,0x00,0x00,0x00
# ATT: vcvttss2usis -128(,%rbp,2), %ecx
# INTEL: vcvttss2usis ecx, dword ptr [2*rbp - 128]
0x62,0xf5,0x7e,0x08,0x6c,0x0c,0x6d,0x80,0xff,0xff,0xff
# ATT: vcvttss2usis 508(%rcx), %ecx
# INTEL: vcvttss2usis ecx, dword ptr [rcx + 508]
0x62,0xf5,0x7e,0x08,0x6c,0x49,0x7f
# ATT: vcvttss2usis -512(%rdx), %ecx
# INTEL: vcvttss2usis ecx, dword ptr [rdx - 512]
0x62,0xf5,0x7e,0x08,0x6c,0x4a,0x80
# ATT: vcvttss2usis 268435456(%rbp,%r14,8), %r9
# INTEL: vcvttss2usis r9, dword ptr [rbp + 8*r14 + 268435456]
0x62,0x35,0xfe,0x08,0x6c,0x8c,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttss2usis 291(%r8,%rax,4), %r9
# INTEL: vcvttss2usis r9, dword ptr [r8 + 4*rax + 291]
0x62,0x55,0xfe,0x08,0x6c,0x8c,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttss2usis (%rip), %r9
# INTEL: vcvttss2usis r9, dword ptr [rip]
0x62,0x75,0xfe,0x08,0x6c,0x0d,0x00,0x00,0x00,0x00
# ATT: vcvttss2usis -128(,%rbp,2), %r9
# INTEL: vcvttss2usis r9, dword ptr [2*rbp - 128]
0x62,0x75,0xfe,0x08,0x6c,0x0c,0x6d,0x80,0xff,0xff,0xff
# ATT: vcvttss2usis 508(%rcx), %r9
# INTEL: vcvttss2usis r9, dword ptr [rcx + 508]
0x62,0x75,0xfe,0x08,0x6c,0x49,0x7f
# ATT: vcvttss2usis -512(%rdx), %r9
# INTEL: vcvttss2usis r9, dword ptr [rdx - 512]
0x62,0x75,0xfe,0x08,0x6c,0x4a,0x80
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llvm