llvm/llvm/utils/TableGen/ARMTargetDefEmitter.cpp

//===- ARMTargetDefEmitter.cpp - Generate data about ARM Architectures ----===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This tablegen backend exports information about CPUs, FPUs, architectures,
// and features into a common format that can be used by both TargetParser and
// the ARM and AArch64 backends.
//
//===----------------------------------------------------------------------===//

#include "llvm/ADT/StringSet.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/FormatVariadic.h"
#include "llvm/TableGen/Error.h"
#include "llvm/TableGen/Record.h"
#include "llvm/TableGen/TableGenBackend.h"
#include <cstdint>
#include <set>
#include <string>

usingnamespacellvm;

/// Collect the full set of implied features for a SubtargetFeature.
static void CollectImpliedFeatures(std::set<const Record *> &SeenFeats,
                                   const Record *Rec) { … }

static void CheckFeatureTree(const Record *Root) { … }

static void EmitARMTargetDef(const RecordKeeper &RK, raw_ostream &OS) { … }

static TableGen::Emitter::Opt
    X("gen-arm-target-def", EmitARMTargetDef,
      "Generate the ARM or AArch64 Architecture information header.");