static bool Predicate_immZExt5(int64_t Imm) { … }
static bool Predicate_immZExt6(int64_t Imm) { … }
static bool Predicate_immSExt6(int64_t Imm) { … }
static bool Predicate_immZExt4Ptr(int64_t Imm) { … }
static bool Predicate_immZExt3Ptr(int64_t Imm) { … }
static bool Predicate_immZExt2Ptr(int64_t Imm) { … }
static bool Predicate_immZExt1Ptr(int64_t Imm) { … }
static bool Predicate_immZExt4(int64_t Imm) { … }
static bool Predicate_immSExtAddiur2(int64_t Imm) { … }
static bool Predicate_immSExtAddius5(int64_t Imm) { … }
static bool Predicate_immZExtAndi16(int64_t Imm) { … }
static bool Predicate_immZExt2Shift(int64_t Imm) { … }
unsigned fastEmit_ISD_BITCAST_MVT_i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_BITCAST_MVT_i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_BITCAST_MVT_f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_BITCAST_MVT_f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_BITCAST_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_BRIND_MVT_i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_BRIND_MVT_i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_BRIND_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTLZ_MVT_i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTLZ_MVT_i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTLZ_MVT_v16i8_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTLZ_MVT_v8i16_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTLZ_MVT_v4i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTLZ_MVT_v2i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTLZ_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTPOP_MVT_i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTPOP_MVT_i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTPOP_MVT_v16i8_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTPOP_MVT_v8i16_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTPOP_MVT_v4i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTPOP_MVT_v2i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_CTPOP_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FABS_MVT_f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FABS_MVT_f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FABS_MVT_v4f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FABS_MVT_v2f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FABS_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FEXP2_MVT_v4f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FEXP2_MVT_v2f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FEXP2_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FLOG2_MVT_v4f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FLOG2_MVT_v2f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FLOG2_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FNEG_MVT_f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FNEG_MVT_f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FNEG_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_EXTEND_MVT_f16_MVT_f32_r(unsigned Op0) { … }
unsigned fastEmit_ISD_FP_EXTEND_MVT_f16_MVT_f64_r(unsigned Op0) { … }
unsigned fastEmit_ISD_FP_EXTEND_MVT_f16_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_EXTEND_MVT_f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_ROUND_MVT_f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_ROUND_MVT_f64_MVT_f16_r(unsigned Op0) { … }
unsigned fastEmit_ISD_FP_ROUND_MVT_f64_MVT_f32_r(unsigned Op0) { … }
unsigned fastEmit_ISD_FP_ROUND_MVT_f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_ROUND_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v2f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_TO_SINT_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v2f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FP_TO_UINT_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FRINT_MVT_v4f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FRINT_MVT_v2f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FRINT_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FSQRT_MVT_f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FSQRT_MVT_f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FSQRT_MVT_v4f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FSQRT_MVT_v2f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_FSQRT_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_SIGN_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f32_r(unsigned Op0) { … }
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f64_r(unsigned Op0) { … }
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v2i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_SINT_TO_FP_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v2i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_ISD_UINT_TO_FP_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_JmpLink_MVT_i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_JmpLink_MVT_i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_JmpLink_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_MFHI_MVT_Untyped_MVT_i32_r(unsigned Op0) { … }
unsigned fastEmit_MipsISD_MFHI_MVT_Untyped_MVT_i64_r(unsigned Op0) { … }
unsigned fastEmit_MipsISD_MFHI_MVT_Untyped_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_MFHI_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_MFLO_MVT_Untyped_MVT_i32_r(unsigned Op0) { … }
unsigned fastEmit_MipsISD_MFLO_MVT_Untyped_MVT_i64_r(unsigned Op0) { … }
unsigned fastEmit_MipsISD_MFLO_MVT_Untyped_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_MFLO_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_MTC1_D64_MVT_i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_MTC1_D64_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_TailCall_MVT_i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_TailCall_MVT_i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_TailCall_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_TruncIntFP_MVT_f32_MVT_f32_r(unsigned Op0) { … }
unsigned fastEmit_MipsISD_TruncIntFP_MVT_f32_MVT_f64_r(unsigned Op0) { … }
unsigned fastEmit_MipsISD_TruncIntFP_MVT_f32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_TruncIntFP_MVT_f64_MVT_f32_r(unsigned Op0) { … }
unsigned fastEmit_MipsISD_TruncIntFP_MVT_f64_MVT_f64_r(unsigned Op0) { … }
unsigned fastEmit_MipsISD_TruncIntFP_MVT_f64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_TruncIntFP_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VALL_NONZERO_MVT_v16i8_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VALL_NONZERO_MVT_v8i16_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VALL_NONZERO_MVT_v4i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VALL_NONZERO_MVT_v2i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VALL_NONZERO_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VALL_ZERO_MVT_v16i8_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VALL_ZERO_MVT_v8i16_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VALL_ZERO_MVT_v4i32_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VALL_ZERO_MVT_v2i64_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VALL_ZERO_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VANY_NONZERO_MVT_v16i8_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VANY_NONZERO_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VANY_ZERO_MVT_v16i8_r(MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_MipsISD_VANY_ZERO_r(MVT VT, MVT RetVT, unsigned Op0) { … }
unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0) override { … }
unsigned fastEmit_ISD_ADD_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADD_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADD_MVT_v4i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADD_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADD_MVT_v2i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADD_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADD_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADD_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADD_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADDC_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADDC_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADDC_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADDE_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ADDE_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_AND_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_AND_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_AND_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_AND_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_AND_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_AND_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_AND_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FADD_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FADD_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FADD_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FADD_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FADD_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FDIV_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FDIV_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FDIV_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FDIV_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FDIV_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FMAXNUM_IEEE_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FMAXNUM_IEEE_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FMAXNUM_IEEE_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FMINNUM_IEEE_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FMINNUM_IEEE_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FMINNUM_IEEE_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FMUL_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FMUL_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FMUL_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FMUL_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FMUL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FSUB_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FSUB_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FSUB_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FSUB_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_FSUB_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MUL_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MUL_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MUL_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MUL_MVT_v2i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MUL_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MUL_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MUL_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MUL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MULHS_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MULHS_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MULHS_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MULHU_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MULHU_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_MULHU_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_OR_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_OR_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_OR_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_OR_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_OR_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_OR_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_OR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ROTR_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_ROTR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SDIV_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SDIV_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SDIV_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SDIV_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SDIV_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SDIV_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SDIV_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SHL_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SHL_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SHL_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SHL_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SHL_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SHL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SMAX_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SMAX_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SMAX_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SMAX_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SMAX_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SMIN_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SMIN_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SMIN_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SMIN_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SMIN_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRA_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRA_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRA_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRA_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRA_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRA_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SREM_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SREM_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SREM_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SREM_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SREM_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SREM_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SREM_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRL_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRL_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRL_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRL_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRL_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SRL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUB_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUB_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUB_MVT_v4i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUB_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUB_MVT_v2i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUB_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUB_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUB_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUB_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUBC_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUBC_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_SUBC_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UDIV_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UDIV_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UDIV_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UDIV_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UDIV_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UDIV_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UDIV_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UMAX_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UMAX_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UMAX_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UMAX_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UMAX_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UMIN_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UMIN_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UMIN_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UMIN_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UMIN_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UREM_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UREM_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UREM_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UREM_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UREM_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UREM_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_UREM_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_XOR_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_XOR_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_XOR_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_XOR_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_XOR_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_XOR_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_ISD_XOR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_BuildPairF64_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_BuildPairF64_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_DivRem_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_DivRem_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_DivRem_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_DivRem16_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_DivRem16_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_DivRemU_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_DivRemU_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_DivRemU_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_DivRemU16_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_DivRemU16_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_EH_RETURN_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_EH_RETURN_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_EH_RETURN_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVEV_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVEV_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVEV_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVEV_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVEV_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVL_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVL_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVL_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVL_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVOD_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVOD_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVOD_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVOD_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVOD_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVR_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVR_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVR_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVR_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_ILVR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_MTLOHI_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_MTLOHI_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_MTLOHI_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_Mult_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_Mult_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_Mult_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_Multu_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_Multu_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_Multu_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_PCKEV_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_PCKEV_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_PCKEV_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_PCKEV_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_PCKEV_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_PCKOD_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_PCKOD_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_PCKOD_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_PCKOD_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_PCKOD_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_VNOR_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_VNOR_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_VNOR_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_VNOR_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_MipsISD_VNOR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { … }
unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, unsigned Op1) override { … }
unsigned fastEmit_MipsISD_ExtractElementF64_MVT_f64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_MipsISD_ExtractElementF64_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_MipsISD_SHLL_DSP_MVT_v4i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_MipsISD_SHLL_DSP_MVT_v2i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_MipsISD_SHLL_DSP_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_MipsISD_SHRA_DSP_MVT_v4i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_MipsISD_SHRA_DSP_MVT_v2i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_MipsISD_SHRA_DSP_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_MipsISD_SHRL_DSP_MVT_v4i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_MipsISD_SHRL_DSP_MVT_v2i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_MipsISD_SHRL_DSP_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) override { … }
unsigned fastEmit_ISD_ROTR_MVT_i32_ri_Predicate_immZExt5(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_ROTR_ri_Predicate_immZExt5(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SHL_MVT_i32_ri_Predicate_immZExt5(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SHL_ri_Predicate_immZExt5(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SRA_MVT_i32_ri_Predicate_immZExt5(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SRA_ri_Predicate_immZExt5(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SRL_MVT_i32_ri_Predicate_immZExt5(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SRL_ri_Predicate_immZExt5(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ri_Predicate_immZExt5(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_ROTR_MVT_i64_ri_Predicate_immZExt6(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_ROTR_ri_Predicate_immZExt6(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SHL_MVT_i64_ri_Predicate_immZExt6(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SHL_ri_Predicate_immZExt6(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SRA_MVT_i64_ri_Predicate_immZExt6(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SRA_ri_Predicate_immZExt6(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SRL_MVT_i64_ri_Predicate_immZExt6(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SRL_ri_Predicate_immZExt6(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ri_Predicate_immZExt6(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_EXTRACT_VECTOR_ELT_MVT_v4f32_ri_Predicate_immZExt2Ptr(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_EXTRACT_VECTOR_ELT_ri_Predicate_immZExt2Ptr(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ri_Predicate_immZExt2Ptr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_EXTRACT_VECTOR_ELT_MVT_v2f64_ri_Predicate_immZExt1Ptr(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_EXTRACT_VECTOR_ELT_ri_Predicate_immZExt1Ptr(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ri_Predicate_immZExt1Ptr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_EXTRACT_VECTOR_ELT_MVT_v4i32_ri_Predicate_immZExt4(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_EXTRACT_VECTOR_ELT_ri_Predicate_immZExt4(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ri_Predicate_immZExt4(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_ADD_MVT_i32_ri_Predicate_immSExtAddiur2(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_ADD_ri_Predicate_immSExtAddiur2(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ri_Predicate_immSExtAddiur2(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_ADD_MVT_i32_ri_Predicate_immSExtAddius5(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_ADD_ri_Predicate_immSExtAddius5(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ri_Predicate_immSExtAddius5(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_AND_MVT_i32_ri_Predicate_immZExtAndi16(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_AND_ri_Predicate_immZExtAndi16(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ri_Predicate_immZExtAndi16(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SHL_MVT_i32_ri_Predicate_immZExt2Shift(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SHL_ri_Predicate_immZExt2Shift(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SRL_MVT_i32_ri_Predicate_immZExt2Shift(MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_SRL_ri_Predicate_immZExt2Shift(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ri_Predicate_immZExt2Shift(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { … }
unsigned fastEmit_ISD_Constant_MVT_i32_i(MVT RetVT, uint64_t imm0) { … }
unsigned fastEmit_ISD_Constant_i(MVT VT, MVT RetVT, uint64_t imm0) { … }
unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t imm0) override { … }