llvm/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h

//===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file describes the PowerPC branch predicates.
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H
#define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H

// GCC #defines PPC on Linux but we use it as our namespace name
#undef PPC

// Generated files will use "namespace PPC". To avoid symbol clash,
// undefine PPC here. PPC may be predefined on some hosts.
#undef PPC

namespace llvm {
namespace PPC {
  /// Predicate - These are "(BI << 5) | BO"  for various predicates.
  enum Predicate { … };

  // Bit for branch taken (plus) or not-taken (minus) hint
  enum BranchHintBit { … };

  /// Invert the specified predicate.  != -> ==, < -> >=.
  Predicate InvertPredicate(Predicate Opcode);

  /// Assume the condition register is set by MI(a,b), return the predicate if
  /// we modify the instructions such that condition register is set by MI(b,a).
  Predicate getSwappedPredicate(Predicate Opcode);

  /// Return the condition without hint bits.
  inline unsigned getPredicateCondition(Predicate Opcode) { … }

  /// Return the hint bits of the predicate.
  inline unsigned getPredicateHint(Predicate Opcode) { … }

  /// Return predicate consisting of specified condition and hint bits.
  inline Predicate getPredicate(unsigned Condition, unsigned Hint) { … }
}
}

#endif