//===-- PPCHazardRecognizers.h - PowerPC Hazard Recognizers -----*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file defines hazard recognizers for scheduling on PowerPC processors. // //===----------------------------------------------------------------------===// #ifndef LLVM_LIB_TARGET_POWERPC_PPCHAZARDRECOGNIZERS_H #define LLVM_LIB_TARGET_POWERPC_PPCHAZARDRECOGNIZERS_H #include "PPCInstrInfo.h" #include "llvm/CodeGen/ScheduleHazardRecognizer.h" #include "llvm/CodeGen/ScoreboardHazardRecognizer.h" #include "llvm/CodeGen/SelectionDAGNodes.h" namespace llvm { /// PPCDispatchGroupSBHazardRecognizer - This class implements a scoreboard-based /// hazard recognizer for PPC ooo processors with dispatch-group hazards. class PPCDispatchGroupSBHazardRecognizer : public ScoreboardHazardRecognizer { … }; /// PPCHazardRecognizer970 - This class defines a finite state automata that /// models the dispatch logic on the PowerPC 970 (aka G5) processor. This /// promotes good dispatch group formation and implements noop insertion to /// avoid structural hazards that cause significant performance penalties (e.g. /// setting the CTR register then branching through it within a dispatch group), /// or storing then loading from the same address within a dispatch group. class PPCHazardRecognizer970 : public ScheduleHazardRecognizer { … }; } // end namespace llvm #endif