llvm/llvm/lib/Target/VE/LVLGen.cpp

//===-- LVLGen.cpp - LVL instruction generator ----------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#include "VE.h"
#include "VESubtarget.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"

usingnamespacellvm;

#define DEBUG_TYPE …

namespace {
struct LVLGen : public MachineFunctionPass { … };
char LVLGen::ID = …;

} // end of anonymous namespace

FunctionPass *llvm::createLVLGenPass() { … }

int LVLGen::getVLIndex(unsigned Opcode) { … }

// returns a register holding a vector length. NoRegister is returned when
// this MI does not have a vector length.
unsigned LVLGen::getVL(const MachineInstr &MI) { … }

bool LVLGen::runOnMachineBasicBlock(MachineBasicBlock &MBB) { … }

bool LVLGen::runOnMachineFunction(MachineFunction &F) { … }