; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -mtriple=thumbv7 -passes=typepromotion -S %s -o - | FileCheck %s
define hidden void @dont_promote_large_int(ptr %in, ptr %out) {
; CHECK-LABEL: @dont_promote_large_int(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[LOAD:%.*]] = load i144, ptr [[IN:%.*]], align 4
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i144 [[LOAD]] to i98
; CHECK-NEXT: [[AND:%.*]] = and i98 [[TRUNC]], -79228162514264337593543950336
; CHECK-NEXT: [[TRUNC_1:%.*]] = trunc i98 [[TRUNC]] to i32
; CHECK-NEXT: switch i98 [[AND]], label [[BB_3:%.*]] [
; CHECK-NEXT: i98 79228162514264337593543950336, label [[BB_1:%.*]]
; CHECK-NEXT: i98 0, label [[BB_2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb.1:
; CHECK-NEXT: [[AND_1:%.*]] = and i144 [[LOAD]], 237684487542793012780631851008
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i144 [[AND_1]], 0
; CHECK-NEXT: [[INDEX:%.*]] = select i1 [[CMP]], i32 0, i32 4
; CHECK-NEXT: [[GEP:%.*]] = getelementptr i64, ptr [[OUT:%.*]], i32 [[INDEX]]
; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[TRUNC_1]], 27
; CHECK-NEXT: [[SUB:%.*]] = sub nuw i32 0, [[MUL]]
; CHECK-NEXT: [[CAST_1:%.*]] = zext i32 [[SUB]] to i64
; CHECK-NEXT: store i64 [[CAST_1]], ptr [[OUT]], align 4
; CHECK-NEXT: br label [[BB_3]]
; CHECK: bb.2:
; CHECK-NEXT: [[CAST_2:%.*]] = zext i32 [[TRUNC_1]] to i64
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i64 [[CAST_2]], 32
; CHECK-NEXT: [[OR:%.*]] = or i64 [[CAST_2]], [[SHL]]
; CHECK-NEXT: store i64 [[OR]], ptr [[OUT]], align 4
; CHECK-NEXT: br label [[BB_3]]
; CHECK: bb.3:
; CHECK-NEXT: ret void
;
entry:
%load = load i144, ptr %in, align 4
%trunc = trunc i144 %load to i98
%and = and i98 %trunc, -79228162514264337593543950336
%trunc.1 = trunc i98 %trunc to i32
switch i98 %and, label %bb.3 [
i98 79228162514264337593543950336, label %bb.1
i98 0, label %bb.2
]
bb.1:
%and.1 = and i144 %load, 237684487542793012780631851008
%cmp = icmp eq i144 %and.1, 0
%index = select i1 %cmp, i32 0, i32 4
%gep = getelementptr i64, ptr %out, i32 %index
%mul = mul nuw i32 %trunc.1, 27
%sub = sub nuw i32 0, %mul
%cast.1 = zext i32 %sub to i64
store i64 %cast.1, ptr %out, align 4
br label %bb.3
bb.2:
%cast.2 = zext i32 %trunc.1 to i64
%shl = shl nuw i64 %cast.2, 32
%or = or i64 %cast.2, %shl
store i64 %or, ptr %out, align 4
br label %bb.3
bb.3:
ret void
}
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