llvm/llvm/test/Transforms/CodeGenPrepare/X86/pr72046.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=x86_64-unknown-unknown < %s | FileCheck %s

; Make sure the nneg flag is dropped when lshr and zext are interchanged.
define i8 @get(ptr %box, i32 %in) {
; CHECK-LABEL: define i8 @get(
; CHECK-SAME: ptr [[BOX:%.*]], i32 [[IN:%.*]]) {
; CHECK-NEXT:    [[PROMOTED:%.*]] = zext i32 [[IN]] to i64
; CHECK-NEXT:    [[SHR:%.*]] = lshr i64 [[PROMOTED]], 24
; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BOX]], i64 [[SHR]]
; CHECK-NEXT:    [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
; CHECK-NEXT:    ret i8 [[RES]]
;
  %shr = lshr i32 %in, 24
  %idxprom = zext nneg i32 %shr to i64
  %arrayidx = getelementptr inbounds i8, ptr %box, i64 %idxprom
  %res = load i8, ptr %arrayidx, align 1
  ret i8 %res
}